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qemu/target/ppc
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Víctor Colombo 205eb5a89e target/ppc: Change VSX instructions behavior to fill with zeros 
ISA v3.1 changed some VSX instructions behavior by changing what the
other words/doubleword in the result should contain when the result is
only one word/doubleword. e.g. xsmaxdp operates on doubleword 0 and
saves the result also in doubleword 0.
Before, the second doubleword result was undefined according to the
ISA, but now it's stated that it should be zeroed.

Even tough the result was undefined before, hardware implementing these
instructions already filled these fields with 0s. Changing every ISA
version in QEMU to this behavior makes the results match what happens
in hardware.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220204181944.65063-1-victor.colombo@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-09 09:08:56 +01:00
..
translate target/ppc: Change VSX instructions behavior to fill with zeros 2022-02-09 09:08:56 +01:00
arch_dump.c target/ppc: Set the correct endianness for powernv memory dumps 2022-01-12 11:28:27 +01:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu_init.c target/ppc: Merge 7x5 and 7x0 exception model IDs 2022-02-09 09:08:56 +01:00
cpu-models.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
cpu-models.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h target/ppc: Merge 7x5 and 7x0 exception model IDs 2022-02-09 09:08:56 +01:00
cpu.c target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
cpu.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: books: Remove excp_model argument from ppc_excp_apply_ail 2022-02-09 09:08:56 +01:00
fpu_helper.c target/ppc: Change VSX instructions behavior to fill with zeros 2022-02-09 09:08:56 +01:00
gdbstub.c target/ppc: Fix XER access in gdbstub 2021-10-21 11:42:47 +11:00
helper_regs.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
helper.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
insn32.decode PPC64/TCG: Implement 'rfebb' instruction 2021-12-17 17:57:19 +01:00
insn64.decode target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
int_helper.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
internal.h target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm_ppc.h target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
machine.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mem_helper.c accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
meson.build target/ppc: introduce PMUEventType and PMU overflow timers 2021-12-17 17:57:18 +01:00
misc_helper.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu_common.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu_helper.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-book3s-v3.c target/ppc: Introduce ppc_xlate 2021-07-09 10:38:19 +10:00
mmu-book3s-v3.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash32.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: Fix radix logging 2022-02-09 09:08:55 +01:00
mmu-radix64.h target/ppc: Check effective address validity 2022-01-04 07:55:34 +01:00
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: enable PMU instruction count 2021-12-17 17:57:18 +01:00
power8-pmu.c target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0() 2022-01-04 07:55:35 +01:00
power8-pmu.h target/ppc: Cache per-pmc insn and cycle count settings 2022-01-04 07:55:34 +01:00
spr_tcg.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
trace-events target/ppc: Convert debug to trace events (exceptions) 2021-09-30 12:26:06 +10:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00