mirror of https://gitlab.com/qemu-project/qemu
b71d0385e9
In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner H3 SDRAM controller. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| .. | ||
| macio | ||
| a9scu.h | ||
| allwinner-cpucfg.h | ||
| allwinner-h3-ccu.h | ||
| allwinner-h3-dramc.h | ||
| allwinner-h3-sysctrl.h | ||
| allwinner-sid.h | ||
| arm11scu.h | ||
| arm_integrator_debug.h | ||
| armsse-cpuid.h | ||
| armsse-mhu.h | ||
| aspeed_scu.h | ||
| aspeed_sdmc.h | ||
| aspeed_xdma.h | ||
| auxbus.h | ||
| bcm2835_mbox.h | ||
| bcm2835_mbox_defs.h | ||
| bcm2835_property.h | ||
| bcm2835_rng.h | ||
| bcm2835_thermal.h | ||
| cbus.h | ||
| grlib_ahb_apb_pnp.h | ||
| imx2_wdt.h | ||
| imx6_ccm.h | ||
| imx6_src.h | ||
| imx6ul_ccm.h | ||
| imx7_ccm.h | ||
| imx7_gpr.h | ||
| imx7_snvs.h | ||
| imx25_ccm.h | ||
| imx31_ccm.h | ||
| imx_ccm.h | ||
| imx_rngc.h | ||
| iotkit-secctl.h | ||
| iotkit-sysctl.h | ||
| iotkit-sysinfo.h | ||
| ivshmem.h | ||
| mac_via.h | ||
| mips_cmgcr.h | ||
| mips_cpc.h | ||
| mips_itu.h | ||
| mos6522.h | ||
| mps2-fpgaio.h | ||
| mps2-scc.h | ||
| msf2-sysreg.h | ||
| nrf51_rng.h | ||
| pca9552.h | ||
| pca9552_regs.h | ||
| pvpanic.h | ||
| stm32f2xx_syscfg.h | ||
| stm32f4xx_exti.h | ||
| stm32f4xx_syscfg.h | ||
| tmp105_regs.h | ||
| tz-mpc.h | ||
| tz-msc.h | ||
| tz-ppc.h | ||
| unimp.h | ||
| vmcoreinfo.h | ||
| zynq-xadc.h | ||