qemu/target
Richard Henderson 59754f85ed target/arm: Do memory type alignment check when translation disabled
If translation is disabled, the default memory type is Device, which
requires alignment checking.  This is more optimally done early via
the MemOp given to the TCG memory operation.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reported-by: Idan Horowitz <idan.horowitz@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240301204110.656742-6-richard.henderson@linaro.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1204
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05 13:22:56 +00:00
..
alpha target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only 2024-02-29 11:35:37 -10:00
arm target/arm: Do memory type alignment check when translation disabled 2024-03-05 13:22:56 +00:00
avr gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
cris include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
hexagon gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
hppa target/hppa: Restore unwind_breg before calculating ior 2024-03-03 06:41:19 +01:00
i386 * target/i386: Fix physical address truncation on 32-bit PAE 2024-02-28 14:23:21 +00:00
loongarch gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
m68k gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
microblaze gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
mips target/mips: Remove the unused DisasContext::saar field 2024-02-15 15:53:12 +01:00
nios2 kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
openrisc include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
ppc target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only 2024-02-29 11:35:37 -10:00
riscv gdbstub: Add members to identify registers to GDBFeature 2024-02-28 09:10:11 +00:00
rx gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
s390x gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
sh4 include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
sparc accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull 2024-03-05 13:22:56 +00:00
tricore include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
xtensa kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
Kconfig
meson.build target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00
target-common.c target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00