qemu/include/hw/riscv
Markus Armbruster 52581c718c Clean up header guards that don't match their file name
Header guard symbols should match their file name to make guard
collisions less likely.

Cleaned up with scripts/clean-header-guards.pl, followed by some
renaming of new guard symbols picked by the script to better ones.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220506134911.2856099-2-armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[Change to generated file ebpf/rss.bpf.skeleton.h backed out]
2022-05-11 16:49:06 +02:00
..
boot_opensbi.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
boot.h hw/riscv: boot: Support 64bit fdt address. 2022-04-22 10:35:16 +10:00
microchip_pfsoc.h hw/riscv: microchip_pfsoc: Use the PLIC config helper function 2021-10-28 14:39:23 +10:00
numa.h hw/riscv: Add helpers for RISC-V multi-socket NUMA machines 2020-08-25 09:11:35 -07:00
opentitan.h riscv: opentitan: Connect opentitan SPI Host 2022-04-22 10:35:16 +10:00
riscv_hart.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
shakti_c.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
sifive_cpu.h riscv: Add a sifive_cpu.h to include both E and U cpu type defines 2019-09-17 08:42:46 -07:00
sifive_e.h sifive_e: Rename memmap enum constants 2020-09-18 13:49:48 -04:00
sifive_u.h hw/riscv: sifive_u: Use the PLIC config helper function 2021-10-28 14:39:23 +10:00
spike.h hw/riscv: spike: Allow using binary firmware as bios 2022-01-21 15:52:56 +10:00
virt.h hw/riscv: virt: Create a platform bus 2022-04-29 10:48:31 +10:00