qemu/include/hw/pci-host
Daniel Henrique Barboza 41cb8d319d pnv_phb3.h: change TYPE_PNV_PHB3_ROOT_BUS name
The TYPE_PNV_PHB3_ROOT_BUS name is used as the default bus name when
the dev has no 'id'. However, pnv-phb3-root-bus is a bit too long to be
used as a bus name.

Most common QEMU buses and PCI controllers are named based on their bus
type (e.g. pSeries spapr-pci-host-bridge is called 'pci'). The most
common name for a PCIE bus controller in QEMU is 'pcie'. Naming it
'pcie' would break the documented use of the pnv-phb3 device, since
'pcie.0' would now refer to the root bus instead of the first root port.

There's nothing particularly wrong with the 'root-bus' name used before,
aside from the fact that 'root-bus' is being used for pnv-phb3 and
pnv-phb4 created buses, which is not quite correct since these buses
aren't implemented the same way in QEMU - you can't plug a
pnv-phb4-root-port into a pnv-phb3 root bus, for example.

This patch renames it as 'pnv-phb3-root', which is a compromise between
the existing and the previously used name. Creating 3 phbs without ID
will result in an "info qtree" output similar to this:

bus: main-system-bus
  type System
  dev: pnv-phb3, id ""
    index = 2 (0x2)
    chip-id = 0 (0x0)
    x-config-reg-migration-enabled = true
    bypass-iommu = false
    bus: pnv-phb3-root.2
      type pnv-phb3-root
(...)
  dev: pnv-phb3, id ""
    index = 1 (0x1)
    chip-id = 0 (0x0)
    x-config-reg-migration-enabled = true
    bypass-iommu = false
    bus: pnv-phb3-root.1
      type pnv-phb3-root
(...)
  dev: pnv-phb3, id ""
    index = 0 (0x0)
    chip-id = 0 (0x0)
    x-config-reg-migration-enabled = true
    bypass-iommu = false
    bus: pnv-phb3-root.0
      type pnv-phb3-root

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220105212338.49899-11-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-01-12 11:28:27 +01:00
..
designware.h nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
gpex.h hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows 2021-04-30 11:16:52 +01:00
i440fx.h hw/pci: remove all references to find_i440fx function 2021-09-04 17:34:05 -04:00
mv64361.h hw/pci-host: Add emulation of Marvell MV64361 PPC system controller 2021-05-04 11:41:25 +10:00
pam.h hw/pci-host/pam: Replace magic number by PAM_REGIONS_COUNT definition 2020-12-13 17:07:05 +01:00
pnv_phb3_regs.h ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge 2020-02-02 14:07:57 +11:00
pnv_phb3.h pnv_phb3.h: change TYPE_PNV_PHB3_ROOT_BUS name 2022-01-12 11:28:27 +01:00
pnv_phb4_regs.h ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge 2020-02-02 14:07:57 +11:00
pnv_phb4.h pnv_phb4.c: make pnv-phb4-root-port user creatable 2022-01-12 11:28:27 +01:00
ppce500.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
q35.h hw/pci-host/pam: Replace magic number by PAM_REGIONS_COUNT definition 2020-12-13 17:07:05 +01:00
remote.h multi-process: setup a machine object for remote device process 2021-02-10 09:23:28 +00:00
sabre.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
spapr.h spapr: Adjust firmware path of PCI devices 2021-02-10 10:43:50 +11:00
uninorth.h uninorth: use qdev gpios for PCI IRQs 2020-10-18 16:21:42 +01:00
xilinx-pcie.h hw/mips/boston: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00