9cf3bc65af
A few deficiencies in the current device model need to be noted. 1. FIFOs are not used. All sends and receives are done directly. 2. Repeated starts are not emulated. Repeated starts can be triggered in real hardware by sending a new read transfer request in the window time between transfer active set of write transfer request and done bit set of the same. Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240224191038.2409945-2-rayhan.faizel@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| .. | ||
| allwinner-i2c.h | ||
| arm_sbcon_i2c.h | ||
| aspeed_i2c.h | ||
| bcm2835_i2c.h | ||
| bitbang_i2c.h | ||
| i2c_mux_pca954x.h | ||
| i2c.h | ||
| imx_i2c.h | ||
| microbit_i2c.h | ||
| npcm7xx_smbus.h | ||
| pm_smbus.h | ||
| pmbus_device.h | ||
| pnv_i2c_regs.h | ||
| ppc4xx_i2c.h | ||
| smbus_eeprom.h | ||
| smbus_master.h | ||
| smbus_slave.h | ||