Richard Henderson 1bed4d2e55 target/arm: Honor the HCR_EL2.TPCP bit ... This bit traps EL1 access to cache maintenance insns that operate to the point of coherency or persistence. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200229012811.24129-10-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-03-05 16:09:18 +00:00
..
alpha	tcg: Search includes from the project root source directory	2020-01-15 15:13:10 -10:00
arm	target/arm: Honor the HCR_EL2.TPCP bit	2020-03-05 16:09:18 +00:00
cris	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
hppa	target/hppa: Allow, but diagnose, LDCW aligned only mod 4	2020-01-27 10:49:51 -08:00
i386	Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEAD	2020-02-25 13:41:48 +01:00
lm32	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
m68k	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
microblaze	qdev: set properties with device_class_set_props()	2020-01-24 20:59:15 +01:00
mips	target/mips: Separate FPU-related helpers into their own file	2020-02-04 08:53:54 +01:00
moxie	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
nios2	qdev: set properties with device_class_set_props()	2020-01-24 20:59:15 +01:00
openrisc	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
ppc	target/ppc/cpu.h: Clean up comments in the struct CPUPPCState definition	2020-02-21 09:15:04 +11:00
riscv	target/riscv: Emulate TIME CSRs for privileged mode	2020-02-27 13:46:36 -08:00
s390x	s390x: Rename and use constants for short PSW address and mask	2020-02-27 11:10:29 +01:00
sh4	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
sparc	qdev: set properties with device_class_set_props()	2020-01-24 20:59:15 +01:00
tilegx	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
tricore	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
unicore32	tcg: Search includes from the project root source directory	2020-01-15 15:13:10 -10:00
xtensa	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00