qemu/target/microblaze
Richard Henderson 597f9b2d30 accel/tcg: Pass max_insn to gen_intermediate_code by pointer
In preparation for returning the number of insns generated
via the same pointer.  Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-01 07:33:27 -10:00
..
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target/microblaze: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/microblaze: Replace tb_pc() with tb->pc 2023-03-01 07:33:18 -10:00
cpu.h target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu 2023-02-27 22:29:01 +01:00
gdbstub.c target/microblaze: Add gdbstub xml 2023-02-21 08:52:17 -10:00
helper.c accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
helper.h
insns.decode
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
meson.build
mmu.c exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
mmu.h target: Include missing 'cpu.h' 2022-03-06 13:15:42 +01:00
op_helper.c bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
translate.c accel/tcg: Pass max_insn to gen_intermediate_code by pointer 2023-03-01 07:33:27 -10:00