qemu/include/hw
Peter Maydell 126eeee6c7 target-arm queue:
* xlnx-zdma: Fix endianness handling of descriptor loading
  * nrf51: Fix last GPIO CNF address
  * gicv3: Use gicr_typer in arm_gicv3_icc_reset
  * msf2: Add EMAC block to SmartFusion2 SoC
  * New clock modelling framework
  * hw/arm: versal: Setup the ADMA with 128bit bus-width
  * Cadence: gem: fix wraparound in 64bit descriptors
  * cadence_gem: clear RX control descriptor
  * target/arm: Vectorize integer comparison vs zero
  * hw/arm/virt: dt: add kaslr-seed property
  * hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl6q5CoZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3pWPD/9zjcV3TlOUWg/2aRQOYWB1
 I/h2AGTI09Y/nGMmwvHEyQKyAg6mL8KfJwCUDHr1pE3DeTt4Z7dA+3rhk1uy+gKA
 Ot/7e4IVSMiNh28xkBiSPviBXjYtgmVjvSlgKn4fty6g+30wdGV8ymNz1wXO8II0
 5cuGlaz0VQ4N+W4qz9kuaJNEAsMSnmrJ9fUzZDllRsNy4li3aSR4sQ9CymsJ23+3
 9CdStk/ibA7tExDX5qkj4lKozENEAU/jethA91CQCMLnK/7aGfHbLqVyWu6xDuQ7
 oTdyXr7nrGIUjod+Cx7mLyUQKXVfsiw0x4kmjvOnaVZHh5oIgDj83vWXQ28nC6P4
 wVYCRWpg68GPuaEru8VeocdoATMa1ONjrv5/gFGOxlma4AjD07WQ53hTp2pL0HT2
 +uYPwm2iSYgYKX7QV/rbNzWHK1nYq6/3LDeVQc6nr/3jVewpZngnf2pMxChRUUoT
 qtdLwJL/om9hqV4lsU7cxHKSNnkocfDhjkwRy6wg0L/iXDftt1sKbZO+G78vvsow
 S+NqjpAo4m+P7ExS8DGiSsgvQIQIHvcjjpeym4fWmBxPaXep6oUIewzBuExcYWK8
 XogFZEnW6PNyr/CKLh7GYH9C0F6FI36+yPUZFxvdBpz4w5QBADYKyyG0/53P0uKa
 ez3ixFfplzcx8RIiy+nIsQ==
 =9plU
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200430-1' into staging

target-arm queue:
 * xlnx-zdma: Fix endianness handling of descriptor loading
 * nrf51: Fix last GPIO CNF address
 * gicv3: Use gicr_typer in arm_gicv3_icc_reset
 * msf2: Add EMAC block to SmartFusion2 SoC
 * New clock modelling framework
 * hw/arm: versal: Setup the ADMA with 128bit bus-width
 * Cadence: gem: fix wraparound in 64bit descriptors
 * cadence_gem: clear RX control descriptor
 * target/arm: Vectorize integer comparison vs zero
 * hw/arm/virt: dt: add kaslr-seed property
 * hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes

# gpg: Signature made Thu 30 Apr 2020 15:43:54 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200430-1: (30 commits)
  hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes
  hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102
  device_tree: Constify compat in qemu_fdt_node_path()
  device_tree: Allow name wildcards in qemu_fdt_node_path()
  target/arm/cpu: Update coding style to make checkpatch.pl happy
  target/arm: Make cpu_register() available for other files
  target/arm: Restrict the Address Translate write operation to TCG accel
  hw/arm/virt: dt: add kaslr-seed property
  hw/arm/virt: dt: move creation of /secure-chosen to create_fdt()
  target/arm: Vectorize integer comparison vs zero
  net: cadence_gem: clear RX control descriptor
  Cadence: gem: fix wraparound in 64bit descriptors
  hw/arm: versal: Setup the ADMA with 128bit bus-width
  qdev-monitor: print the device's clock with info qtree
  hw/arm/xilinx_zynq: connect uart clocks to slcr
  hw/char/cadence_uart: add clock support
  hw/misc/zynq_slcr: add clock generation for uarts
  docs/clocks: add device's clock documentation
  qdev-clock: introduce an init array to ease the device construction
  qdev: add clock input&output support to devices.
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-04-30 15:45:34 +01:00
..
acpi acpi: Use macro for table-loader file name 2020-04-13 06:55:54 -04:00
adc
arm msf2: Add EMAC block to SmartFusion2 SoC 2020-04-30 11:52:28 +01:00
audio
block
char hw/char/cadence_uart: add clock support 2020-04-30 15:35:41 +01:00
core x86 and machine queue for 5.0 soft freeze 2020-03-19 14:22:46 +00:00
cpu
cris
display hw/arm/bcm283x: Correct the license text 2020-03-23 17:22:30 +00:00
dma hw/arm/bcm283x: Correct the license text 2020-03-23 17:22:30 +00:00
firmware
gpio nrf51: Fix last GPIO CNF address 2020-04-30 11:52:27 +01:00
hyperv
i2c smbus: Fix spd_data_generate() error API violation 2020-04-29 08:01:52 +02:00
i386 hw/i386: Introduce apicid functions inside X86MachineState 2020-03-31 19:13:32 -03:00
ide hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h 2020-03-17 12:22:36 -04:00
input
intc hw/arm/bcm283x: Correct the license text 2020-03-23 17:22:30 +00:00
ipack
ipmi
isa hw/isa/superio: Correct the license text 2020-04-01 19:00:16 +02:00
kvm
lm32
m68k
mem nvdimm: add uuid property to nvdimm 2020-02-21 09:15:04 +11:00
mips
misc hw/arm/bcm283x: Correct the license text 2020-03-23 17:22:30 +00:00
net hw/net: Add Smartfusion2 emac block 2020-04-30 11:52:28 +01:00
nubus
nvram fw_cfg: Migrate ACPI table mr sizes separately 2020-04-13 06:55:54 -04:00
pci pcie_root_port: Add hotplug disabling option 2020-03-08 09:18:29 -04:00
pci-bridge
pci-host hw/pci-host/q35: Remove unused includes 2020-03-09 15:59:31 +01:00
ppc ppc/pnv: Create BMC devices only when defaults are enabled 2020-04-07 08:55:11 +10:00
rdma
riscv hw/riscv: Add optional symbol callback ptr to riscv_load_firmware() 2020-04-29 13:16:38 -07:00
rtc hw/arm/allwinner: add RTC device support 2020-03-12 16:27:33 +00:00
s390x s390x/s390-virtio-ccw: Fix build on systems without KVM 2020-04-29 14:36:19 +02:00
scsi
sd hw/arm/allwinner: add SD/MMC host controller 2020-03-12 16:27:33 +00:00
semihosting
sh4
southbridge hw/ide: Do ide_drive_get() within pci_ide_create_devs() 2020-03-17 12:22:36 -04:00
sparc
ssi
timer
tricore
unicore32
usb hw/usb: Add basic i.MX USB Phy support 2020-03-17 11:23:14 +00:00
vfio
virtio fix vhost_user_blk_watch crash 2020-03-29 09:52:13 -04:00
watchdog
xen xen-bus/block: explicitly assign event channels to an AioContext 2020-02-27 11:50:30 +00:00
xtensa
boards.h vl/s390x: fixup ram sizes for compat machines 2020-04-02 17:10:09 +02:00
clock.h hw/core/clock-vmstate: define a vmstate entry for clock state 2020-04-30 15:35:40 +01:00
elf_ops.h elf-ops: bail out if we have no function symbols 2020-04-07 16:19:49 +01:00
empty_slot.h
fw-path-provider.h
hotplug.h
hw.h
ide.h hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.h 2020-03-17 12:22:36 -04:00
irq.h
loader-fit.h
loader.h
nmi.h hw/nmi: Fix the NMI() macro, based on INTERFACE_CHECK() 2020-02-28 14:57:19 -05:00
or-irq.h
pcmcia.h
platform-bus.h
ptimer.h
qdev-clock.h qdev-clock: introduce an init array to ease the device construction 2020-04-30 15:35:40 +01:00
qdev-core.h qdev: add clock input&output support to devices. 2020-04-30 15:35:40 +01:00
qdev-dma.h
qdev-properties.h multifd: Add multifd-compression parameter 2020-02-28 09:24:43 +01:00
register.h
registerfields.h hw/registerfields.h: Add 8bit and 16bit register macros 2020-03-19 17:15:19 +01:00
resettable.h
stream.h
sysbus.h
usb.h
vmstate-if.h