ths 9898128f55 Simplify branch likely handling. ...

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162

2007-04-16 01:35:29 +00:00

..

cpu.h

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exec.h

Fix qemu SIGFPE caused by division-by-zero due to underflow.

2007-04-15 21:21:33 +00:00

fop_template.c

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helper.c

Another fix for CP0 Cause register handling.

2007-04-13 20:17:54 +00:00

mips-defs.h

Throw RI for invalid MFMC0-class instructions. Introduce optional

2007-04-11 02:24:14 +00:00

op_helper_mem.c

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op_helper.c

Fix qemu SIGFPE caused by division-by-zero due to underflow.

2007-04-15 21:21:33 +00:00

op_mem.c

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op_template.c

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op.c

Don't use T2 for INS, it conflicts with branch delay slot handling.

2007-04-15 21:26:37 +00:00

TODO

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translate_init.c

Make SYNCI_Step and CCRes CPU-specific.

2007-04-11 20:34:23 +00:00

translate.c

Simplify branch likely handling.

2007-04-16 01:35:29 +00:00