qemu/tcg/loongarch64
Richard Henderson 709bcd7da3 tcg/loongarch64: Reorg goto_tb implementation
The old implementation replaces two insns, swapping between

        b       <dest>
        nop
and
        pcaddu18i tmp, <dest>
        jirl      zero, tmp, <dest> & 0xffff

There is a race condition in which a thread could be stopped at
the jirl, i.e. with the top of the address loaded, and when
restarted we have re-linked to a different TB, so that the top
half no longer matches the bottom half.

Note that while we never directly re-link to a different TB, we
can link, unlink, and link again all while the stopped thread
remains stopped.

The new implementation replaces only one insn, swapping between

        b       <dest>
and
        pcadd   tmp, <jmp_addr>

falling through to load the address from tmp, and branch.

Reviewed-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-01-23 16:00:13 -10:00
..
tcg-insn-defs.c.inc tcg/loongarch64: Update tcg-insn-defs.c.inc 2023-01-23 15:59:59 -10:00
tcg-target-con-set.h tcg/loongarch64: Implement movcond 2023-01-23 16:00:13 -10:00
tcg-target-con-str.h tcg/loongarch64: Introduce tcg_out_addi 2023-01-23 16:00:13 -10:00
tcg-target.c.inc tcg/loongarch64: Reorg goto_tb implementation 2023-01-23 16:00:13 -10:00
tcg-target.h tcg/loongarch64: Reorg goto_tb implementation 2023-01-23 16:00:13 -10:00