tcg/loongarch64: Update tcg-insn-defs.c.inc
Regenerate with ADDU16I included: $ cd loongarch-opcodes/scripts/go $ go run ./genqemutcgdefs > $QEMU/tcg/loongarch64/tcg-insn-defs.c.inc Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -4,7 +4,7 @@
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*
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* This file is auto-generated by genqemutcgdefs from
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* https://github.com/loongson-community/loongarch-opcodes,
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* from commit 961f0c60f5b63e574d785995600c71ad5413fdc4.
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* from commit 25ca7effe9d88101c1cf96c4005423643386d81f.
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* DO NOT EDIT.
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*/
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@ -74,6 +74,7 @@ typedef enum {
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OPC_ANDI = 0x03400000,
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OPC_ORI = 0x03800000,
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OPC_XORI = 0x03c00000,
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OPC_ADDU16I_D = 0x10000000,
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OPC_LU12I_W = 0x14000000,
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OPC_CU32I_D = 0x16000000,
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OPC_PCADDU2I = 0x18000000,
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@ -710,6 +711,13 @@ tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
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tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
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}
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/* Emits the `addu16i.d d, j, sk16` instruction. */
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static void __attribute__((unused))
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tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
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{
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tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
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}
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/* Emits the `lu12i.w d, sj20` instruction. */
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static void __attribute__((unused))
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tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20)
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