Commit Graph

13996 Commits

Author SHA1 Message Date
Michael Walle
e5f799a267 lm32: support for creating device tree
This patch adds helper functions to create a ROM, which contains a hardware
description of a board. This is used in Theobromas LM32 Linux port.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:37 +01:00
Michael Walle
f19410ca69 lm32: system control model
This patch add support for a system control block. It is supposed to
act as helper for the emulated program. E.g. shutting down the VM or
printing test results. This model is intended for testing purposes only and
doesn't fit to any real hardware. Therefore, it is not added to any board
by default. Instead a user has to add it explicitly with the '-device'
commandline parameter.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:37 +01:00
Michael Walle
770ae5713a lm32: uart model
This patch add support for the LatticeMico32 UART.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
ea7924dcc4 lm32: timer model
This patch adds support for the LatticeMico32 system timer.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
f89286ae45 lm32: pic and juart helper functions
This patch adds init functions for the PIC and JTAG UART commonly used
in the board initialization.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
15d7dc4f80 lm32: juart model
This patch adds the JTAG UART model. It is accessed through special control
registers and opcodes. Therefore the translation uses callbacks to this
model.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
4ef66fa718 lm32: interrupt controller model
This patch adds the interrupt controller of the lm32. Because the PIC is
accessed through special control registers and opcodes, there are callbacks
from the lm32 translation code to this model.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
0c45d3d4b9 lm32: gdbstub support
This patch adds lm32 support to the gdbstub.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
c6af569347 lm32: machine state loading/saving
This patch adds support for saving and loading the processor state.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
143e8951e4 lm32: translation code helper
This patch adds translation helper functions.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
17c0fa3d57 lm32: translation routines
This patch adds the main translation routine. All opcodes of the
LatticeMico32 processor are supported and translated to TCG ops.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Michael Walle
81ea0e1304 LatticeMico32 target support
This patch adds support for the LatticeMico32 softcore processor by Lattice
Semiconductor.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00
Peter Maydell
ca27c052d9 target-arm: Implement a minimal set of cp14 debug registers
Newer ARM kernels try to probe for whether the CPU has hardware breakpoint
support. For this to work QEMU has to implement a minimal set of the cp14
debug registers. The architecture requires v7 cores to implement debug
and so there is no defined way to report its absence; however in practice
returning a zero DBGDIDR (ie with a reserved value for "debug architecture
version") should cause well-written hw debug users to do the right thing.
We also implement DBGDRAR and DBGDSAR as RAZ, indicating no memory mapped
debug components.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-07 09:46:19 +01:00
Peter Maydell
3849902cd8 target-arm: Use TCG temporary leak debugging facilities
Use the new TCG temporary leak debugging facilities to
check that each ARM instruction does not leak temporaries.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-07 09:26:18 +01:00
Peter Maydell
7d1b0095bf target-arm: Remove ad-hoc leak checking code
This commit removes the ad-hoc resource leak checking code from
target-arm. This includes replacing all uses of new_tmp() with
tcg_temp_new_i32() and all uses of dead_tmp() with
tcg_temp_free_i32().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-07 09:26:10 +01:00
Peter Maydell
27bfd83c33 tcg: Add support for debugging leakage of temporaries
Add support (if CONFIG_DEBUG_TCG is defined) for debugging leakage
of temporary variables. Generally any temporaries created by
a target while it is translating an instruction should be freed
by the end of that instruction; otherwise carefully crafted
guest code could cause TCG to run out of temporaries and assert.
By calling tcg_check_temp_count() after each instruction we can
check that we are not leaking temporaries in this way.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-07 09:26:06 +01:00
Adam Lackorzynski
6ed221b637 target-arm: Integrate secondary CPU reset in arm_boot
Integrate secondary CPU reset into arm_boot, removing it from realview.c.
On non-Linux systems secondary CPUs start with the same entry as the boot
CPU.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 23:37:19 +01:00
Adam Lackorzynski
f8bf860605 target-arm: Implement cp15 VA->PA translation
Implement VA->PA translations by cp15-c7 that went through unchanged
previously.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 23:37:18 +01:00
Adam Lackorzynski
fa25014441 target-arm: Fix soft interrupt in GIC distributor
Fix selection of target list filter mode.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 23:37:17 +01:00
Peter Maydell
29501f1b9e target-arm: Set carry flag correctly for Thumb2 ORNS
The code for Thumb2 ORNS (or negated and set flags) was trashing
a TCG input register which was needed later for use in calculating
flags, with the effect that the carry flag was always set with
the wrong sense. Fix this by using the TCG orc op instead of
separate not and or ops.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 23:30:18 +01:00
Andreas Färber
f66a99d752 ioport: Improve error output
When failing due to conflicting I/O port registrations,
include the offending I/O port address in the message.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 21:01:32 +01:00
Jes Sorensen
e323c93edf tracetool: Add optional argument to specify dtrace probe names
Optional feature allowing a user to generate the probe list to match
the name of the binary, in case they wish to install qemu under a
different name than qemu-{system,user},<arch>

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Stefan Hajnoczi <stefaha@linux.vnet.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:38:59 +01:00
Peter Maydell
8387da8197 target-arm: Handle VMOV between two core and VFP single regs
Fix two bugs in the translation of the instructions VMOV sa,sb,rx,ry and
VMOV rx,ry,sa,sb (which copy between a pair of ARM core registers and a
pair of VFP single precision registers):

 * An incorrect condition meant these instruction patterns were being
   treated as load/store multiple, which resulted in the generation
   of bad code and a runtime segfault
 * The order of the core register pair was reversed so the values would
   go to the wrong registers

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:28:08 +01:00
Stefan Weil
e095e2f3b4 w32: Add support for curses
MinGW optionally includes pdcurses, so add support for it.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:22:00 +01:00
Peter Maydell
cc68890166 target-arm: Don't decode old cp15 WFI instructions on v7 cores
In v7 of the ARM architecture, WFI (wait for interrupt) is a first-class
instruction, but in previous versions this functionality was provided
via a cp15 coprocessor register. Add correct feature checks to the
decoding of the cp15 WFI instructions so that they behave correctly
for newer cores. In particular, the old 0,c7,c8,2 encoding used on
ARM940 has been reused for VA-to-PA translation in v6 and v7.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:20:19 +01:00
Jason Wang
96c94b298f net: Add the missing option declaration of "vhostforce"
Signed-off-by: Jason Wang <jasowang@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:15:31 +01:00
Juan Quintela
05a7fcd081 gt64xxx: remove savevm support
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:10:58 +01:00
Juan Quintela
9023f7b2c8 vmstate: remove uninorth savevm code
It was migrating the wrong structures, no way it would work

Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:10:58 +01:00
Juan Quintela
532847e427 vmstate: remove grackle_pci savevm code
It was migrating the wrong structures, no way it would work

Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:10:58 +01:00
Juan Quintela
85bb6d36b0 net: remove parse_host_src_port() function
It was deprecated, and it has no users.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:06:50 +01:00
Aurelien Jarno
0d2e91c178 hw/sd.c: fix sd_set_cb() crash when bdrv == NULL
sd_set_cb() calls bdrv_is_read_only() and bdrv_is_inserted() even if
no block driver is associated with the card reader.

This patch fixes the issues by not setting the irq in this case, this
fixes ARM versatile crash.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 20:02:40 +01:00
Benjamin Poirier
ce0536616d net: Use iov helper functions
Signed-off-by: Benjamin Poirier <benjamin.poirier@gmail.com>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:29:14 +01:00
Stefan Hajnoczi
b48c20f723 docs: Update stderr and simple backend, add systemtap backend
The following additions to the tracing documentation are included:

1. Move "stderr" backend documentation to top-level and out of "simple"
   backend.  Include hints on when this backend is useful.

2. Document the "simple" backend thread-safety limitation.

3. Document the "dtrace" backend for SystemTap.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:11:47 +01:00
Stefan Hajnoczi
59da668492 simpletrace: Make simpletrace.py a Python module
The simpletrace.py script pretty-prints a binary trace file.  Most of
the code can be reused by trace file analysis scripts, so turn it into a
module.

Here is an example script that uses the new simpletrace module:

  #!/usr/bin/env python
  # Print virtqueue elements that were never returned to the guest.

  import simpletrace

  class VirtqueueRequestTracker(simpletrace.Analyzer):
      def __init__(self):
          self.elems = set()

      def virtqueue_pop(self, vq, elem, in_num, out_num):
          self.elems.add(elem)

      def virtqueue_fill(self, vq, elem, length, idx):
          self.elems.remove(elem)

      def end(self):
          for elem in self.elems:
              print hex(elem)

  simpletrace.run(VirtqueueRequestTracker())

The simpletrace API is based around the Analyzer class.  Users implement
an analyzer subclass and add methods for trace events they want to
process.  A catchall() method is invoked for trace events which do not
have dedicated methods.  Finally, there are also begin() and end()
methods like in sed that can be used to perform setup or print
statistics at the end.

A binary trace file is processed either with:

  simpletrace.run(analyzer) # uses command-line args

or with:

  simpletrace.process('path/to/trace-events',
                      'path/to/trace-file',
                      analyzer)

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:06:33 +01:00
Peter Maydell
0c1592d935 linux-user: Fix large seeks by 32 bit guest on 64 bit host
When emulating a 32 bit Linux user-mode program on a 64 bit target
we implement the llseek syscall in terms of lseek. Correct a bug
which meant we were silently casting the result of host lseek()
to a 32 bit integer as it passed through get_errno() and thus
throwing away the top half.

We also don't try to store the result back to userspace unless
the seek succeeded; this matches the kernel behaviour.

Thanks to Eoghan Sherry for identifying the problem and suggesting
a solution.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:06:27 +01:00
Peter Maydell
26883c699e hw/realview: Wire up the MMC card status
Instantiate the three PL061 GPIO modules the realview boards have.
Connect the MMC card status outputs of the PL181 MMC controller
to both the system registers and the GPIO module which handles
internal devices.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:01:31 +01:00
Peter Maydell
9793212bb0 hw/irq: Add qemu_irq_split() so one GPIO output can feed two inputs
Add a qemu_irq_split() function which allows a board to wire a single
GPIO output up to two GPIO inputs. This is needed for realview boards,
where the MMC card status is visible both in a system register and
via a PL061 GPIO module.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:01:31 +01:00
Peter Maydell
7063f49f59 hw/pl061.c: Implement ARM PL061 as well as Luminary one
ARM's PL061 has a different set of ID registers to the one in the
Luminary Stellaris; implement this so that the Linux driver can
identify the Realview PBX PL061 correctly.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:01:30 +01:00
Peter Maydell
b50ff6f524 hw/arm_sysctl.c: Wire MCI register MMC card status bits to GPIO inputs
Implement some GPIO inputs which a board can connect up to set the
MMC card status bits in the MCI register.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:01:30 +01:00
Peter Maydell
c31a4724e2 hw/pl181: Implement GPIO output pins for card status
Add two GPIO output pins to the PL181 model to indicate the card
present and readonly status information. On ARM boards these usually
are reflected in a system register.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 19:01:29 +01:00
Stefan Hajnoczi
444dd39b5f lsi53c895a: Update dnad when skipping MSGOUT bytes
Update not only dbc but also dnad when skipping bytes during the MSGOUT
phase.  Previously only dbc was updated which is probably wrong and
could lead to bogus message codes being read.

Tested on Linux and Windows Server 2003.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06 18:22:19 +01:00
Hervé Poussineau
dcfd08653b WIN32: Add missing include for 'struct timeval', used in vnc.h
Signed-off-by: Herv Poussineau <hpoussin@reactos.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-06 13:45:17 +00:00
Gerhard Wiesinger
219982ef42 hw/pcnet.c: Fix EPROM contents to suit AMD netware drivers
bugfix under DOS for AMD netware driver:
AMD PCNTNW Ethernet MLID v3.10 (960115), network card not found

bugfix works well under DOS with:
1.) AMD NDIS driver v2.0.1
2.) AMD PCNTNW Ethernet MLID v3.10 (960115)
3.) Knoppix 6.2

Signed-off-by: Gerhard Wiesinger <lists@wiesinger.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-05 13:07:25 +00:00
Vincent Palatin
60c07d933c net: fix qemu_can_send_packet logic
If any of the clients is not ready to receive (ie it has a can_receive
callback and can_receive() returns false), we don't want to start
sending, else this client may miss/discard the packet.

I got this behaviour with the following setup :
the emulated machine is using an USB-ethernet adapter, it is connected
to the network using SLIRP and I'm dumping the traffic in a .pcap file.
As per the following command line :
-net nic,model=usb,vlan=1 -net user,vlan=1 -net dump,vlan=1,file=/tmp/pkt.pcap
Every time that two packets are coming in a row from the host, the
usb-net code will receive the first one, then returns 0 to can_receive
call since it has a 1 packet long queue. But as the dump code is always
ready to receive, qemu_can_send_packet will return true and the next
packet will discard the previous one in the usb-net code.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-05 12:00:59 +00:00
Vincent Palatin
24ac3a7d4e net: fix trace when debug is activated in slirp
make the code compile correctly when DEBUG is activated.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-05 12:00:51 +00:00
Peter Maydell
4e6557124c linux-user: fix compile failure if !CONFIG_USE_GUEST_BASE
If CONFIG_USE_GUEST_BASE is not defined, gcc complains:
 linux-user/mmap.c:235: error: comparison of unsigned expression >= 0 is always true

because RESERVED_VA is #defined to 0. Since mmap_find_vma_reserved()
will never be called anyway if RESERVED_VA is always 0, fix this by
simply #ifdef'ing away the function and its callsite.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-03 23:33:45 +01:00
Stefan Hajnoczi
b46d97f2d2 virtio-net: Fix lduw_p() pointer argument of wrong size
A pointer to a size_t variable was passed as the void * pointer to
lduw_p() in virtio_net_receive().  Instead of acting on the 16-bit value
this caused failure on big-endian hosts.

Avoid this issue in the future by using stw_p() instead.  In general we
should use ld*_p() for loading from target memory and st*_p() for
storing to target memory anyway, not the other way around.

Also tighten up a correct use of lduw_p() when stw_p() should be used
instead in virtio_net_get_config().

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-03 23:33:26 +01:00
Aurelien Jarno
efac415471 target-sh4: move intr_at_halt out of cpu_halted()
All targets except SH4 have the same cpu_halted() routine, and it has
only one caller. It is therefore a good candidate for inlining.

The difference is the handling of the intr_at_halt, which is necessary
to ignore SR.BL when sleeping. Move intr_at_halt handling out of it, by
setting this variable while executing the sleep instruction, and
clearing it when the CPU has been woken-up by an interrupt, whatever the
state of SR.BL. Also rename this variable in_sleep.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-03 23:33:22 +01:00
Andrzej Zaborowski
8a231487bc pxa2xx: port pxa2xx_rtc to using qdev/vmstate
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03 15:13:42 +01:00
Andrzej Zaborowski
f114c82612 pxa2xx_dma: Get rid of a forward declaration. 2011-03-03 15:06:03 +01:00