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29 Commits

Author SHA1 Message Date
ths
01ba98161f Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-09 02:22:57 +00:00
pbrook
2ad207d4a0 Thumb semihosting fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3729 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-24 23:22:11 +00:00
balrog
2f4a40e569 Prevent cpsr_write/_read be put out of line in op.o (fixes a segfault on some platforms). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-13 01:50:15 +00:00
pbrook
9ee6e8bb85 ARMv7 support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 00:04:49 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
balrog
405ee3ad57 Invalidate TLBs when domains are changed (Matthew Warton). 
Legalise cp15 pid register writes (Matthew Warton).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-31 00:47:13 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
j_mayer
c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
balrog
2e23213f26 Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-01 02:31:54 +00:00
balrog
330c4d61a6 Fix XScale MMU's extended small pages. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3093 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 22:21:45 +00:00
balrog
c3d2689d88 Basic OMAP310 support. Basic Palm Tungsten|E machine emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3091 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 17:57:26 +00:00
balrog
610c3c8afd Reset ARM cp15.c1_sys to default values. Fix XScale cp15 accesses. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3013 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-24 12:09:48 +00:00
pbrook
ce8198612e ARM946 CPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2783 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-08 02:30:40 +00:00
balrog
18c9b56060 Implement iwMMXt instruction set for the PXA270 cpu. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-30 02:02:17 +00:00
balrog
c1713132e0 Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-30 01:26:42 +00:00
pbrook
c73c3aa081 Fix ARM fine pagetables. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2742 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-29 19:06:34 +00:00
j_mayer
9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t 
instead of target_ulong to be consistent.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 11:21:28 +00:00
pbrook
f3d6b95e83 ARM reabbot support (orginal patch by Aurelien Jarno). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-11 13:03:18 +00:00
pbrook
5adb4839e3 Fix typo in help output. 
List ARM cpus.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2475 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-08 03:15:18 +00:00
pbrook
3371d27293 Implement --cpu for ARM. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2474 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-08 03:04:12 +00:00
pbrook
8e71621f78 Add ARM Angel semihosting to system emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2340 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-20 17:12:09 +00:00
pbrook
78600320a8 Arm MMU fix (Justin Fletcher). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2154 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-09-09 14:36:26 +00:00
pbrook
d07edbfa00 Fix Arm cp15 c13 (Process ID) register writes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2067 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-07-21 22:39:57 +00:00
pbrook
8637c67fc5 Fix FIQ bank switching. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1786 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-03-14 14:20:32 +00:00
pbrook
40f137e1ea Add Arm926 core support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1765 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-20 00:33:36 +00:00
pbrook
06c949e62a Implement Arm BKPT instruction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1740 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-04 19:35:26 +00:00
bellard
6d7e63262c switching to Arm mode in do_interrupt() (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1711 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-18 16:54:08 +00:00
bellard
b5ff1b3127 ARM system emulation (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1661 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-26 10:38:39 +00:00