83151 Commits

Author SHA1 Message Date
Thomas Huth
88c78f162a configure / meson: Move check for sys/signal.h to meson.build
This check can be done in a much shorter way in meson.build

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-5-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Thomas Huth
2964be527a configure / meson: Move check for drm.h to meson.build
This check can be done in a much shorter way in meson.build

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-4-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Thomas Huth
2802d91d51 configure / meson: Move check for pty.h to meson.build
This check can be done in a much shorter way in meson.build

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-3-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Thomas Huth
5a42999b1f configure: Remove the obsolete check for ifaddrs.h
The code that used HAVE_IFADDRS_H has been removed in commit
0a27af918b ("io: use bind() to check for IPv4/6 availability"),
so we don't need this check in the configure script anymore.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201118171052.308191-2-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Pan Nengyuan
94237657af blockdev: Fix a memleak in drive_backup_prepare()
'local_err' seems forgot to propagate in error path, it'll cause
a memleak. Fix it.

Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Message-Id: <20201023061218.2080844-7-kuhn.chenqun@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Pan Nengyuan
cb8d0851f1 block/file-posix: fix a possible undefined behavior
local_err is not initialized to NULL, it will cause a assert error as below:
qemu/util/error.c:59: error_setv: Assertion `*errp == NULL' failed.

Fixes: c6447510690
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Message-Id: <20201023061218.2080844-8-kuhn.chenqun@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Pan Nengyuan
0c4c8671d7 elf2dmp/pdb: Plug memleak in pdb_init_from_file
Missing g_error_free in pdb_init_from_file() error path. Fix that.

Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com>
Reviewed-by: Viktor Prutyanov <viktor.prutyanov@phystech.edu>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20201023061218.2080844-5-kuhn.chenqun@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Pan Nengyuan
514284d73d elf2dmp/qemu_elf: Plug memleak in QEMU_Elf_init
Missing g_error_free in QEMU_Elf_init() error path. Fix that.

Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com>
Reviewed-by: Viktor Prutyanov <viktor.prutyanov@phystech.edu>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20201023061218.2080844-4-kuhn.chenqun@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Roman Bolshakov
8e2c76bd3f configure: Test if $make actually exists
configure doesn't detect if $make is installed on the build host.
This is also helpful for hosts where an alias for make is used, i.e.
configure would fail if gmake is not present on macOS.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200825202755.50626-5-r.bolshakov@yadro.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 23:56:16 +01:00
Philippe Mathieu-Daudé
3533ee301c target/mips: Use FloatRoundMode enum for FCR31 modes conversion
Use the FloatRoundMode enum type introduced in commit 3dede407cc6
("softfloat: Name rounding mode enum") instead of 'unsigned int'.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201123204448.3260804-2-f4bug@amsat.org>
2020-12-13 20:27:11 +01:00
Philippe Mathieu-Daudé
98cf80baa7 target/mips: Remove unused headers from fpu_helper.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-4-f4bug@amsat.org>
2020-12-13 20:27:11 +01:00
Philippe Mathieu-Daudé
7b884bf51e target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn()
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-17-f4bug@amsat.org>
2020-12-13 20:27:11 +01:00
Philippe Mathieu-Daudé
c20cf02bbd target/mips: Move cpu definitions, reset() and realize() to cpu.c
Nothing TCG specific there, move to common cpu code.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-16-f4bug@amsat.org>
2020-12-13 20:27:11 +01:00
Philippe Mathieu-Daudé
a10b453a52 target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-10-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
ffa657ee70 target/mips: Extract cpu_supports*/cpu_set* translate.c
Move cpu_supports*() and cpu_set_exception_base() from
translate.c to cpu.c.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-9-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
07741e6754 hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()
PTC field has 8 bits, PVPE has 4. We plan to use the
"hw/registerfields.h" API with MIPS CPU definitions
(target/mips/cpu.h). Meanwhile we use magic 8 and 4.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-6-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
8de0f28046 hw/mips/malta: Do not initialize MT registers if MT ASE absent
Do not initialize MT-related config register if the MT ASE
is not present.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-5-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
ecc268e7c2 target/mips: Do not initialize MT registers if MT ASE absent
Do not initialize MT-related config registers if the MT ASE
is not present. As some functions access the 'mvp' structure,
we still zero-allocate it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-4-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
17c2c320f3 target/mips: Introduce ase_mt_available() helper
Instead of accessing CP0_Config3 directly and checking
the 'Multi-Threading Present' bit, introduce an helper
to simplify code review.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-3-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
585c80ad7b target/mips: Remove mips_def_t unused argument from mvp_init()
mvp_init() doesn't require any CPU definition (beside the
information accessible via CPUMIPSState). Remove the unused
argument.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-2-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
5f3013654e target/mips: Remove unused headers from op_helper.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-6-f4bug@amsat.org>
2020-12-13 20:26:02 +01:00
Philippe Mathieu-Daudé
1379307db2 target/mips: Remove unused headers from translate.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-3-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
2fd9c5ad44 hw/mips: Move address translation helpers to target/mips/
Address translation is an architectural thing (not hardware
related). Move the helpers from hw/ to target/.

As physical address and KVM are specific to system mode
emulation, restrict this file to softmmu, so it doesn't
get compiled for user-mode emulation.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-2-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
df6adb68c1 target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument
Introduce cpu_supports_isa() which takes a CPUMIPSState
argument, more useful at runtime when the CPU is created
(no need to call the extensive object_class_by_name()).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-3-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
ac70f9767c target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
As cpu_supports_isa() / cpu_supports_cps_smp() take a 'cpu_type'
name argument, rename them cpu_type_supports_FEAT().

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201207215257.4004222-2-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
1ab3a0de2f target/mips: Explicit Release 6 MMU types
As of Release 6, MMU type 4 is assigned to "Dual Variable-Page-Size
and Fixed-Page-Size TLBs" and type 2 to "Block Address Translation.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201201132817.2863301-4-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
7d6f01a12b target/mips: Allow executing MSA instructions on Loongson-3A4000
The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html

Commit af868995e1b correctly set the 'MSA present' bit of Config3
register, but forgot to allow the MSA instructions decoding in
insn_flags, so executing them triggers a 'Reserved Instruction'.

Fix by adding the ASE_MSA mask to insn_flags.

Fixes: af868995e1b ("target/mips: Add Loongson-3 CPU definition")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <20201130102228.2395100-1-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
90c429ee76 target/mips: Also display exception names in user-mode
Currently MIPS exceptions are displayed as string in system-mode
emulation, but as number in user-mode.
Unify by extracting the current system-mode code as excp_name()
and use that in user-mode.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201119160536.1980329-1-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
5777c8a905 target/mips: Remove unused headers from cp0_helper.c
Remove unused headers and add missing "qemu/log.h" since
qemu_log() is called.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-5-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
55671f80cb target/mips: Do not include CP0 helpers in user-mode emulation
CP0 helpers are restricted to system-mode emulation.
Do not intent do build cp0_helper.c in user-mode (this
allows to simplify some #ifdef'ry).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <20201109090422.2445166-3-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
547b9b17f9 target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN
Replace magic values related to page size:

  12 -> TARGET_PAGE_BITS_MIN
  13 -> CP0PM_MASK

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <20201109090422.2445166-2-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
34cffe960e target/mips: Include "exec/memattrs.h" in 'internal.h'
mips_cpu_do_transaction_failed() requires MemTxAttrs
and MemTxResult declarations.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-8-f4bug@amsat.org>
2020-12-13 19:58:54 +01:00
Philippe Mathieu-Daudé
86deb70172 target/mips/kvm: Remove unused headers
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201206233949.3783184-7-f4bug@amsat.org>
2020-12-13 19:52:22 +01:00
Gan Qixin
f12985f14a ads7846: moves from the hw/display folder to the hw/input folder.
ads7846 is a touch-screen controller that is an input device rather
than a display device, so move it to the hw/input folder.

Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201115123503.1110665-1-ganqixin@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:54:55 +01:00
Peter Maydell
a998de0dcd CODING_STYLE.rst: Be less strict about 80 character limit
Relax the wording about line lengths a little bit; this goes with the
checkpatch changes to warn at 100 characters rather than 80.

(Compare the Linux kernel commit bdc48fa11e46f8; our coding style is
not theirs, but the rationale is good and applies to us too.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20201106112940.31300-1-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:51:33 +01:00
zhouyang
87b804ec4c fsdev: open brace '{' following struct go on the same line
I found some style problems while check the code using checkpatch.pl.
This commit fixs the issue below:
ERROR: open brace '{' following struct go on the same line

Signed-off-by: zhouyang <zhouyang789@huawei.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201209060735.2760943-1-zhouyang789@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:46:36 +01:00
Philippe Mathieu-Daudé
f6a3c86ebd hw/pci-host/pam: Replace magic number by PAM_REGIONS_COUNT definition
While this change helps triskaidekaphobic developers, it
is a good practice to avoid magic values and using constant
definitions instead.

Introduce the PAM_REGIONS_COUNT and use it. No logical change.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Julia Suvorova <jusual@redhat.com>
Message-Id: <20201202132038.1276404-1-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:07:05 +01:00
Xinhao Zhang
01d152c0bf hw/xen: Don't use '#' flag of printf format
Fix code style. Don't use '#' flag of printf format ('%#') in
format strings, use '0x' prefix instead

Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com>
Signed-off-by: Kai Deng <dengkai1@huawei.com>
Message-Id: <20201104133709.3326630-1-zhangxinhao1@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:02:42 +01:00
Michael Roth
2f5f9bc88d MAINTAINERS: update my email address
I've recently switched employers and the current email address is out
of date.

Signed-off-by: Michael Roth <michael.roth@amd.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20201027060253.353054-1-michael.roth@amd.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:02:42 +01:00
Peter Maydell
fa647905e6 qemu-options.hx: Fix minor issues in icount documentation
The documentation for the icount documentation has some minor issues:
 * in a couple of places it says "sleep=on|off" when in the context of the
   sentence it means specifically "sleep=on"
 * the synopsis line for the documentation has drifted out of sync
   with the synopsis line in the DEF() macro (used for "-help" output)
 * the synopsis line in the DEF() macro is missing a "][" between
   the sleep= part and the rr= part
 * the synopsis line doesn't indicate that rrsnapshot is an optional
   part of the rr=mode,rrfile=filename subgrouping
 * we don't document that sleep=on can't be used with shift=auto
   or align=on
 * the rr option description had some minor grammar and formatting
   errors and was a bit terse
 * in commit f1f4b57e88ff in 2015 the documentation of the sleep=
   suboption got added between the two paragraphs defining general
   behaviour of the icount option. This meant that the second
   paragraph talking about the behaviour of "this option" reads as
   if it's talking about sleep=on, when it's really describing -icount
   as a whole. The paragraph is better moved back up to above the
   sleep= section.
 * the summary text displayed in "-help" output didn't mention
   the record-and-replay part

Fix these errors.

Fixes: https://bugs.launchpad.net/qemu/+bug/1774412
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201121213506.15599-1-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:02:42 +01:00
Dov Murik
6f8ddc2a89 target/i386: tracing: format length values as hex
Three trace events had a literal "0x" prefix but the 'len' values were
formatted in decimal base.  Keep the prefix and format the numbers as
hex, as is usually the case for length of memory regions.

Signed-off-by: Dov Murik <dovmurik@linux.vnet.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201103100745.160409-1-dovmurik@linux.vnet.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-13 17:02:42 +01:00
Philippe Mathieu-Daudé
11cb076b26 target/mips/kvm: Assert unreachable code is not used
This code must not be used outside of KVM. Abort if it is.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200429082916.10669-3-f4bug@amsat.org>
2020-12-13 16:00:58 +01:00
Huacai Chen
dab1e1e15b MAINTAINERS: chenhc@lemote.com -> chenhuacai@kernel.org
Use @kernel.org address as the main communications end point. Update the
corresponding M-entries and .mailmap (for git shortlog translation).

Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1607160121-9977-1-git-send-email-chenhuacai@kernel.org>
2020-12-13 16:00:58 +01:00
Peter Maydell
17584289af m68k pull request 20201212
Fix for Coverity CID 1421883
 Fix some comment spelling errors
 Add m68k vmstate
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Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' into staging

m68k pull request 20201212

Fix for Coverity CID 1421883
Fix some comment spelling errors
Add m68k vmstate

# gpg: Signature made Sat 12 Dec 2020 17:54:28 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-6.0-pull-request:
  m68k: fix some comment spelling errors
  target/m68k: Add vmstate definition for M68kCPU
  target/m68k: remove useless qregs array
  hw/m68k/q800.c: Make the GLUE chip an actual QOM device
  hw/m68k/q800: Don't connect two qemu_irqs directly to the same input

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-12 18:33:46 +00:00
zhaolichang
ce00ff729e m68k: fix some comment spelling errors
I found that there are many spelling errors in the comments of qemu/target/m68k.
I used spellcheck to check the spelling errors and found some errors in the folder.

Signed-off-by: zhaolichang <zhaolichang@huawei.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org>
Reviewed-by: Laurent Vivier<laurent@vivier.eu>
Message-Id: <20201009064449.2336-9-zhaolichang@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-12 18:12:43 +01:00
Laurent Vivier
d21f73c61d target/m68k: Add vmstate definition for M68kCPU
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20201022203000.1922749-3-laurent@vivier.eu>
2020-12-12 18:12:39 +01:00
Laurent Vivier
4160d5e6bd target/m68k: remove useless qregs array
They are unused since the target has been converted to TCG.

Fixes: e1f3808e03f7 ("Convert m68k target to TCG.")
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20201022203000.1922749-2-laurent@vivier.eu>
2020-12-12 18:12:35 +01:00
Peter Maydell
07e39012fe hw/m68k/q800.c: Make the GLUE chip an actual QOM device
The handling of the GLUE (General Logic Unit) device is
currently open-coded. Make this into a proper QOM device.

This minor piece of modernisation gets rid of the free
floating qemu_irq array 'pic', which Coverity points out
is technically leaked when we exit the machine init function.
(The replacement glue device is not leaked because it gets
added to the sysbus, so it's accessible via that.)

Fixes: Coverity CID 1421883
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201106235109.7066-3-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-12 18:06:01 +01:00
Peter Maydell
9526486164 hw/m68k/q800: Don't connect two qemu_irqs directly to the same input
The q800 board code connects both of the IRQ outputs of the ESCC
to the same pic[3] qemu_irq. Connecting two qemu_irqs outputs directly
to the same input is not valid as it produces subtly wrong behaviour
(for instance if both the IRQ lines are high, and then one goes
low, the PIC input will see this as a high-to-low transition
even though the second IRQ line should still be holding it high).

This kind of wiring needs an explicitly created OR gate; add one.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20201106235109.7066-2-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-12-12 18:05:30 +01:00
Peter Maydell
ad717e6da3 Block layer patches:
- Support for FUSE exports
 - Fix deadlock in bdrv_co_yield_to_drain()
 - Use lock guard macros
 - Some preparational patches for 64 bit block layer
 - file-posix: Fix request extension to INT64_MAX in raw_do_pwrite_zeroes()
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Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches:

- Support for FUSE exports
- Fix deadlock in bdrv_co_yield_to_drain()
- Use lock guard macros
- Some preparational patches for 64 bit block layer
- file-posix: Fix request extension to INT64_MAX in raw_do_pwrite_zeroes()

# gpg: Signature made Fri 11 Dec 2020 17:06:19 GMT
# gpg:                using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6
# gpg:                issuer "kwolf@redhat.com"
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* remotes/kevin/tags/for-upstream: (34 commits)
  block: Fix deadlock in bdrv_co_yield_to_drain()
  block: Fix locking in qmp_block_resize()
  block: Simplify qmp_block_resize() error paths
  block: introduce BDRV_MAX_LENGTH
  block/io: bdrv_check_byte_request(): drop bdrv_is_inserted()
  block/io: bdrv_refresh_limits(): use ERRP_GUARD
  block/file-posix: fix workaround in raw_do_pwrite_zeroes()
  can-host: Fix crash when 'canbus' property is not set
  iotests/221: Discard image before qemu-img map
  file-posix: check the use_lock before setting the file lock
  iotests/308: Add test for FUSE exports
  iotests: Enable fuse for many tests
  iotests: Allow testing FUSE exports
  iotests: Give access to the qemu-storage-daemon
  storage-daemon: Call bdrv_close_all() on exit
  iotests/287: Clean up subshell test image
  iotests: Let _make_test_img guess $TEST_IMG_FILE
  iotests: Restrict some Python tests to file
  iotests/091: Use _cleanup_qemu instad of "wait"
  iotests: Derive image names from $TEST_IMG
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-12 00:20:46 +00:00