Commit Graph

48733 Commits

Author SHA1 Message Date
Greg Ungerer
cbf061bd1f m68k: change default system clock for m5208evb
The shipping default setting for the Freescale M5208EVB board is to run
the CPU at 166.67MHz. The current qemu emulation code for this board is
defaulting to 66MHz. This results in time appearing to run way to slowly.
So a "sleep 5" in a standard ColdFire Linux build takes almost 15
seconds in real time to actually complete.

Change the hard coded default to match the default hardware setting.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Marc-André Lureau
efee678d6d exec: remove unused compacted argument
Since commit b35ba30f8f when it was introduced, phys_page_compact()
takes an unused compacted argument.

ubsan complains about it when launching qemu-x86_64 without arguments:
qemu/exec.c:310:5: runtime error: variable length array bound evaluates to non-positive value 0

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Li Qiang
b16c129daf usb: ehci: fix memory leak in ehci_process_itd
While processing isochronous transfer descriptors(iTD), if the page
select(PG) field value is out of bands it will return. In this
situation the ehci's sg list is not freed thus leading to a memory
leak issue. This patch avoid this.

Signed-off-by: Li Qiang <liqiang6-s@360.cn>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
David Anderson
a43edcf20a qapi: make the json schema files more regular.
This makes it easier to parse the schema file for tool generation:
each paragraph is either a non-docstring comment, or a docstring
immediately followed by a Python dict describing an API item.

Signed-off-by: David Anderson <dave@natulte.net>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Lin Ma
7a488b5b24 maint: Add module_block.h to .gitignore
Commit 0c0c1fd9 generated module_block.h automatically, Add it to .gitignore to
avoid checking in it by 'git add .'.

Signed-off-by: Lin Ma <lma@suse.com>
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Thomas Huth
81527b94ad MAINTAINERS: Some updates related to the SH4 machines
hw/intc/sh_intc.c and hw/timer/sh_timer.c seem to belong to
the R2D machine, as far as I can see.
And concerning the Shix machine, it does not make much sense
to have a "M:" entry here and the "S:" set to "Orphan". So
I'd like to suggest to use "Odd Fixes" here instead.

Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Thomas Huth
5995db8871 MAINTAINERS: Add some more MIPS related files
The MIPS section is missing some related header files, and files
in the hw/misc/, hw/intc/ and hw/timer/ folders.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Thomas Huth
ccf0a57b45 MAINTAINERS: Add usermode related config files
The default-configs/*-linux-user.mak belong to Linux usermode
emulation, and default-configs/*-bsd-user.mak belong to BSD
usermode emulation.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:25:29 +03:00
Thomas Huth
03972660f7 MAINTAINERS: Add some more pattern to recognize all win32 related files
The get_maintainer.pl script currently thinks that the win32
related files in the util and include folders are currently
unmaintained. Thus let's add some additional wildcards to
match these files.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:11:48 +03:00
Thomas Huth
de85094825 MAINTAINERS: Add some more rocker related files
The files in tests/rocker/ and docs/specs/rocker.txt
should be listed in the Rocker section of MAINTAINERS.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:11:48 +03:00
Thomas Huth
c9b900903b MAINTAINERS: Add header files to CRIS section
etraxfs_dma.h and etraxfs.h in include/hw/cris/ obviously belong
to the CRIS section in MAINTAINERS.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:11:48 +03:00
Thomas Huth
72fa605dec MAINTAINERS: Add some more files to the virtio section
Makefile.objs and trace-events in hw/virtio/ were not covered
by MAINTAINERS yet.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:11:48 +03:00
Thomas Huth
c10a1c787b MAINTAINERS: Add some SPARC machine related files
And while we're at it, remove Blue Swirl from the list
of maintainers. Blue has apparently been inactive for
quite a while now, so I assume he's unfortunately
not available as maintainer anymore.

Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:11:48 +03:00
Thomas Huth
a2b245ae2f MAINTAINERS: Add include/hw/audio/ to audio section
audio.h and pcspk.h are recognized as maintained files now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 11:11:48 +03:00
Thomas Huth
c13e9912d9 MAINTAINERS: Add some more files to the HMP section
The hmp-commands-info.hx, hmp.h and include/monitor/hmp-target.h
files were classified as unmaintained. Let's add them to the
HMP section.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 09:02:19 +03:00
Thomas Huth
a3ccdfb5bb MAINTAINERS: Add files to the Moxie section.
The hw/moxie/ folder and default-configs/moxie-softmmu.mak
obviously belong to the Moxie CPU.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 09:02:19 +03:00
Eric Blake
496e079813 tests: Ignore test executables
Commits 9ef8112a and efad6682 introduced new tests, but forgot
to ignore the built executables from an in-tree build.

Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 09:02:19 +03:00
Paolo Bonzini
a1c2bbc87b bt-hci-csr: drop unused argument
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 09:02:19 +03:00
Stefan Hajnoczi
e69f7d2510 qemu-options.hx: fix -chardev ringbuf typos
Clean up the documentation for -chardev ringbuf.  There is a stray
closing parenthesis and the comma is unnecessary.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-08 09:02:19 +03:00
Ed Maste
48f592118a bsd-user: fix FreeBSD build after d148d90e
Signed-off-by: Ed Maste <emaste@freebsd.org>
Message-id: 1475611369-74971-1-git-send-email-emaste@freebsd.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-07 15:17:53 +01:00
Peter Maydell
e902754e3d ppc patch queue 2016-10-06
Currently accumulated target-ppc and spapr machine related patches.
   - More POWER9 instruction implementations
   - Additional test case / enabling of test cases for Power
   - Assorted fixes
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJX9emTAAoJEGw4ysog2bOS1ucP/3ussng8wx5f7ZIM/qNPK1mp
 kkskXTa14th0mAg5xC0aMZw7svxWjWBbGvB4lTtMMIwtm9jrPdUpNMOMY1E9+Qeb
 +ZZHw+9abJp41EZP/CVs+5Zdh2VRmuVoc+YvX3nOP+XiLLu13v9pJ4Y/3Nw+kMAR
 XhGsXvmnf3Pz7ett5d3xGyF4nZI4UkhGi0jCj4y3Tq7Klakq8kjH8EGsCb1uhC0T
 dVOEI5XNQ+O3TWhhV1Ihssd3TxmmvSp+V6KdzDKtU+NxKdjrtu2lPfe6+sgFK1gy
 zu6gg4l8tlL2EgGKgnG7oB9M/bzz1Up8BujOW8uOAw3Ci6rL5v2vRnu3g8+sIW1Q
 3fYh8a7YjhljFyR13fb45/vXLBzv5ozKSVXozglTYPd8SD4RdBhkXvuSE6U3mjAp
 p9k0zcv/rc+I86ikif617Jp6nA+3UgOotoGphGohMudlFem6srpp8bYIbh8vJk77
 1zIs7ADo6VBeM32cpu95ZXeMRC3ZJBPuHqr/62Bhst0tN1xoRRWMzvQMQkh3ou2a
 4IHVOe7hECsFwueiHoHQS1ybaiRQGz6bXSATPCCKg+ERHoqLzh26yyDf/qD4O50R
 4t27YrzlGpRa2w+PLhXzo5sJLNwHU6ptCXgZyv31dPAl5lBd493IpORYFUaz5Akq
 v9ONu7cYu5Lu2fRXJk/X
 =YUU1
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161006' into staging

ppc patch queue 2016-10-06

Currently accumulated target-ppc and spapr machine related patches.
  - More POWER9 instruction implementations
  - Additional test case / enabling of test cases for Power
  - Assorted fixes

# gpg: Signature made Thu 06 Oct 2016 07:05:07 BST
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.8-20161006: (29 commits)
  hw/ppc/spapr: Use POWER8 by default for the pseries-2.8 machine
  tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe test
  spapr: fix check of cpu alias name in spapr_get_cpu_core_type()
  tests: enable ohci/uhci/xhci tests on PPC64
  libqos: use generic qtest_shutdown()
  libqos: add PCI management in qtest_vboot()/qtest_shutdown()
  libqos: add PPC64 PCI support
  target-ppc: fix vmx instruction type/type2
  target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too
  target-ppc/kvm: Add a wrapper function to check for KVM-PR
  MAINTAINERS: Add two more ppc related files
  target-ppc: Implement mtvsrws instruction
  target-ppc: add vclzlsbb/vctzlsbb instructions
  target-ppc: add vector compare not equal instructions
  target-ppc: fix invalid mask - cmpl, bctar
  target-ppc: add stxvb16x instruction
  target-ppc: add lxvb16x instruction
  target-ppc: add stxvh8x instruction
  target-ppc: add lxvh8x instruction
  target-ppc: improve stxvw4x implementation
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-06 13:34:00 +01:00
Peter Maydell
0bdb12c7c5 rules.mak: quiet-command: Split command name and args to print
The quiet-command make rule currently takes two arguments:
the command and arguments to run, and a string to print if
the V flag is not set (ie we are not being verbose).
By convention, the string printed is of the form
"  NAME   some args". Unfortunately to get nicely lined up
output all the strings have to agree about what column the
arguments should start in, which means that if we add a
new quiet-command usage which wants a slightly longer CMD
name then we either put up with misalignment or change
every quiet-command string.

Split the quiet-mode string into two, the "NAME" and
the "same args" part, and use printf(1) to format the
string automatically. This means we only need to change
one place if we want to support a longer maximum name.

In particular, we can now print 7-character names lined
up properly (they are needed for the OSX "SETTOOL" invocation).

Change all the uses of quiet-command to the new syntax.
(Any which are missed or inadvertently reintroduced
via later merges will result in slightly misformatted
quiet output rather than disaster.)

A few places in the pc-bios/ makefiles are updated to use
"BUILD", "SIGN" and "STRIP" rather than "Building",
"Signing" and "Stripping" for consistency and to keep them
below 7 characters. Module .mo links now print "LD" rather
than the nonstandard "LD -r".

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 1475598441-27908-1-git-send-email-peter.maydell@linaro.org
2016-10-06 12:11:51 +01:00
Thomas Huth
3daa4a9f95 hw/ppc/spapr: Use POWER8 by default for the pseries-2.8 machine
A couple of distributors are compiling their distributions
with "-mcpu=power8" for ppc64le these days, so the user sooner
or later runs into a crash there when not explicitely specifying
the "-cpu POWER8" option to QEMU (which is currently using POWER7
for the "pseries" machine by default). Due to this reason, the
linux-user target already switched to POWER8 a while ago (see commit
de3f1b9841). Since the softmmu target
of course has the same problem, we should switch there to POWER8 for
the newer machine types, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:53 +11:00
Thomas Huth
ef6c47f1d7 tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe test
SLOF is unfortunately quite slow when running with TCG, so
the pxe test is also performing rather slow here. By using
"-nodefaults" we can disable some devices (vscsi) that we
are not interested in here, so that SLOF does not have to
scan them during boot and thus starts up a little bit faster.
The ppc64 pxe-test now only takes 27 seconds on my laptop
instead of 33 seconds.
The "-nodefaults" flag seems to work fine for the x86 tests,
too, so it is added here unconditionally here (though there
is no speed-up on x86 by using this flag).

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:53 +11:00
Greg Kurz
e17a87792d spapr: fix check of cpu alias name in spapr_get_cpu_core_type()
If the user passes an alias name and a property to -cpu, QEMU fails to
find the CPU definition and exits.

$ qemu-system-ppc64 -cpu POWER8E,compat=power7
qemu-system-ppc64: Unable to find sPAPR CPU Core definition

This happens because spapr_get_cpu_core_type() passes the full string from
the command line (i.e. "POWER8E,compat=power7") to ppc_cpu_lookup_alias(),
instead of the alias name piece only (i.e. "POWER8E").

The fix is to pass model_pieces[0] to ppc_cpu_lookup_alias().

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:53 +11:00
Laurent Vivier
aa9026fd5e tests: enable ohci/uhci/xhci tests on PPC64
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:53 +11:00
Laurent Vivier
61ae5cf3a2 libqos: use generic qtest_shutdown()
Machine specific shutdown function can be registered by
the machine specific qtest_XXX_boot() if needed.

So we will not have to test twice the architecture (on boot and on
shutdown) if the test can be run on several architectures.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:53 +11:00
Laurent Vivier
2ecd7e2f25 libqos: add PCI management in qtest_vboot()/qtest_shutdown()
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:53 +11:00
Laurent Vivier
cf716b31cb libqos: add PPC64 PCI support
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
[dwg: Fixed build problem on 32-bit hosts]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06 16:15:40 +11:00
Nikunj A Dadhania
2020b67d85 target-ppc: fix vmx instruction type/type2
A few of the new instructions added inadvertently changed the type of
old instruction(PPC_ALTIVEC) to PPC2_ALTIVEC_207 in the dual form
declaration.

commit: b5d569a1 (target-ppc: add vector extract instructions)
commit: e7b1e06f (target-ppc: add vector insert instructions)
commit: 3aa56a19 (target-ppc: add vector compare not equal instructions)

New ISA 3.0 instructions added:
    vextractub     PPC_NONE     PPC2_ISA300
    vextractuh     PPC_NONE     PPC2_ISA300
    vextractuw     PPC_NONE     PPC2_ISA300
    vinsertb       PPC_NONE     PPC2_ISA300
    vinserth       PPC_NONE     PPC2_ISA300
    vinsertw       PPC_NONE     PPC2_ISA300
    vcmpneb        PPC_NONE     PPC2_ISA300
    vcmpneh        PPC_NONE     PPC2_ISA300
    vcmpnew        PPC_NONE     PPC2_ISA300

Affected older instructions:
    vspltb         PPC_ALTIVEC  PPC_NONE
    vsplth         PPC_ALTIVEC  PPC_NONE
    vspltw         PPC_ALTIVEC  PPC_NONE
    vspltisb       PPC_ALTIVEC  PPC_NONE
    vspltish       PPC_ALTIVEC  PPC_NONE
    vspltisw       PPC_ALTIVEC  PPC_NONE
    vcmpequb       PPC_ALTIVEC  PPC_NONE
    vcmpequh       PPC_ALTIVEC  PPC_NONE
    vcmpequw       PPC_ALTIVEC  PPC_NONE

Change the instruction type/type2 for the older instructions back to
what it was(PPC_ALTIVEC).

CC: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Reported-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
7f516c9675 target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too
Transactional memory is also supported on POWER8 KVM-HV if the
KVM_CAP_PPC_HTM is not available in the kernel yet, so add a hack
to allow TM here, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
96c9cff0ab target-ppc/kvm: Add a wrapper function to check for KVM-PR
It makes more sense if we have a proper function to check
for KVM-PR than to check for the GET_PVINFO extension all
over the place.

Signed-off-by: Thomas Huth <thuth@redhat.com>
[dwg: Expanded a comment to discourage overuse of this function]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
835c42d34e MAINTAINERS: Add two more ppc related files
The file hw/intc/heathrow_pic.c belongs to the Old World Mac
machine, and pc-bios/ppc_rom.bin belongs to the PReP machine.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Ravi Bangoria
1a136cdce0 target-ppc: Implement mtvsrws instruction
mtvsrws: Move To VSR Word & Splat

Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Rajalakshmi Srinivasaraghavan
4879538c99 target-ppc: add vclzlsbb/vctzlsbb instructions
The following vector instructions are added from ISA 3.0.

vclzlsbb - Vector Count Leading Zero Least-Significant Bits Byte
vctzlsbb - Vector Count Trailing Zero Least-Significant Bits Byte

Signed-off-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Rajalakshmi Srinivasaraghavan
0fa5936434 target-ppc: add vector compare not equal instructions
The following vector compare not equal instructions are added from ISA 3.0.

vcmpneb - Vector Compare Not Equal Byte
vcmpneh - Vector Compare Not Equal Halfword
vcmpnew - Vector Compare Not Equal Word

Signed-off-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Avinesh Kumar
4aaefd93b9 target-ppc: fix invalid mask - cmpl, bctar
cmpl:  invalid bit mask should be 0x00400001
bctar: invalid bit mask should be 0x0000E000

Signed-off-by: Avinesh Kumar <avinesku@linux.vnet.ibm.com>
Signed-off-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Nikunj A Dadhania
f3333ce0b5 target-ppc: add stxvb16x instruction
stxvb16x: Store VSX Vector Byte*16

Vector (8-bit elements):
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

Store results in following:

Little/Big-endian Storage
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Nikunj A Dadhania
8ee38face9 target-ppc: add lxvb16x instruction
lxvb16x: Load VSX Vector Byte*16

Little/Big-endian Storage
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

Vector load results in (8-bit elements):
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Nikunj A Dadhania
0b8ac648ec target-ppc: add stxvh8x instruction
stxvh8x:  Store VSX Vector Halfword*8

Vector (16-bit elements):
+------+------+------+------+------+------+------+------+
| 0001 | 1011 | 2021 | 3031 | 4041 | 5051 | 6061 | 7071 |
+------+------+------+------+------+------+------+------+

Store results in following:

Big-Endian Storage
+-------+-------+-------+-------+-------+-------+-------+-------+
| 00 01 | 10 11 | 20 21 | 30 31 | 40 41 | 50 51 | 60 61 | 70 71 |
+-------+-------+-------+-------+-------+-------+-------+-------+

Little-Endian Storage
+-------+-------+-------+-------+-------+-------+-------+-------+
| 01 00 | 11 10 | 21 20 | 31 30 | 41 40 | 51 50 | 61 60 | 71 70 |
+-------+-------+-------+-------+-------+-------+-------+-------+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
[dwg: Tweak commit description]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Nikunj A Dadhania
1c0744190c target-ppc: add lxvh8x instruction
lxvh8x:  Load VSX Vector Halfword*8

Big-Endian Storage
+-------+-------+-------+-------+-------+-------+-------+-------+
| 00 01 | 10 11 | 20 21 | 30 31 | 40 41 | 50 51 | 60 61 | 70 71 |
+-------+-------+-------+-------+-------+-------+-------+-------+

Little-Endian Storage
+-------+-------+-------+-------+-------+-------+-------+-------+
| 01 00 | 11 10 | 21 20 | 31 30 | 41 40 | 51 50 | 61 60 | 71 70 |
+-------+-------+-------+-------+-------+-------+-------+-------+

Vector load results in (16-bit elements):
+------+------+------+------+------+------+------+------+
| 0001 | 1011 | 2021 | 3031 | 4041 | 5051 | 6061 | 7071 |
+------+------+------+------+------+------+------+------+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
[dwg: Tweak to commit description]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Nikunj A Dadhania
0aec21d8fa target-ppc: improve stxvw4x implementation
Manipulate data and store 8bytes instead of 4bytes.

Vector (32-bit elements):
+----------+----------+----------+----------+
| 00112233 | 44556677 | 8899AABB | CCDDEEFF |
+----------+----------+----------+----------+

Store results in following:

Big-Endian Storage
+-------------+-------------+-------------+-------------+
| 00 11 22 33 | 44 55 66 77 | 88 99 AA BB | CC DD EE FF |
+-------------+-------------+-------------+-------------+

Little-Endian Storage
+-------------+-------------+-------------+-------------+
| 33 22 11 00 | 77 66 55 44 | BB AA 99 88 | FF EE DD CC |
+-------------+-------------+-------------+-------------+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Nikunj A Dadhania
f34001ec96 target-ppc: improve lxvw4x implementation
Load 8byte at a time and manipulate.

Big-Endian Storage
+-------------+-------------+-------------+-------------+
| 00 11 22 33 | 44 55 66 77 | 88 99 AA BB | CC DD EE FF |
+-------------+-------------+-------------+-------------+

Little-Endian Storage
+-------------+-------------+-------------+-------------+
| 33 22 11 00 | 77 66 55 44 | BB AA 99 88 | FF EE DD CC |
+-------------+-------------+-------------+-------------+

Vector load results in (32-bit elements):
+----------+----------+----------+----------+
| 00112233 | 44556677 | 8899AABB | CCDDEEFF |
+----------+----------+----------+----------+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
[dwg: Slight tweak to commit description]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Ravi Bangoria
b9731075b3 target-ppc: Implement mtvsrdd instruction
mtvsrdd: Move To VSR Double Doubleword

Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Ravi Bangoria
6358320228 target-ppc: Implement mfvsrld instruction
mfvsrld: Move From VSR Lower Doubleword

Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
bac3bf287a ppc: Check the availability of transactional memory
KVM-PR currently does not support transactional memory, and the
implementation in TCG is just a fake. We should not announce TM
support in the ibm,pa-features property when running on such a
system, so disable it by default and only enable it if the KVM
implementation supports it (i.e. recent versions of KVM-HV).
These changes are based on some earlier work from Anton Blanchard
(thanks!).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
4cbec30d76 hw/ppc/spapr: Fix the selection of the processor features
The current code uses pa_features_206 for POWERPC_MMU_2_06, and
for everything else, it uses pa_features_207. This is bad in some
cases because there is also a "degraded" MMU version of ISA 2.06,
called POWERPC_MMU_2_06a, which should of course use the flags for
2.06 instead. And there is also the possibility that the user runs
the pseries machine with a POWER5+ or even 970 processor. In that
case we certainly do not want to set the flags for 2.07, and rather
simply skip the setting of the pa-features property instead.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
230bf719d3 hw/ppc/spapr: Move code related to "ibm,pa-features" to a separate function
The function spapr_populate_cpu_dt() has become quite big
already, and since we likely have to extend the pa-features
property for every new processor generation, it is nicer
if we put the related code into a separate function.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
David Gibson
db800b21d8 pseries: Add 2.8 machine type, set up compatibility macros
Now that 2.7 is released, create the pseries-2.8 machine type and add the
boilerplate compatiblity macro stuff.  There's nothing new to put into the
2.7 compatiliby properties yet, but we'll need something eventually, so
we might as well get it ready now.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
Thomas Huth
1485ef1c45 tests: Test IPv6 and ppc64 in the PXE tester
The firmware of the pseries machine, SLOF, is able to load files via
IPv6 networking, too. So to test both, network bootloading on ppc64
and IPv6 (via Slirp) , let's add some PXE tests for this environment,
too. Since we can not use the normal x86 boot sector for network boot
loading, we use a simple Forth script on ppc64 instead.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00