Commit Graph

41792 Commits

Author SHA1 Message Date
Marc-André Lureau
c246a62f26 msix: add VMSTATE_MSIX_TEST
ivshmem is going to use MSIX state conditionally.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
2015-10-24 18:02:48 +02:00
Marc-André Lureau
1ad78ea51a char: add qemu_chr_free()
If a chardev is allowed to be created outside of QMP, then it must be
also possible to free it. This is useful for ivshmem that creates
chardev anonymously and must be able to free them.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
2015-10-24 18:02:48 +02:00
Andreas Färber
bbfc2efefe tests: Add ivshmem qtest
Note that it launches two instances, as sharing memory is the purpose of
ivshmem.

Cc: Cam Macdonell <cam@cs.ualberta.ca>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[ Remove Nahanni codename, add test to pci set - Marc-André ]
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2015-10-24 18:02:48 +02:00
Marc-André Lureau
dd054be35f config: enable ivshmem on POSIX
ivshmem doesn't actually require kvm, so enable it when POSIX is
enabled. (it is required however when ioeventfd is enabled)

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2015-10-24 18:02:47 +02:00
Peter Maydell
bc79082e4c X86 queue, 2015-10-23
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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging

X86 queue, 2015-10-23

# gpg: Signature made Fri 23 Oct 2015 16:30:58 BST using RSA key ID 984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"

* remotes/ehabkost/tags/x86-pull-request:
  vl: trivial: minor tweaks to a max-cpu error msg
  target-i386: Use 1UL for bit shift
  target-i386: Add DE to TCG_FEATURES
  target-i386: Ensure always-1 bits on DR6 can't be cleared
  target-i386: Check CR4[DE] for processing DR4/DR5
  target-i386: Handle I/O breakpoints
  target-i386: Optimize setting dr[0-3]
  target-i386: Move hw_*breakpoint_* functions
  target-i386: Ensure bit 10 on DR7 is never cleared
  target-i386: Re-introduce optimal breakpoint removal
  target-i386: Introduce cpu_x86_update_dr7
  target-i386: Disable cache info passthrough by default
  target-i386: allow any alignment for SMBASE

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-23 16:35:43 +01:00
Andrew Jones
31bfa2a400 vl: trivial: minor tweaks to a max-cpu error msg
Signed-off-by: Andrew Jones <drjones@redhat.com>
2015-10-23 13:11:52 -02:00
Eduardo Habkost
72370dc114 target-i386: Use 1UL for bit shift
Fix undefined behavior detected by clang runtime check:

  qemu/target-i386/cpu.c:1494:15: runtime error:
    left shift of 1 by 31 places cannot be represented in type 'int'

While doing that, add extra parenthesis for clarity.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 13:07:27 -02:00
Eduardo Habkost
b6c5a6f021 target-i386: Add DE to TCG_FEATURES
Now DE is supported by TCG so it can be enabled in CPUID bits.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Eduardo Habkost
462f8ed1f1 target-i386: Ensure always-1 bits on DR6 can't be cleared
Bits 4-11 and 16-31 on DR6 are documented as always 1, so ensure they
can't be cleared by software.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Richard Henderson
d005233923 target-i386: Check CR4[DE] for processing DR4/DR5
Introduce helper_get_dr so that we don't have to put CR4[DE]
into the scarce HFLAGS resource.  At the same time, rename
helper_movl_drN_T0 to helper_set_dr and set the helper flags.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Eduardo Habkost
5223a9423c target-i386: Handle I/O breakpoints
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Richard Henderson
7525b55051 target-i386: Optimize setting dr[0-3]
If the debug register is not enabled, we need
do nothing besides update the register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Richard Henderson
696ad9e4b2 target-i386: Move hw_*breakpoint_* functions
They're only used from bpt_helper.c now.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Eduardo Habkost
9055330ffb target-i386: Ensure bit 10 on DR7 is never cleared
Bit 10 of DR7 is documented as always set to 1, so ensure that's
always the case.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Richard Henderson
36eb6e0967 target-i386: Re-introduce optimal breakpoint removal
Before the last patch, we had an efficient loop that disabled
local breakpoints on task switch.  Re-add that, but in a more
general way that handles changes to the global enable bits too.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Richard Henderson
93d00d0fbe target-i386: Introduce cpu_x86_update_dr7
This moves the last of the iteration over breakpoints into
the bpt_helper.c file.  This also allows us to make several
breakpoint functions static.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Eduardo Habkost
e265e3e480 target-i386: Disable cache info passthrough by default
The host cache information may not make sense for the guest if the VM
CPU topology doesn't match the host CPU topology. To make sure we won't
expose broken cache information to the guest, disable cache info
passthrough by default, and add a new "host-cache-info" property that
can be used to enable the old behavior for users that really need it.

Cc: Benoît Canet <benoit@irqsave.net>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:27 -02:00
Paolo Bonzini
dd75d4fcb4 target-i386: allow any alignment for SMBASE
Processors up to the Pentium (says Bochs---I do not have old enough
manuals) require a 32KiB alignment for the SMBASE, but newer processors
do not need that, and Tiano Core will use non-aligned SMBASE values.

Reported-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-23 12:59:26 -02:00
Peter Maydell
1e700f4c6c qemu-ga patch queue
* unbreak qga-test unit test on travis-ci systems by not assuming a
   disk-based filesystem must be present
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Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2015-10-23-tag' into staging

qemu-ga patch queue

* unbreak qga-test unit test on travis-ci systems by not assuming a
  disk-based filesystem must be present

# gpg: Signature made Fri 23 Oct 2015 15:01:47 BST using RSA key ID F108B584
# gpg: Good signature from "Michael Roth <flukshun@gmail.com>"
# gpg:                 aka "Michael Roth <mdroth@utexas.edu>"
# gpg:                 aka "Michael Roth <mdroth@linux.vnet.ibm.com>"

* remotes/mdroth/tags/qga-pull-2015-10-23-tag:
  tests: test-qga, loosen assumptions about host filesystems

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-23 15:55:50 +01:00
Michael Roth
b3e9e584fc tests: test-qga, loosen assumptions about host filesystems
QGA skips pseudo-filesystems when querying filesystems via
guest-get-fsinfo. On some hosts, such as travis-ci which uses
containers with simfs filesystems, QGA might not report *any*
filesystems. Our test case assumes there would be at least one,
leading to false error messages in these situations.

Instead, sanity-check values iff we get at least one filesystem.

Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2015-10-23 08:57:45 -05:00
Peter Maydell
147482ae35 ppc patch queue - 2015-10-23
sPAPR highlights:
   * Allow VFIO devices on the spapr-pci-host-bridge
   * Allow virtio VGA
   * Safer handling of HTAB allocation
   * ibm,pa-features device tree property
 
 non-sPAPR highlights:
   * Categorization of many ppc specific devices in help output
   * Tweaks to MMU type constants
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151023' into staging

ppc patch queue - 2015-10-23

sPAPR highlights:
  * Allow VFIO devices on the spapr-pci-host-bridge
  * Allow virtio VGA
  * Safer handling of HTAB allocation
  * ibm,pa-features device tree property

non-sPAPR highlights:
  * Categorization of many ppc specific devices in help output
  * Tweaks to MMU type constants

# gpg: Signature made Fri 23 Oct 2015 07:27:56 BST using RSA key ID 20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-next-20151023: (21 commits)
  prep: do not use CPU_LOG_IOPORT, convert to tracepoints
  openpic: add to misc category
  macio-nvram: add to misc category
  macio: add to bridge category
  uninorth: add to bridge category
  macio-ide: add to storage category
  cuda: add to bridge category
  grackle: add to bridge category
  escc: add to input category
  cmd646: add to storage category
  adb: add to input category
  ppc/spapr: Add "ibm,pa-features" property to the device-tree
  ppc: Add mmu_model defines for arch 2.03 and 2.07
  hw/scsi/spapr_vscsi: Remove superfluous memset
  spapr_pci: Allow VFIO devices to work on the normal PCI host bridge
  spapr_iommu: Provide a function to switch a TCE table to allowing VFIO
  spapr_iommu: Rename vfio_accel parameter
  spapr_pci: Allow PCI host bridge DMA window to be configured
  spapr: Add "slb-size" property to CPU device tree nodes
  spapr: Abort when HTAB of requested size isn't allocated
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-23 13:09:09 +01:00
Peter Maydell
431429a5b8 Merge qcrypto-fixes 2015/10/22
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Merge remote-tracking branch 'remotes/berrange/tags/qcrypto-fixes-pull-20151022-2' into staging

Merge qcrypto-fixes 2015/10/22

# gpg: Signature made Thu 22 Oct 2015 19:03:45 BST using RSA key ID 15104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>"

* remotes/berrange/tags/qcrypto-fixes-pull-20151022-2:
  configure: avoid polluting global CFLAGS with tasn1 flags
  crypto: add sanity checking of plaintext/ciphertext length
  crypto: don't let builtin aes crash if no IV is provided
  crypto: allow use of nettle/gcrypt to be selected explicitly

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-23 12:09:02 +01:00
Peter Maydell
dfbe0642ef vhost: build fix
Fix build breakages when using older gcc.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

vhost: build fix

Fix build breakages when using older gcc.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Thu 22 Oct 2015 20:36:07 BST using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"

* remotes/mst/tags/for_upstream:
  vhost-user: fix up rhel6 build

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-23 10:24:08 +01:00
Paolo Bonzini
659f7f6556 prep: do not use CPU_LOG_IOPORT, convert to tracepoints
These messages are disabled by default; a perfect usecase for tracepoints.
Convert them over.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:38:28 +11:00
Laurent Vivier
29f8dd66e8 openpic: add to misc category
openpic is a programmable interrupt controller, so
add it to the misc category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
175fe9e7c8 macio-nvram: add to misc category
The macio nvram is a non volatile RAM, so add it
the misc category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
f9f2a9f26f macio: add to bridge category
macio is a bridge between the PCI bus and the Mac nvram,
IDE controller and PIC, so add it to the bridge category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
1d16f86a43 uninorth: add to bridge category
Uninorth is the mac99 PCI host controller, so add
it to the bridge category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
3469d9bce8 macio-ide: add to storage category
macio-ide is an IDE controller, so add it
to the storage category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
599d7326c3 cuda: add to bridge category
Cuda is a bridge between PowerMac system bus and the ADB controller,
real-time clock, pram and the power management unit.

So add it to the bridge category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
e16244355f grackle: add to bridge category
Grackle is the PCI host controller of oldworld powermac,
so add it to the bridge category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:18 +11:00
Laurent Vivier
f8d4c07c78 escc: add to input category
ESCC is a serial port controller, so add it
to the input category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:17 +11:00
Laurent Vivier
74623e7369 cmd646: add to storage category
cmd646 is an IDE controller, so add it to the
storage category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:17 +11:00
Laurent Vivier
32f3a8992e adb: add to input category
The Apple Desktop Bus is used to connect a keyboard and a mouse,
so add it to the input category.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:35:17 +11:00
Benjamin Herrenschmidt
90da0d5a70 ppc/spapr: Add "ibm,pa-features" property to the device-tree
LoPAPR defines a "ibm,pa-features" per-CPU device tree property which
describes extended features of the Processor Architecture.

This adds the property to the device tree. At the moment this is the
copy of what pHyp advertises except "I=1 (cache inhibited) Large Pages"
which is enabled for TCG and disabled when running under HV KVM host
with 4K system page size.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: rebased, changed commit log, moved ci_large_pages initialization,
renamed pa_features arrays]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:22:40 +11:00
Benjamin Herrenschmidt
aa4bb58752 ppc: Add mmu_model defines for arch 2.03 and 2.07
This removes unused POWERPC_MMU_2_06a/POWERPC_MMU_2_06d.

This replaces POWERPC_MMU_64B with POWERPC_MMU_2_03 for POWER5+ to be
more explicit about the version of the PowerISA supported.

This defines POWERPC_MMU_2_07 and uses it for the POWER8 CPU family.
This will not have an immediate effect now but it will in the following
patch.

This should cause no behavioural change.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: rebased, changed commit log]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 12:22:40 +11:00
Thomas Huth
a23dec105c hw/scsi/spapr_vscsi: Remove superfluous memset
g_malloc0 already clears the memory, so no need for
the additional memset here.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 10:38:11 +11:00
David Gibson
185181f883 spapr_pci: Allow VFIO devices to work on the normal PCI host bridge
The core VFIO infrastructure more or less allows VFIO devices to work
on any normal guest PCI host bridge (PHB) without extra logic.
However, the "spapr-pci-host-bridge" device (as opposed to the special
"spapr-pci-vfio-host-bridge" device) breaks this by using a partially
KVM accelerated implementation of the guest kernel IOMMU which won't
work with VFIO devices, without additional kernel support.

This patch allows VFIO devices to work on the spapr-pci-host-bridge,
by having it switch off KVM TCE acceleration when a VFIO device is
added to the PHB (either on startup, or by hotplug).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2015-10-23 10:38:10 +11:00
David Gibson
c10325d6f9 spapr_iommu: Provide a function to switch a TCE table to allowing VFIO
Because of the way non-VFIO guest IOMMU operations are KVM accelerated, not
all TCE tables (guest IOMMU contexts) can support VFIO devices.  Currently,
this is decided at creation time.

To support hotplug of VFIO devices, we need to allow a TCE table which
previously didn't allow VFIO devices to be switched so that it can.  This
patch adds an spapr_tce_set_need_vfio() function to do this, by
reallocating the table in userspace if necessary.

Currently this doesn't allow the KVM acceleration to be re-enabled if all
the VFIO devices are removed.  That's an optimization for another time.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2015-10-23 10:38:10 +11:00
David Gibson
6a81dd172c spapr_iommu: Rename vfio_accel parameter
The vfio_accel parameter used when creating a new TCE table (guest IOMMU
context) has a confusing name.  What it really means is whether we need the
TCE table created to be able to support VFIO devices.

VFIO is relevant, because when available we use in-kernel acceleration of
the TCE table, but that may not work with VFIO devices because updates to
the table are handled in kernel, bypass qemu and so don't hit qemu's
infrastructure for keeping the VFIO host IOMMU state in sync with the guest
IOMMU state.

Rename the parameter to "need_vfio" throughout.  This is a cosmetic change,
with no impact on the logic.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2015-10-23 10:38:10 +11:00
David Gibson
f93caaac36 spapr_pci: Allow PCI host bridge DMA window to be configured
At present the PCI host bridge (PHB) for the pseries machine type has a
fixed DMA window from 0..1GB (in PCI address space) which is mapped to real
memory via the PAPR paravirtualized IOMMU.

For better support of VFIO devices, we're going to want to allow for
different configurations of the DMA window.

Eventually we'll want to allow the guest itself to reconfigure the window
via the PAPR dynamic DMA window interface, but as a preliminary this patch
allows the user to reconfigure the window with new properties on the PHB
device.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2015-10-23 10:38:10 +11:00
Thomas Huth
fd5da5c472 spapr: Add "slb-size" property to CPU device tree nodes
According to a commit message in the Linux kernel (see here
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=b60c31d85a2a
for example), the name of the property that carries the information
about the number of SLB entries should be called "slb-size", and
not "ibm,slb-size". The Linux kernel can deal with both names, but
to be on the safe side we should support the official name, too.

[Now that LoPAPR is public, the relevant requirement can be found in
section C.6.1.8 --dwg]

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 10:38:10 +11:00
Bharata B Rao
7735fedaf4 spapr: Abort when HTAB of requested size isn't allocated
Terminate the guest when HTAB of requested size isn't allocated by
the host.

When memory hotplug is attempted on a guest that has booted with
less than requested HTAB size, the guest kernel will not be able
to gracefully fail the hotplug request. This patch will ensure that
we never end up in a situation where memory hotplug fails due to
less than requested HTAB size.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 10:38:10 +11:00
Bharata B Rao
b817772a25 spapr: Allocate HTAB from machine init
Allocate HTAB from ppc_spapr_init() so that we can abort the guest
if requested HTAB size is't allocated by the host. However retain the
htab reset call in spapr_reset_htab() so that HTAB gets reset (and
not allocated) during machine reset.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-10-23 10:38:10 +11:00
Michael S. Tsirkin
7f4a930e64 vhost-user: fix up rhel6 build
Build on RHEL6 fails:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=42875

Apparently unnamed unions couldn't use C99  named field initializers.
Let's just name the payload union field.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-10-22 22:34:59 +03:00
Daniel P. Berrange
9024603776 configure: avoid polluting global CFLAGS with tasn1 flags
The previous commit

  commit 9a2fd4347c
  Author: Daniel P. Berrange <berrange@redhat.com>
  Date:   Mon Apr 13 14:01:39 2015 +0100

    crypto: add sanity checking of TLS x509 credentials

defined new variables $TEST_LIBS and $TEST_CFLAGS and
used them in tests/Makefile to augment $LIBS and $CFLAGS.

Unfortunately this overlooks the fact that tests/Makefile
is not executed via recursive-make, it is just pulled into
the top level Makefile via an include statement. So rather
than just augmenting the compiler/linker flags for tests
it polluted the global flags.

This is thought to be behind a reported failure when
building the pixman module as a sub-module, since global
$CFLAGS are passed down to configure in pixman.

This change removes the $TEST_LIBS and $TEST_CFLAGS
replacing them with $TASN1_LIBS and $TASN1_CFLAGS,
setting only against specific objects/executables
that need them.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2015-10-22 19:03:08 +01:00
Daniel P. Berrange
3a661f1eab crypto: add sanity checking of plaintext/ciphertext length
When encrypting/decrypting data, the plaintext/ciphertext
buffers are required to be a multiple of the cipher block
size. If this is not done, nettle will abort and gcrypt
will report an error. To get consistent behaviour add
explicit checks upfront for the buffer sizes.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2015-10-22 19:03:08 +01:00
Daniel P. Berrange
eb2a770b17 crypto: don't let builtin aes crash if no IV is provided
If no IV is provided, then use a default IV of all-zeros
instead of crashing. This gives parity with gcrypt and
nettle backends.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2015-10-22 19:03:08 +01:00
Daniel P. Berrange
91bfcdb01d crypto: allow use of nettle/gcrypt to be selected explicitly
Currently the choice of whether to use nettle or gcrypt is
made based on what gnutls is linked to. There are times
when it is desirable to be able to force build against a
specific library. For example, if testing changes to QEMU's
crypto code all 3 possible backends need to be checked
regardless of what the local gnutls uses.

It is also desirable to be able to enable nettle/gcrypt
for cipher/hash algorithms, without enabling gnutls
for TLS support.

This gives two new configure flags, which allow the
following possibilities

Automatically determine nettle vs gcrypt from what
gnutls links to (recommended to minimize number of
crypto libraries linked to)

 ./configure

Automatically determine nettle vs gcrypt based on
which is installed

 ./configure --disable-gnutls

Force use of nettle

 ./configure --enable-nettle

Force use of gcrypt

 ./configure --enable-gcrypt

Force use of built-in AES & crippled-DES

 ./configure --disable-nettle --disable-gcrypt

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2015-10-22 19:03:07 +01:00
Peter Maydell
6a6739de51 Collected tcg backend patches
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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151021' into staging

Collected tcg backend patches

# gpg: Signature made Wed 21 Oct 2015 22:34:28 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"

* remotes/rth/tags/pull-tcg-20151021:
  cpu-exec: Add "nochain" debug flag
  tcg/mips: Support r6 SEL{NE, EQ}Z instead of MOVN/MOVZ
  tcg/mips: Support r6 multiply/divide encodings
  tcg/mips: Support r6 JR encoding
  tcg/mips: Add use_mips32r6_instructions definition
  disas/mips: Add R6 jr/jr.hb to disassembler
  tcg-opc.h: Simplify insn_start def
  tcg/ppc: Prefer mask over andi.
  tcg/ppc: Revise goto_tb implementation
  tcg/ppc: Adjust exit_tb for change in prologue placement

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-22 18:01:53 +01:00