mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
25,772 Commits 50 Branches 394 Tags 404 MiB
bd4a47330e
Commit Graph

418 Commits

Author SHA1 Message Date
Baojun Wang
fbe73008f2 ppc tcg: fix wrong bit/mask of wrteei 
Signed-off-by: Baojun Wang <wangbj@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2009-07-13 01:51:17 +02:00
Nathan Froyd
33890b3e0d target-ppc: fix evmergelo and evmergelohi 
For 32-bit PPC targets, we translated:

evmergelo rX, rX, rY

as:

rX-lo = rY-lo
rX-hi = rX-lo

which is wrong, because we should be transferring rX-lo first.  This
problem is fixed by swapping the order in which we write the parts of
rX.

Similarly, we translated:

evmergelohi rX, rX, rY

as:

rX-lo = rY-hi
rX-hi = rX-lo

In this case, we can't swap the assignment statements, because that
would just cause problems for:

evmergelohi rX, rY, rX

Instead, we detect the first case and save rX-lo in a temporary
variable:

tmp = rX-lo
rX-lo = rY-hi
rX-hi = tmp

These problems don't occur on PPC64 targets because we don't split the
SPE registers into hi/lo parts for such targets.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
 2009-07-12 23:36:21 +02:00
malc
d2e9fd8f70 Apply TCGV_UNUSED on variables that GCC mistakenly thinks can be used 
uninitialized
 2009-06-20 05:51:47 +04:00
Blue Swirl
5c55ff99fa Replace ELF section hack with normal table 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-06-17 15:22:31 +00:00
Blue Swirl
2e6100507a Concentrate rest of table entries to top 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-06-17 15:22:24 +00:00
Blue Swirl
5462327761 Concentrate most table entries to top 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-06-17 15:22:19 +00:00
Blue Swirl
e8eaa2c012 Clean up GEN_HANDLER2 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-06-17 15:22:14 +00:00
Blue Swirl
99e300ef3f Clean up GEN_HANDLER 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-06-17 15:22:09 +00:00
Nathan Froyd
c29b735c50 target-ppc: expose cpu capability flags 
Do this so other pieces of code can make decisions based on the
capabilities of the CPU we're emulating.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: malc <av1474@comtv.ru>
 2009-05-16 01:36:08 +04:00
blueswir1
2dc766dafc Fix ppc-softmmu warnings on OpenBSD host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7099 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-04-13 16:06:19 +00:00
aurel32
1b530a6dfc Add new command line option -singlestep for tcg single stepping. 
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-04-05 20:08:59 +00:00
aurel32
af4b6c54c1 target-ppc: avoid nop to override next instruction 
While searching PC, always store the pc of a new instruction.
Instructions that didn't generate tcg code (such as nop) prevented the
next one to be referenced.

Based on patch for target-alpha, r6930.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6931 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-29 01:18:03 +00:00
aurel32
fa3966a3dc target-ppc: use the new bswap* TCG ops 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6835 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-13 09:35:34 +00:00
aurel32
66896cb803 tcg: rename bswap_i32/i64 functions 
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-13 09:34:48 +00:00
aurel32
651721b2a5 targe-ppc: optimize mfcr and mtcrf 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6793 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-09 18:50:24 +00:00
aurel32
0497d2f4e4 Fix mfcr on ppc64-softmmu 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6758 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-07 20:57:47 +00:00
blueswir1
4911012d26 Implement mtfsf.L encoding 
Mtfsf can have the L bit set, so all the register contents get stored
in FPSCR. Linux uses it, so let's implement it.

Signed-off-by: Alexander Graf <alex@csgraf.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6753 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-07 20:55:31 +00:00
blueswir1
bf14b1cef1 Implment tlbiel 
Linux uses tlbiel to flush TLB entries in PPC64 mode. This special TLB
flush opcode only flushes an entry for the CPU it runs on, not across
all CPUs in the system.

Signed-off-by: Alexander Graf <alex@csgraf.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6749 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-07 20:52:22 +00:00
blueswir1
f6b868fc58 Implement slbmte 
In order to modify SLB entries on recent PPC64 machines, the slbmte
instruction is used.

This patch implements the slbmte instruction and makes the "bridge"
mode code use the slb set functions, so we can move the SLB into
the CPU struct later.

This is required for Linux to run on PPC64.

Signed-off-by: Alexander Graf <alex@csgraf.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6747 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-07 20:50:01 +00:00
blueswir1
50773fd23d Sparse fixes: add extern to ELF opcode tables to avoid warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6740 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-07 15:59:09 +00:00
aurel32
0cfe11ea5f target-ppc: improve mfcr/mtcrf 
- use ctz32 instead of ffs - 1
- small optimisation of mtcrf
- add the name of both opcodes

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6669 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-03 06:12:14 +00:00
malc
8dd640e49d Fix mtcrf/mfcr 
Noticed by Alexander Graf

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6667 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-02 22:39:39 +00:00
blueswir1
a457e7ee3d Fix typo in gen_qemu_ld32s 
When the CPU is in little endian mode, it should load values from RAM
in byte swapped manner. This check is in all the ld and st functions,
but misspelled in gen_qemu_ld32s.

This patch fixes the misspelling and makes ppc64 Linux happier.

Signed-off-by: Alexander Graf <alex@csgraf.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6654 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-28 08:25:29 +00:00
blueswir1
5518f3a636 Fix branch debugging 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6629 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-19 20:17:09 +00:00
aurel32
40569b7edc target-ppc: Model SPE floating-point instructions more accurately 
Single-precision and double-precision floating-point instructions should
be separated into their own categories, since some chips only support
single-precision instructions.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6575 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:49:50 +00:00
aurel32
071fc3b1cd target-ppc: Add vrsqrtefp instruction 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6574 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:49:40 +00:00
aurel32
bdfbac3512 target-ppc: Add vrefp instruction 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6573 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:49:29 +00:00
aurel32
875b31db7f target-ppc: Add vct{u,s}xs instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6572 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:49:20 +00:00
aurel32
819ca12127 target-ppc: Add vcmp{eq, ge, gt, b}fp{, .} instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6571 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:49:10 +00:00
aurel32
35cf7c7e18 target-ppc: Add vmaddfp and vnmsubfp instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6570 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:48:59 +00:00
aurel32
56fdd213ef target-ppc: Add v{add,sub}fp instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6569 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:48:51 +00:00
aurel32
1536ff641f target-ppc: Add v{max,min}fp instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6568 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-09 16:48:39 +00:00
aurel32
b580763f86 target-ppc: change instruction name vrlogefp into vlogefp 
Thanks to Nathan Froyd for noticing that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6532 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-05 22:33:36 +00:00
aurel32
f586ce09e2 target-ppc: add vrlogefp instruction 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6519 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-05 13:42:57 +00:00
aurel32
e140632e87 Add vcf{u,s}x instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6513 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-04 13:52:17 +00:00
aurel32
f6b1964548 Add vrfi{m,n,p,z} instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6512 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-04 13:52:03 +00:00
aurel32
6e87b7c7bf Make mtvscr use a helper 
Do this so we can set float statuses once per mtvscr, rather than once
per Altivec instruction.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6508 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-03 19:56:09 +00:00
aurel32
fce5ecb780 Fix compilation of PPC64 targets with DEBUG_TCGV enabled 
The attached patch fixes compilation of PPC64 targets with DEBUG_TCGV
enabled.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6502 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-02-03 19:55:13 +00:00
aliguori
8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) 
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 22:36:53 +00:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros 
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 22:34:14 +00:00
aliguori
d12d51d5ba Clean up debugging code #ifdefs (Eduardo Habkost) 
Use macros to avoid #ifdefs on debugging code.

This patch doesn't try to merge logging macros from different files,
but just unify the debugging code #ifdefs onto a macro on each file. A
further cleanup can unify the debugging macros on a common header, later

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6332 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 21:48:06 +00:00
aurel32
1b6e5f9906 target-ppc: fix wrteei instruction 
Patch by Andrew May

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6308 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-14 19:40:54 +00:00
aurel32
ae1c1a3d68 target-ppc: add altivec cache instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6275 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-12 21:33:02 +00:00
aurel32
5ab09f3349 Add v{add, sub}{s, u}{b, h, w}s instructions 
Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6254 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-08 23:19:50 +00:00
aurel32
c026766b15 Add vspltis{b,h,w} instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6238 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-08 18:54:57 +00:00
aurel32
d9430add63 Add vs{l,r} instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6237 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-08 18:54:48 +00:00
aurel32
1add6e234a Add vcmpequ{b, h, w} and vcmpgt{s, u}{b, h, w} instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6236 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-08 18:54:38 +00:00
aurel32
0cbcd90636 Add GEN_VXRFORM{,1} macros for subsequent instructions 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6235 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-08 18:54:26 +00:00
aurel32
785f451b62 target-ppc: Add m{f,t}vscr instructions. 
Based on a patch by Nathan Froyd <froydnj@codesourcery.com>

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6190 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:51:59 +00:00
aurel32
8142cddda2 Add vsumsws, vsum2sws, and vsum4{sbs, shs,ubs} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6189 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:13:21 +00:00
aurel32
cbfb6ae9b3 Add {l,st}ve{b,h,w}x instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6188 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:13:10 +00:00
aurel32
bcd2ee23ea Add vmladduhm instruction. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6187 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:13:00 +00:00
aurel32
eae07261c7 Add vmsumsh{m,s} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6186 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:12:49 +00:00
aurel32
4d9903b6c3 Add vmsumuh{m,s} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6185 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:12:39 +00:00
aurel32
b161ae2766 Add vmh{,r}addshs instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6184 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:12:29 +00:00
aurel32
1dd9ffb969 Add vpkpx instruction. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6183 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:12:19 +00:00
aurel32
5335a145a1 Add vpks{h, w}{s, u}s, vpku{h, w}us, and vpku{h, w}um instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6182 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:12:09 +00:00
aurel32
d1258698f5 Add vsel and vperm instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6180 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:11:49 +00:00
aurel32
b04ae9811a Add vmsum{u,m}bm instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6179 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:11:39 +00:00
aurel32
707cec33f0 Add GEN_VAFORM_PAIRED macro for subsequent instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6178 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:11:29 +00:00
aurel32
6cf1c6e547 Add vupk{h,l}s{b,h} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6177 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:11:20 +00:00
aurel32
79f85c3ae9 Add vupk{h,l}px instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6176 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:11:10 +00:00
aurel32
de5f248499 Add GEN_VXFORM_NOA macro for subsequent instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6175 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:10:59 +00:00
aurel32
e4e6bee787 Add vsplt{b,h,w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6174 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:10:49 +00:00
aurel32
27a4edb310 Add GEN_VXFORM_UIMM macro for subsequent instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6173 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:10:40 +00:00
aurel32
21d215831e Add GEN_VXFORM_SIMM macro for subsequent instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6172 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:10:28 +00:00
aurel32
cd633b10fd Add vsldoi instruction. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6171 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:10:09 +00:00
aurel32
5e1d0985f9 Add vrl{b,h,w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6170 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:09:52 +00:00
aurel32
bf8d8ded57 Add lvs{l,r} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6169 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:09:42 +00:00
aurel32
e343da72b6 Add v{add,sub}cuw instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6168 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:09:31 +00:00
aurel32
7b239bec41 Add vs{l,r}o instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6167 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:09:19 +00:00
aurel32
d79f08096c Add vsl{b,h,w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6166 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:09:08 +00:00
aurel32
07ef34c35e Add vsr{,a}{b,h,w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6165 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:08:58 +00:00
aurel32
2c2779080c Add vmul{e,o}{s,u}{b,h} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6164 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:08:48 +00:00
aurel32
3b43004804 Add vmrg{l,h}{b,h,w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6163 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:08:38 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate 
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:05:52 +00:00
aurel32
e40393399a Add v{min, max}{s, u}{b, h, w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6157 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-03 13:31:58 +00:00
aurel32
fab3cbe901 Add vavg{s,u}{b,h,w} instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6156 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-03 13:31:49 +00:00
aurel32
7872c51c1a Add v{add,sub}u{b,h,w}m instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6155 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-03 13:31:40 +00:00
aurel32
8e27dd6f09 Add GEN_VXFORM macro for subsequent instructions. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6154 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-03 13:31:30 +00:00
aurel32
e4704b3b11 Fix TCG error in gen_avr_ptr. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6152 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-03 13:31:10 +00:00
aurel32
501e23c4e8 target-ppc: fix TGC type mismatch introduced by r6146 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6147 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-03 12:35:38 +00:00
aurel32
df9247b264 tcg_temp_local_new should take no parameter 
This patch removes useless type information in some calls to
tcg_temp_local_new.  It also removes the parameter from the
macro declaration;  if a target has to use a specific non-default
size then it should use tcg_temp_local_new_{i32,i64}.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6146 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-01 14:09:05 +00:00
aurel32
564e571add target-ppc: add gen_avr_ptr function. 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6098 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-18 22:51:31 +00:00
aurel32
7a9b96cf21 target-ppc: add Altivec logical operations 
Use opc2/opc3 instead of one big xo field.  Do this consistency with the
rest of translate.c

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6087 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-18 22:42:58 +00:00
aurel32
eb44b959de target-ppc: update nip before calling an helper in FP instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6045 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:13:39 +00:00
aurel32
330c483bbf target-ppc: fix TCGv type in fcmpu/fcmpo 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6044 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-15 17:13:31 +00:00
aurel32
9a819377d8 target-ppc: fix fcmp{o,u} instructions 
The instructions are specified to update the condition register even if
an error is to be signaled because of NaN input.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6034 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 19:34:09 +00:00
aurel32
b12363e1b7 target-ppc: remove FPRF optimization 
FPRF optimization is totally broken, remove it.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6033 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:59:08 +00:00
aurel32
6e35d5243c target-ppc: fix mtfsb0 and mtfsb1 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6032 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:40:58 +00:00
aurel32
7889270acb target-ppc: display FPSCR in register dump 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6031 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 18:40:49 +00:00
aurel32
2637004698 target-ppc: fix mbar opcode 
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6027 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-14 11:12:20 +00:00
aurel32
a44d2ce18a target-ppc: fix compilation with CONFIG_SOFTFLOAT 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6003 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-13 11:46:27 +00:00
aurel32
e06fcd754e target-ppc: rework exception code 
... also remove two warnings.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:14 +00:00
aurel32
2a3ec4b5b3 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5988 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 22:42:04 +00:00
aurel32
76db3ba44e target-ppc: memory load/store rework 
Rework the memory load/store:
- Unify load/store functions for 32-bit and 64-bit CPU
- Don't swap values twice for bit-reverse load/store functions
  in little endian mode.
- On a 64-bit CPU in 32-bit mode, do the address truncation for
  address computation instead of every load store. Truncate the
  address when incrementing the address (if needed)
- Cache writes to access_types.
- Add a few missing calls to gen_set_access_type()

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5949 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-08 18:11:21 +00:00
aurel32
0c34a5d722 target-ppc: kill a few warnings 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 23:00:00 +00:00
aurel32
e8fc4fa7a1 target-ppc: disable single stepping 
... which left was enabled by mistake.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5918 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 16:23:22 +00:00
aurel32
ec72e276c5 target-ppc: Fix use of uninitialized TCG variable in tlbiva 
Silences a warning about possible unitialized use of t0.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5915 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 15:45:15 +00:00
aurel32
45d827d2d7 target-ppc: convert SPR accesses to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5910 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:40:29 +00:00
aurel32
8983da70c4 target-ppc: remove dead code 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5896 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 22:01:01 +00:00
aurel32
74d37793f4 target-ppc: convert SLB/TLB instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5895 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 21:46:17 +00:00
aurel32
06dca6a7c1 target-ppc: convert dcr load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5893 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 16:37:18 +00:00
aurel32
6527f6ea9c target-ppc: convert msr load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5892 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 13:03:35 +00:00
aurel32
22e0e17337 target-ppc: convert POWER bridge instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-06 12:19:14 +00:00
aurel32
7487953d70 target-ppc: convert POWER shift instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5882 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-05 07:21:44 +00:00
aurel32
54cdcae646 target-ppc: add functions to load/store SPR 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5881 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-05 07:21:31 +00:00
aurel32
ef0d51af1e target-ppc: convert PPC 440 instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5836 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 17:26:29 +00:00
aurel32
d72a19f7bd target-ppc: convert return from interrupt instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5832 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:55 +00:00
aurel32
fa407c030c target-ppc: convert external load/store instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5831 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:47 +00:00
aurel32
cf360a32af target-ppc: convert load/store with reservation instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5830 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:39 +00:00
aurel32
bdb4b68907 target-ppc: convert lscbx instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5829 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:30 +00:00
aurel32
dfbc799d8e target-ppc: convert load/store string instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5828 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:21 +00:00
aurel32
37d269dfc6 target-ppc: convert icbi instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5827 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:13 +00:00
aurel32
799a8c8d0a target-ppc: convert dcbz instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5826 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:24:05 +00:00
aurel32
ff4a62cd81 target-ppc: convert load/store multiple instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5825 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:56 +00:00
aurel32
931ff27258 target-ppc: convert wait instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5824 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:46 +00:00
aurel32
cf02a65c77 target-ppc: convert mfrom instruction to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5823 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:23:35 +00:00
aurel32
0f3955e2d2 target-ppc: convert software TLB instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5819 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-30 16:22:56 +00:00
aurel32
01a4afeb99 target-ppc: convert POWER2 load/store instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5805 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:56 +00:00
aurel32
6a6ae23f3c target-ppc: convert SPE load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5804 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:47 +00:00
aurel32
38d1495201 target-ppc: simplify evsplati and evsplatfi 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5803 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-27 19:30:38 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) 
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-25 22:13:57 +00:00
aurel32
cab3bee2d6 target-ppc: convert trap instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5788 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-24 11:28:19 +00:00
aurel32
fe1e5c53fd target-ppc: convert altivec load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5787 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-24 08:47:21 +00:00
aurel32
a0d7d5a776 target-ppc: convert FPU load/store to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5786 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 16:30:50 +00:00
aurel32
a7859e892b target-ppc: fix access_type usage 
Write env->access_type before a load/store operation instead of relying
on the name of the dyngen operation.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5785 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 16:30:40 +00:00
aurel32
0c8aacd466 target-ppc: include the instruction name in load/store handlers name 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5784 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 16:30:28 +00:00
aurel32
1c97856dcc target-ppc: convert SPE FP ops to TCG 
Including a few bug fixes:
- Don't clear high part for instruction with 32-bit destination
- Fix efscmp* and etstcmp* return value

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5783 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-23 10:54:04 +00:00
aurel32
64adab3fcb target-ppc: convert exceptions generation to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5772 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-22 10:09:17 +00:00
aurel32
0f2f39c234 target-ppc: fix TCG type errors introduced in r5754 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5756 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-19 17:54:49 +00:00
aurel32
af12906f77 target-ppc: convert fp ops to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5754 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-19 16:10:23 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka) 
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 20:07:32 +00:00
aurel32
87006d1378 target-ppc: fix regression introduced by commit 5729 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5733 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 09:32:01 +00:00
pbrook
a7812ae412 TCG variable type checking. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-17 14:43:54 +00:00
aurel32
57951c2742 target-ppc: convert most SPE integer instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5668 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-10 11:10:23 +00:00
aurel32
741a7444a3 target-ppc: fix TCG argument 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5661 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 18:27:28 +00:00
aurel32
a973001797 target-ppc: Remove a few TCG temp variable leaks 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5660 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:36 +00:00
aurel32
ec6469a3b1 target-ppc: fixes for gen_op_neg() 
- Rename to gen_op_arith_neg for consistency with other functions.
- Correctly free TCG temp variable.
- Fix the return value in 64-bit mode in case of overflow.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5659 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:27 +00:00
aurel32
2ef1b120d1 target-ppc: gen_op_arith_divw() & gen_op_arith_divd fixes 
gen_op_arith_divw():
- "deoptimize" gen_op_arith_divw to make it more readable.
- Correctly free TCG temp variable

gen_op_arith_divd():
- Call the right function.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5658 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:19 +00:00
aurel32
1e4c090f7d target-ppc: optimize mullw and make the code more readable 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5657 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:11 +00:00
aurel32
bdc4e053d1 target-ppc: indentation fixes 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5656 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-09 17:27:03 +00:00
aurel32
4870167d04 target-ppc: fix tcg fatal error on i386 host 
It looks like the i386 runs out of registers for allocation due
to too many global registers allocated by the ppc target.

Here is a quick and dirty fix that seems to solve the problem.
This should be considered as temporary.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5648 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-08 08:57:45 +00:00
aurel32
e32ad5c268 target-ppc: fix flags computation for tcg_gen_qemu_st 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5644 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-07 13:48:25 +00:00
aurel32
54843a5861 target-ppc: use the new rotr/rotri instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5608 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-03 07:08:44 +00:00
aurel32
fdce4963ea target-ppc: use the new subfi wrapper 
(...and fix rldnm)

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5600 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:23:14 +00:00
aurel32
0cfe58cd44 target-ppc: simplify slw, srw, sld, srd 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5597 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:45 +00:00
aurel32
fea0c503a0 target-ppc: be more consistent with temp variables naming 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5596 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:34 +00:00
aurel32
4da0033e6e target-ppc: fix srw on 64-bit targets 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5595 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:16 +00:00
aurel32
182608d44c target-ppc: convert 405 MAC instructions to TCG 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5591 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-01 00:54:23 +00:00