b86f59c715
84408 Commits
| Author | SHA1 | Message | Date | |
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Claudio Fontana
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b86f59c715 |
accel: replace struct CpusAccel with AccelOpsClass
This will allow us to centralize the registration of the cpus.c module accelerator operations (in accel/accel-softmmu.c), and trigger it automatically using object hierarchy lookup from the new accel_init_interfaces() initialization step, depending just on which accelerators are available in the code. Rename all tcg-cpus.c, kvm-cpus.c, etc to tcg-accel-ops.c, kvm-accel-ops.c, etc, matching the object type names. Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-18-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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940e43aa30 |
accel: extend AccelState and AccelClass to user-mode
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [claudio: rebased on Richard's splitwx work] Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-17-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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7827168471 |
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions conditional on CONFIG_TCG in code that is included by both common_ss and specific_ss modules. Therefore, what we can do safely to restrict the TCG fields to TCG-only builds, is to move all tcg cpu operations into a separate header file, which is only included by TCG, target-specific code. This leaves just a NULL pointer in the cpu.h for the non-TCG builds. This also tidies up the code in all targets a bit, having all TCG cpu operations neatly contained by a dedicated data struct. Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-16-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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c73bdb35a9 |
cpu: move debug_check_watchpoint to tcg_ops
commit |
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Claudio Fontana
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9ea9087bb4 |
cpu: move adjust_watchpoint_address to tcg_ops
commit
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Claudio Fontana
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79fc8d4511 |
physmem: make watchpoint checking code TCG-only
cpu_check_watchpoint, watchpoint_address_matches are TCG-only. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210204163931.7358-13-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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8535dd702d |
cpu: move do_unaligned_access to tcg_ops
make it consistently SOFTMMU-only. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio: make the field presence in cpu.h unconditional, removing the ifdefs] Message-Id: <20210204163931.7358-12-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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cbc183d2d9 |
cpu: move cc->transaction_failed to tcg_ops
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio: wrap target code around CONFIG_TCG and !CONFIG_USER_ONLY] avoiding its use in headers used by common_ss code (should be poisoned). Note: need to be careful with the use of CONFIG_USER_ONLY, Message-Id: <20210204163931.7358-11-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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0545608056 |
cpu: move cc->do_interrupt to tcg_ops
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210204163931.7358-10-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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853bfef4e6 |
target/arm: do not use cc->do_interrupt for KVM directly
cc->do_interrupt is in theory a TCG callback used in accel/tcg only, to prepare the emulated architecture to take an interrupt as defined in the hardware specifications, but in reality the _do_interrupt style of functions in targets are also occasionally reused by KVM to prepare the architecture state in a similar way where userspace code has identified that it needs to deliver an exception to the guest. In the case of ARM, that includes: 1) the vcpu thread got a SIGBUS indicating a memory error, and we need to deliver a Synchronous External Abort to the guest to let it know about the error. 2) the kernel told us about a debug exception (breakpoint, watchpoint) but it is not for one of QEMU's own gdbstub breakpoints/watchpoints so it must be a breakpoint the guest itself has set up, therefore we need to deliver it to the guest. So in order to reuse code, the same arm_do_interrupt function is used. This is all fine, but we need to avoid calling it using the callback registered in CPUClass, since that one is now TCG-only. Fortunately this is easily solved by replacing calls to CPUClass::do_interrupt() with explicit calls to arm_do_interrupt(). Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210204163931.7358-9-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Eduardo Habkost
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e9ce43e97a |
cpu: Move debug_excp_handler to tcg_ops
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210204163931.7358-8-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Eduardo Habkost
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e124536f37 |
cpu: Move tlb_fill to tcg_ops
[claudio: wrapped target code in CONFIG_TCG] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210204163931.7358-7-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Eduardo Habkost
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48c1a3e303 |
cpu: Move cpu_exec_* to tcg_ops
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [claudio: wrapped target code in CONFIG_TCG] Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210204163931.7358-6-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Eduardo Habkost
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ec62595bab |
cpu: Move synchronize_from_tb() to tcg_ops
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [claudio: wrapped target code in CONFIG_TCG, reworded comments] Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210204163931.7358-5-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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7df5e3d6ad |
accel/tcg: split TCG-only code from cpu_exec_realizefn
move away TCG-only code, make it compile only on TCG. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio: moved the prototypes from hw/core/cpu.h to exec/cpu-all.h] Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-4-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Claudio Fontana
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6a3d2e7c06 |
target/riscv: remove CONFIG_TCG, as it is always TCG
for now only TCG is allowed as an accelerator for riscv, so remove the CONFIG_TCG use. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210204163931.7358-3-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Eduardo Habkost
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e9e51b7154 |
cpu: Introduce TCGCpuOperations struct
The TCG-specific CPU methods will be moved to a separate struct, to make it easier to move accel-specific code outside generic CPU code in the future. Start by moving tcg_initialize(). The new CPUClass.tcg_opts field may eventually become a pointer, but keep it an embedded struct for now, to make code conversion easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [claudio: move TCGCpuOperations inside include/hw/core/cpu.h] Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210204163931.7358-2-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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2f74f45e32 |
tcg/tci: Remove TCG_CONST
Restrict all operands to registers. All constants will be forced into registers by the middle-end. Removing the difference in how immediate integers were encoded will allow more code to be shared between 32-bit and 64-bit operations. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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552672bae6 |
tcg/tci: Fix TCG_REG_R4 misusage
This was removed from tcg_target_reg_alloc_order and tcg_target_call_iarg_regs on the assumption that it was the stack. This was incorrectly copied from i386. For tci, the stack is R15. By adding R4 back to tcg_target_call_iarg_regs, adjust the other entries so that 6 (or 12) entries are still present in the array, and adjust the numbers in the interpreter. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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187f44d9da |
tcg/tci: Restrict TCG_TARGET_NB_REGS to 16
As noted in several comments, 8 regs is not enough for 32-bit to perform calls, as currently implemented. Shortly, we will rearrange the encoding which will make 32 regs impossible. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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f6ff97ab56 |
tcg/tci: Remove TODO as unused
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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ae40c098ac |
tcg/tci: Implement 64-bit division
Trivially implemented like other arithmetic. Tested via check-tcg and the ppc64 target. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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7abd007cbc |
tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_*
We do not simultaneously support div and div2 -- it's one or the other. TCI is already using div, so remove div2. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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f6996f99f3 |
tcg/tci: Use g_assert_not_reached
Three TODO instances are never happen cases. Other uses of tcg_abort are also indicating unreachable cases. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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b4d5bf0f9b |
tcg/tci: Merge INDEX_op_{st_i32,st32_i64}
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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53f405569c |
tcg/tci: Move stack bounds check to compile-time
The existing check was incomplete: (1) Only applied to two of the 7 stores, and not to the loads at all. (2) Only checked the upper, but not the lower bound of the stack. Doing this at compile time means that we don't need to do it at runtime as well. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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90be4dde24 |
tcg/tci: Merge INDEX_op_st16_{i32,i64}
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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ba9a80c1e8 |
tcg/tci: Merge INDEX_op_st8_{i32,i64}
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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c1d77e9475 |
tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64}
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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b09d78bf22 |
tcg/tci: Merge INDEX_op_ld16s_{i32,i64}
Eliminating a TODO for ld16s_i64. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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77c38c7c3f |
tcg/tci: Merge INDEX_op_ld16u_{i32,i64}
Eliminating a TODO for ld16u_i32. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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850163eb4d |
tcg/tci: Merge INDEX_op_ld8s_{i32,i64}
Eliminating a TODO for ld8s_i32. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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7f33f5cd0a |
tcg/tci: Merge INDEX_op_ld8u_{i32,i64}
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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5410e4347b |
tcg/tci: Inline tci_write_reg64 into 64-bit callers
Note that we had two functions of the same name: a 32-bit version which took two register numbers and a 64-bit version which was a no-op wrapper for tcg_write_reg. After this, we are left with only the 32-bit version. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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85bbbf7088 |
tcg/tci: Inline tci_write_reg32 into all callers
For a 64-bit TCI, the upper bits of a 32-bit operation are undefined (much like a native ppc64 32-bit operation). It simplifies everything if we don't force-extend the result. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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43c8a40279 |
tcg/tci: Inline tci_write_reg16 into the only caller
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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475a15611f |
tcg/tci: Inline tci_write_reg8 into its callers
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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9592e8974f |
tcg/tci: Inline tci_write_reg32s into the only caller
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Stefan Weil
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cbec0754be |
tcg/tci: Implement INDEX_op_ld8s_i64
That TCG opcode is used by debian-buster (arm64) running ffmpeg:
qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20210128020425.2055454-1-sw@weilnetz.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Stefan Weil
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49a5a75f3e |
tcg/tci: Implement INDEX_op_ld16s_i32
That TCG opcode is used by debian-buster (arm64) running ffmpeg:
qemu-aarch64 /usr/bin/ffmpeg -i theora.mkv theora.webm
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20210128024814.2056958-1-sw@weilnetz.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson
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13e71f08bf |
tcg/tci: Make tci_tb_ptr thread-local
Each thread must have its own pc, even under TCI. Remove the GETPC ifdef, because GETPC is always available for helpers, and thus is always required. Move the assignment under INDEX_op_call, because the value is only visible when we make a call to a helper function. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210204014509.882821-6-richard.henderson@linaro.org> |
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Richard Henderson
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c6fbea4766 |
configure: Fix --enable-tcg-interpreter
The configure option was backward, and we failed to
pass the value on to meson.
Fixes:
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Richard Henderson
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2dfa2f1871 |
tcg/aarch64: Do not convert TCGArg to temps that are not temps
Fixes INDEX_op_rotli_vec for aarch64 host, where the 3rd
argument is an integer, not a temporary, which now tickles
an assert added in
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Philippe Mathieu-Daudé
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37c8c531d6 |
exec/cpu-defs: Remove TCG backends dependency
"exec/cpu-defs.h" contains generic CPU definitions for the TCG frontends (mostly related to TLB). TCG backends definitions aren't relevant here. See tcg/README description: 4) Backend tcg-target.h contains the target specific definitions. tcg-target.c.inc contains the target specific code; it is #included by tcg/tcg.c, rather than being a standalone C file. So far only "tcg/tcg.h" requires these headers. Remove the "target-tcg.h" header dependency on TCG frontends, so we don't have to rebuild all frontends when hacking a single backend. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210204191423.1754158-1-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Philippe Mathieu-Daudé
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8e43c5a1f2 |
tcg/s390: Fix compare instruction from extended-immediate facility
The code is currently comparing c2 to the type promotion of
uint32_t and int32_t. That is, the conversion rules are as:
(common_type) c2 == (common_type) (uint32_t)
(is_unsigned
? (uint32_t)c2
: (uint32_t)(int32_t)c2)
In the signed case we lose the desired sign extensions because
of the argument promotion rules of the ternary operator.
Solve the problem by doing the round-trip parsing through the
intermediate type and back to the desired common type (all at
one expression).
Fixes:
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Peter Maydell
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d0dddab40e |
pc,virtio,pci: fixes, features,code removal
Fixes all over the place. Ability to control ACPI OEM ID's. Ability to control rom BAR size. Removal of deprecated pc machine types. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmAdThgPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpZ2gH/R5W2mwmDv5RH8fanA8rdW0+BORmHaUbUXqN YtfzQj14o+f+gpIPlGpi02ub26Q7t8XZbOW6DsoeNUTelu+P4kDcVhvBNgnl5ic1 rdM/jfjI87YcugGKjVNVbsEaDYYEiQaEiY/B21JFcrzAYHiOU+pfHQpFDipmXy0a st4uLG31/6SVlwhdnYWBQpgDioOpP40KTQz1fAsr0EIyyoIWPdCv3W410DoLP7lL Hpe/9ByLTqBBhZHlGABEHFrryprs8ax7OEMZUhpwzFrP/jsLIgIdTEGqhjVNzGUn xI8ePU6a0V6X5ZCRhmvIzmLyPVEOFTZlHlAdeWi1b2tkinN6m3E= =ZKzx -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,virtio,pci: fixes, features,code removal Fixes all over the place. Ability to control ACPI OEM ID's. Ability to control rom BAR size. Removal of deprecated pc machine types. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 05 Feb 2021 13:54:32 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: tests/acpi: disallow updates for expected data files tests/acpi: update expected data files tests/acpi: add OEM ID and OEM TABLE ID test acpi: use constants as strncpy limit acpi: Permit OEM ID and OEM table ID fields to be changed tests/acpi: allow updates for expected data files vhost: Check for valid vdev in vhost_backend_handle_iotlb_msg hw/virtio/virtio-balloon: Remove the "class" property hw/i386: Remove the deprecated pc-1.x machine types vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support virtio-pmem: add trace events virtio: Add corresponding memory_listener_unregister to unrealize virtio-mmio: fix guest kernel crash with SHM regions virtio: move 'use-disabled-flag' property to hw_compat_4_2 pci: add romsize property pci: reject too large ROMs Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Vladimir Sementsov-Ogievskiy
|
e2c5093c99 |
iotests: 30: drop from auto group (and effectively from make check)
I reproduced the following crash fast enough:
0 raise () at /lib64/libc.so.6
1 abort () at /lib64/libc.so.6
2 _nl_load_domain.cold () at /lib64/libc.so.6
3 annobin_assert.c_end () at /lib64/libc.so.6
4 bdrv_reopen_multiple (bs_queue=0x55de75fa9b70, errp=0x0)
at ../block.c:3820
5 bdrv_reopen_set_read_only (bs=0x55de760fc020, read_only=true,
errp=0x0) at ../block.c:3870
6 stream_clean (job=0x55de75fa9410) at ../block/stream.c:99
7 job_clean (job=0x55de75fa9410) at ../job.c:680
8 job_finalize_single (job=0x55de75fa9410) at ../job.c:696
9 job_txn_apply (job=0x55de75fa9410,
fn=0x55de741eee27 <job_finalize_single>) at ../job.c:158
10 job_do_finalize (job=0x55de75fa9410) at ../job.c:805
11 job_completed_txn_success (job=0x55de75fa9410) at ../job.c:855
12 job_completed (job=0x55de75fa9410) at ../job.c:868
13 job_exit (opaque=0x55de75fa9410) at ../job.c:888
14 aio_bh_call (bh=0x55de76b9b4e0) at ../util/async.c:136
15 aio_bh_poll (ctx=0x55de75bc5300) at ../util/async.c:164
16 aio_dispatch (ctx=0x55de75bc5300) at ../util/aio-posix.c:381
17 aio_ctx_dispatch (source=0x55de75bc5300, callback=0x0,
user_data=0x0) at ../util/async.c:306
18 g_main_context_dispatch () at /lib64/libglib-2.0.so.0
19 glib_pollfds_poll () at ../util/main-loop.c:232
20 os_host_main_loop_wait (timeout=0) at ../util/main-loop.c:255
21 main_loop_wait (nonblocking=0) at ../util/main-loop.c:531
22 qemu_main_loop () at ../softmmu/runstate.c:722
23 main (argc=20, argv=0x7ffe218f0268, envp=0x7ffe218f0310) at
../softmmu/main.c:50
(gdb) fr 4
4 bdrv_reopen_multiple (bs_queue=0x55de75fa9b70, errp=0x0) at
../block.c:3820
3820 assert(perm == state->perm);
(gdb) list
3815
3816 if (ret == 0) {
3817 uint64_t perm, shared;
3818
3819 bdrv_get_cumulative_perm(state->bs, &perm,
&shared);
3820 assert(perm == state->perm);
3821 assert(shared == state->shared_perm);
3822
3823 bdrv_set_perm(state->bs);
3824 } else {
(gdb) p perm
$1 = 1
(gdb) p state->perm
$2 = 0
Then I had 38 successful iterations and another crash:
0 bdrv_check_update_perm (bs=0x5631ac97bc50, q=0x0, new_used_perm=1,
new_shared_perm=31, ignore_children=0x0, errp=0x7ffd9d477cf8) at
../block.c:2197
1 bdrv_root_attach_child
(child_bs=0x5631ac97bc50, child_name=0x5631aaf6b1f9 "backing",
child_class=0x5631ab280ca0 <child_of_bds>, child_role=8,
ctx=0x5631ab757300, perm=1, shared_perm=31, opaque=0x5631abb8c020,
errp=0x7ffd9d477cf8)
at ../block.c:2642
2 bdrv_attach_child (parent_bs=0x5631abb8c020,
child_bs=0x5631ac97bc50, child_name=0x5631aaf6b1f9 "backing",
child_class=0x5631ab280ca0 <child_of_bds>, child_role=8,
errp=0x7ffd9d477cf8)
at ../block.c:2719
3 bdrv_set_backing_hd (bs=0x5631abb8c020, backing_hd=0x5631ac97bc50,
errp=0x7ffd9d477cf8) at ../block.c:2854
4 stream_prepare (job=0x5631ac751eb0) at ../block/stream.c:74
5 job_prepare (job=0x5631ac751eb0) at ../job.c:784
6 job_txn_apply (job=0x5631ac751eb0, fn=0x5631aacb1156 <job_prepare>)
at ../job.c:158
7 job_do_finalize (job=0x5631ac751eb0) at ../job.c:801
8 job_completed_txn_success (job=0x5631ac751eb0) at ../job.c:855
9 job_completed (job=0x5631ac751eb0) at ../job.c:868
10 job_exit (opaque=0x5631ac751eb0) at ../job.c:888
11 aio_bh_call (bh=0x7f3d9c007680) at ../util/async.c:136
12 aio_bh_poll (ctx=0x5631ab757300) at ../util/async.c:164
13 aio_dispatch (ctx=0x5631ab757300) at ../util/aio-posix.c:381
14 aio_ctx_dispatch (source=0x5631ab757300, callback=0x0,
user_data=0x0) at ../util/async.c:306
15 g_main_context_dispatch () at /lib64/libglib-2.0.so.0
16 glib_pollfds_poll () at ../util/main-loop.c:232
17 os_host_main_loop_wait (timeout=0) at ../util/main-loop.c:255
18 main_loop_wait (nonblocking=0) at ../util/main-loop.c:531
19 qemu_main_loop () at ../softmmu/runstate.c:722
20 main (argc=20, argv=0x7ffd9d478198, envp=0x7ffd9d478240) at
../softmmu/main.c:50
(gdb) list
2192 QLIST_FOREACH(c, &bs->parents, next_parent) {
2193 if (g_slist_find(ignore_children, c)) {
2194 continue;
2195 }
2196
2197 if ((new_used_perm & c->shared_perm) != new_used_perm)
{
2198 char *user = bdrv_child_user_desc(c);
2199 char *perm_names = bdrv_perm_names(new_used_perm &
~c->shared_perm);
2200
2201 error_setg(errp, "Conflicts with use by %s as '%s',
which does not "
(gdb) p c
$1 = (BdrvChild *) 0x8585858585858585
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id: 20210205111021.715240-1-vsementsov@virtuozzo.com
Reviewed-by: Eric Blake <eblake@redhat.com>
[PMM: trimmed the part of the commit message referring to
as-yet-unapplied patchseries]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
|
Marian Postevca
|
277a582bf8 |
tests/acpi: disallow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-6-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Marian Postevca
|
64c9a9217a |
tests/acpi: update expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-5-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Marian Postevca
|
4b1f88820f |
tests/acpi: add OEM ID and OEM TABLE ID test
Add support for testing the fields OEM ID and
OEM TABLE ID in all ACPI tables for PC,Q35,MICROVM,AARCH64
Full diff of changed files disassembly:
Table tests/data/acpi/virt/FACP diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-VQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-BQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-QQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-OQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-EMIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-RMIIX0, Mon Jan 18 23:55:00 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-JROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-2ROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-WROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-YOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-TOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-LPOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 0000006A
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : AB
+[009h 0009 1] Checksum : 65
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.numamem diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-HPOMX0, Mon Jan 18 23:55:27 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-OERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-BERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-8DRTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-IN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E2
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 5C
+[009h 0009 1] Checksum : 16
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SLIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SLIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-CN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/SSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-9M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002E0 (736)
* Revision 0x01
- * Checksum 0x3F
+ * Checksum 0xFF
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/NFIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/NFIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-6M6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D1
+[009h 0009 1] Checksum : 82
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-3M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000019A5 (6565)
* Revision 0x02
- * Checksum 0x90
+ * Checksum 0x3F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/virt/FACP.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-206LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-E16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-J16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-N16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-B16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.pxb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-G16LX0, Mon Jan 18 23:55:52 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E09 (7689)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/pc/HPET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-QNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-NNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-MB7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-0C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/TPM2.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/TPM2.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-ZC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [TPM2]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface table]
[004h 0004 4] Table Length : 0000004C
[008h 0008 1] Revision : 04
-[009h 0009 1] Checksum : 72
+[009h 0009 1] Checksum : 15
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCTPM2"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-XC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-VC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.tis diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-RC7EX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000020D7 (8407)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC8
+ * Checksum 0x77
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3N7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-WN7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-DI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-BI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-9H7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.bridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.bridge, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-6H7NX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E8B (7819)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x8F
+ * Checksum 0x3E
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-KW0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-HR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-OR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 3B
+[009h 0009 1] Checksum : F5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-TR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ZR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.mmio64 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-7R0GX0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000022E4 (8932)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x9D
+ * Checksum 0x4C
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VVX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-GUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-QUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.ipmibt diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.ipmibt, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-3UX8W0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001EC4 (7876)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x2A
+ * Checksum 0xD9
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-2HJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ARJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 7B
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ERJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-IRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000130
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 36
+[009h 0009 1] Checksum : F0
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SLIT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SLIT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-MRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-PRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-TRJNX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.cphp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.cphp, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-2RJNX0, Mon Jan 18 23:58:57 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002049 (8265)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x5A
+ * Checksum 0x09
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/HPET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-V1NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-B2NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-BJ6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-UH6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ITDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-STDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000090
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : AE
+[009h 0009 1] Checksum : 4B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-WTDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-XTJEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000188
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 68
+[009h 0009 1] Checksum : 22
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0TDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/SSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-8TDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002DE (734)
* Revision 0x01
- * Checksum 0x46
+ * Checksum 0x06
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/q35/NFIT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9VDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000F0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 24
+[009h 0009 1] Checksum : D5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-DWDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-IWDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000024EF (9455)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x26
+ * Checksum 0xD5
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/q35/FACP.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-OKSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000080
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DA
+[009h 0009 1] Checksum : 77
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-5KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : C0
+[009h 0009 1] Checksum : 7A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HMAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ALYOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HMAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 98
+[009h 0009 1] Checksum : 42
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHMAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ELSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ILSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.acpihmat diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-2JSOX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000023A6 (9126)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xB3
+ * Checksum 0x62
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-1HH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-GIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-PIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-OIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.ipmikcs diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-9GH9W0, Mon Jan 18 23:58:59 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001411 (5137)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x33
+ * Checksum 0xE2
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-84PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-D5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-P5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-N5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.roothp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-83PIX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000148D (5261)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC6
+ * Checksum 0x75
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-2ZSAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-B0SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-G2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-F2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-R2SAX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000013A2 (5026)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xD9
+ * Checksum 0x88
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-D9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-K9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-L4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-W4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbrroot diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-S4COX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000C0C (3084)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x81
+ * Checksum 0x30
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/microvm/FACP.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-PZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.usb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.usb, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-XZ3FX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000019E (414)
* Revision 0x02
- * Checksum 0x72
+ * Checksum 0x21
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TX8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-QS8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.rtc diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.rtc, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-4S8BX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000194 (404)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZRMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-VMMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000052
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : E6
+[009h 0009 1] Checksum : 83
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.ioapic2 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TMMOX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000016D (365)
* Revision 0x02
- * Checksum 0x1C
+ * Checksum 0xCB
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-M6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-V6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 0000006E
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DF
+[009h 0009 1] Checksum : 7C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.pcie diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-16CGX0, Tue Jan 19 00:03:13 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000BD7 (3031)
* Revision 0x02
- * Checksum 0x99
+ * Checksum 0x48
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-4-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|