Commit Graph

30991 Commits

Author SHA1 Message Date
Andreas Färber
b8bcf811bf max7310: QOM'ify
Replace FROM_I2C_SLAVE() usages with QOM cast macro.
Rename parent field.

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:32 +01:00
Andreas Färber
b1be45153e ssd0303: QOM'ify
Replace usages of FROM_I2C_SLAVE() with QOM cast macro.
Rename parent field.

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:32 +01:00
Andreas Färber
bc229b0f90 wm8750: QOM'ify
Replace usages of FROM_I2C_SLAVE() and direct parent field accesses with
QOM cast macro. Rename parent field.

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:32 +01:00
Andreas Färber
a5f96db7e8 z2: QOM'ify AER915
Replace usages of FROM_I2C_SLAVE() with QOM cast macro.
Rename the parent field. Reuse the type constant in z2_init().

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
[AF: Use TYPE_AER915 in z2_init() too]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:32 +01:00
Andreas Färber
70b5169032 tosa: QOM'ify DAC
Replace usages of FROM_I2C_SLAVE() with QOM cast macro.
Rename parent field. Use type constant in tosa_tg_init().

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:32 +01:00
Andreas Färber
96dca6b9a9 pxa2xx: QOM'ify I2C slave
Replace usages of FROM_I2C_SLAVE() and direct parent field accesses with
QOM cast macro. Rename parent field to assure we caught all. Reuse type
constant in pxa2xx_i2c_init().

Add some missing braces while at it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:31 +01:00
Andreas Färber
a5c828525e i2c: Rename i2c_bus to I2CBus
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:31 +01:00
Andreas Färber
6749695eaa nand: Don't use qdev_create() in nand_init()
Commit 7426aa72c3 (nand: Don't inherit
from Sysbus) changed the parent type of TYPE_NAND but continued to use
qdev_create(), which handled a NULL BusState as SysBus.

Use object_new() instead, and reuse the TYPE_NAND define while at it.

Reported-by: Markus Armbruster <armbru@redhat.com>
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:31 +01:00
Peter Maydell
3687d53259 tests: Run qom-test for every architecture
Rather than requiring every new architecture to remember to add a line
to the Makefile to say that qom-test will work on it, autogenerate
the list of supported architectures by looking at the files in
default-configs (as configure does), and add qom-test to the
test list for all of them automatically.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:22:27 +01:00
Markus Armbruster
bb6c5e3c3a qom-test: Test shutdown in addition to startup
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:21:08 +01:00
Markus Armbruster
5c1904f103 qom-test: Run for all available machines
Get available machines via QMP instead of hardcoding a list that's
perpetually out of date.

Xen machines can work only when running under the Xen hypervisor.
Blacklist them.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:21:08 +01:00
Andreas Färber
5ec889b4b1 tests: Fix gcov paths for relocated device sources
Commit 49ab747f66 moved
fdc.c, hd-geometry.c, m48t59.c, tmp105.c into hw/ subdirectories;
commit 0ddfaf7fe4 did for mc146818rtc.c.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-14 16:21:03 +01:00
Jeff Cody
28f106afb3 block: Add notes to iSCSI's .bdrv_open and .bdrv_reopen_prepare
iSCSI currently does not need to do any actions to support the
current usage of bdrv_reopen().  However, it is important to note
a couple of things: 1.) A connection will not be re-established to
an iSCSI target, and 2.) If iscsi_open() is changed to parse 'flags',
then iscsi_reopen_prepare() may need to be more than a stub.

In light of the above, this commit adds comments above both of the
functions to bring attention to these facts.

Signed-off-by: Jeff Cody <jcody@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-02-14 13:38:35 +01:00
Kevin Wolf
ee13ed1cbc blockdev: Remove 'type' parameter from blockdev_init()
blockdev-add doesn't know about the device that the backend will be
attached to, this is a legacy -drive concept. Move the remaining checks
that use it to drive_init().

[Fam Zheng <famz@redhat.com> suggested line-wrapping to 80 chars as
required by the coding standard.  I have fixed this.
--Stefan]

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-02-14 13:04:56 +01:00
Kevin Wolf
1a838745b8 sdhci: Drop unnecessary #include
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-02-14 13:04:56 +01:00
Alexander Graf
933b19ea97 PPC: KVM: Add missing address space to ldl_phys helper
We now have to pass an address space to our _phys helpers. During the
transition apparently the EPR exit path missed out, so let's put it there.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-14 10:42:31 +00:00
Andreas Färber
292363e15c target-ppc: Make ppc40x CPUs available in ppcemb
Not only 44x CPUs (BookE) but also 40x CPUs can run with 1k page size.

Move the criteria to a central inline function to avoid repetition
and #ifdef'fery. Update qom-test to no longer exempt them.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-13 17:47:43 +01:00
Andreas Färber
aaab89a68e ppcemb-softmmu: Drop Mac and e500 emulation
They are still available in ppc-softmmu and ppc64-softmmu.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-13 17:47:43 +01:00
Michael S. Tsirkin
b3be57c358 qtest: don't report signals if qtest driver enabled
qtest driver always uses signals to kill qemu
no need to report it, whatever the accelerator state.

Add API to detect qtest driver, and suppress reporting
signals in this case.

Reported-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-13 17:47:43 +01:00
Peter Maydell
0888a29caa acpi,pc,pci fixes and enhancements
Most changes here are hotplug related:
 
 This merges hotplug infrastructure changes by Igor,
 some acpi related fixes, and PC fixes.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

acpi,pc,pci fixes and enhancements

Most changes here are hotplug related:

This merges hotplug infrastructure changes by Igor,
some acpi related fixes, and PC fixes.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Mon 10 Feb 2014 09:13:26 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  ACPI: Remove commented-out code from HPET._CRS
  hw/pci: switch to a generic hotplug handling for PCIDevice
  pci/pcie: convert PCIE hotplug to use hotplug-handler API
  pci/shpc: convert SHPC hotplug to use hotplug-handler API
  acpi/piix4pm: convert ACPI PCI hotplug to use hotplug-handler API
  qdev:pci: refactor PCIDevice to use generic "hotpluggable" property
  hw/acpi: move typeinfo to the file end
  qdev: add "hotpluggable" property to Device
  qdev: add to BusState "hotplug-handler" link
  define hotplug interface
  loader: document that errno is set
  pc.c: better error message on initrd sizing failure
  pc_piix: enable legacy hotplug for Xen
  qtest: don't report signals if qtest driver enabled
  hw:piix4:acpi: reuse pcihp code for legacy PCI hotplug
  pcihp: remove unused AcpiPciHpPciStatus.device_present field
  pcihp: make pci_read() mmio calback compatible with legacy ACPI hotplug
  pcihp: make PCI hotplug mmio handlers indifferent to PCI_HOTPLUG_ADDR
  pcihp: replace enable|disable_device() with oneliners
  pcihp: reduce number of device check events

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-13 15:02:04 +00:00
Peter Maydell
f673e70ccc PReP machine and devices
* Cleanups for Raven PCI host bridge
 * Removal of PReP machine and devices from qemu-system-ppcemb
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Merge remote-tracking branch 'remotes/afaerber/tags/prep-for-upstream' into staging

PReP machine and devices

* Cleanups for Raven PCI host bridge
* Removal of PReP machine and devices from qemu-system-ppcemb

# gpg: Signature made Mon 10 Feb 2014 16:19:03 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg:                 aka "Andreas Färber <afaerber@suse.com>"

* remotes/afaerber/tags/prep-for-upstream:
  prep: Drop from ppcemb-softmmu
  raven: Use constant PCI_NUM_PINS instead of 4
  prep: Kill get_system_io() usage

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-13 14:52:06 +00:00
Peter Maydell
9d74f6fef0 Merge remote-tracking branch 'remotes/alon/pull-libcacard.glusterfs' into staging
* remotes/alon/pull-libcacard.glusterfs:
  libcacard: Don't link with all libraries QEMU links to

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-12 17:53:31 +00:00
Peter Maydell
628a746cf0 Block patches
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Merge remote-tracking branch 'remotes/kevin/tags/for-anthony' into staging

Block patches

# gpg: Signature made Sun 09 Feb 2014 08:12:51 GMT using RSA key ID C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"

* remotes/kevin/tags/for-anthony:
  block: Fix 32 bit truncation in mark_request_serialising()
  blkdebug: Don't leak bs->file on failure
  block: Don't call ROUND_UP with negative values
  block: bdrv_aligned_pwritev: Assert overlap range
  block: Fix memory leaks in bdrv_co_do_pwritev()
  raw: Fix BlockLimits passthrough
  qemu-iotests: add test for qcow2 preallocation with different cluster sizes
  qcow2: check for NULL l2meta
  qcow2: fix offset overflow in qcow2_alloc_clusters_at()
  qcow2: remove n_start and n_end of qcow2_alloc_cluster_offset()
  block/iscsi: always fill bs->bl.opt_transfer_length
  block: Fail gracefully with missing filename
  qemu-iotests: enable support for NFS protocol
  qemu-iotests: enable test 016 and 025 to work with NFS protocol
  qemu-iotests: blacklist test 020 for NFS protocol
  qemu-iotests: change _supported_proto to file for various tests
  block: add native support for NFS
  qemu-iotest: Make 077 raw-only

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-12 16:42:50 +00:00
Richard Henderson
5631e69c26 target-openrisc: Use new qemu_ld/st opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
Acked-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Jia Liu <proljc@gmail.com>
2014-02-12 08:47:57 +08:00
Edgar E. Iglesias
a4550442b9 petalogix-ml605: Create the CPU with object_new()
This is to allow future patches to set properties before cpu::realize().

Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:57 +10:00
Edgar E. Iglesias
2e38847b8d exec: Make cpu_memory_rw_debug use the CPUs AS
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:49 +10:00
Edgar E. Iglesias
2a22165194 exec: Make cpu_physical_memory_write_rom input an AS
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:44 +10:00
Edgar E. Iglesias
db3be60deb exec: Make stb_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:38 +10:00
Edgar E. Iglesias
5ce5944dc0 exec: Make stw_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:32 +10:00
Edgar E. Iglesias
2198a12143 exec: Make stl_phys_notdirty input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:24 +10:00
Edgar E. Iglesias
ab1da85791 exec: Make stl_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:18 +10:00
Edgar E. Iglesias
f606604f1c exec: Make stq_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:12 +10:00
Edgar E. Iglesias
41701aa4ee exec: Make lduw_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:06 +10:00
Edgar E. Iglesias
2c17449b30 exec: Make ldq/ldub_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:57:00 +10:00
Edgar E. Iglesias
fdfba1a298 exec: Make ldl_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:54 +10:00
Edgar E. Iglesias
33bde2e13f exec: On AS changes, only flush affected CPU TLBs
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:43 +10:00
Edgar E. Iglesias
09daed848c cpu: Add per-cpu address space
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:37 +10:00
Edgar E. Iglesias
c6c6958c98 memory: Add MemoryListener to typedefs.h
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:31 +10:00
Edgar E. Iglesias
1b3fb98ff0 exec: Make memory_region_section_get_iotlb use section AS
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:23 +10:00
Edgar E. Iglesias
3be91e862a exec: Always initialize MemorySection address spaces
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:16 +10:00
Edgar E. Iglesias
777170946f exec: Make iotlb_to_region input an AS
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:56:09 +10:00
Edgar E. Iglesias
29d8ec7bee exec: Make tb_invalidate_phys_addr input an AS
No functional change.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11 22:55:55 +10:00
Peter Maydell
8fa7574904 target-arm queue:
* more A64 Neon instructions
  * AArch32 VCVTB and VCVTT ARMv8 instructions
  * fixes to inaccuracies in GIC emulation
  * libvixl disassembler for A64
  * Allwinner SoC ethernet controller
  * zynq software system reset support
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140208' into staging

target-arm queue:
 * more A64 Neon instructions
 * AArch32 VCVTB and VCVTT ARMv8 instructions
 * fixes to inaccuracies in GIC emulation
 * libvixl disassembler for A64
 * Allwinner SoC ethernet controller
 * zynq software system reset support

# gpg: Signature made Sat 08 Feb 2014 15:53:05 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20140208: (29 commits)
  arm/zynq: Add software system reset via SCLR
  hw/arm/allwinner-a10: initialize EMAC
  hw/net: add support for Allwinner EMAC Fast Ethernet controller
  util/fifo8: clear fifo head upon reset
  util/fifo8: implement push/pop of multiple bytes
  disas: Implement disassembly output for A64
  disas/libvixl: Fix upstream libvixl compilation issues
  disas: Add subset of libvixl sources for A64 disassembler
  rules.mak: Link with C++ if we have a C++ compiler
  rules.mak: Support .cc as a C++ source file suffix
  arm_gic: Add GICC_APRn state to the GICState
  vmstate: Add uint32 2D-array support
  arm_gic: Support setting/getting binary point reg
  arm_gic: Keep track of SGI sources
  arm_gic: Fix GIC pending behavior
  target-arm: Add support for AArch32 64bit VCVTB and VCVTT
  target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group
  target-arm: A64: Add 2-reg-misc REV* instructions
  target-arm: A64: Add narrowing 2-reg-misc instructions
  target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-11 11:26:36 +00:00
Peter Maydell
702f6df960 Merge remote-tracking branch 'remotes/kvaneesh/for-upstream' into staging
* remotes/kvaneesh/for-upstream:
  hw/9pfs: fix P9_STATS_GEN handling
  hw/9pfs: make get_st_gen() return ENOTTY error on special files
  hw/9pfs: handle undefined FS_IOC_GETVERSION case in handle_ioc_getversion()
  hw/9pfs: fix error handing in local_ioc_getversion()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-10 18:31:06 +00:00
Paolo Bonzini
a87f39543a memory: fix limiting of translation at a page boundary
Commit 360e607 (address_space_translate: do not cross page boundaries,
2014-01-30) broke MMIO accesses in cases where the section is shorter
than the full register width.  This can happen for example with the
Bochs DISPI registers, which are 16 bits wide but have only a 1-byte
long MemoryRegion (if you write to the "second byte" of the register
your access is discarded; it doesn't write only to half of the register).

Restrict the action of commit 360e607 to direct RAM accesses.  This
is enough for Xen, since MMIO will not go through the mapcache.

Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-10 18:10:43 +00:00
Andreas Färber
ea81ce06a4 prep: Drop from ppcemb-softmmu
ppcemb covers only embedded processors, which does not include PReP.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2014-02-10 17:06:26 +01:00
Petar Jovanovic
736d120af4 target-mips: add user-mode FR switch support for MIPS32r5
Description of UFR feature:

Required in MIPS32r5 if floating point is implemented and user-mode FR
switching is supported. The UFR register allows user-mode to clear StatusFR
by executing a CTC1 to UFR with GPR[0] as input, and read StatusFR by
executing a CFC1 to UFR.

helper_ctc1 has been extended with an additional parameter rt to check
requirements for UFR feature.
Definition of mips32r5-generic has been modified to include support for UFR.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
2014-02-10 16:46:38 +01:00
Petar Jovanovic
b4dd99a363 target-mips: add support for CP0_Config5
Add CP0_Config5, define rw_bitmask and enable modifications.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
2014-02-10 16:46:28 +01:00
Petar Jovanovic
b4160af160 target-mips: add support for CP0_Config4
Add CP0_Config4, define rw_bitmask.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
2014-02-10 16:46:12 +01:00
Petar Jovanovic
e527526d35 target-mips: add CPU definition for MIPS32R5
Add mips32r5-generic among CPU definitions for MIPS.
Define ISA_MIPS32R3 and ISA_MIPS32R5.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
2014-02-10 16:45:53 +01:00