target-ppc: Make ppc40x CPUs available in ppcemb
Not only 44x CPUs (BookE) but also 40x CPUs can run with 1k page size. Move the criteria to a central inline function to avoid repetition and #ifdef'fery. Update qom-test to no longer exempt them. Signed-off-by: Andreas Färber <afaerber@suse.de>
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@ -7960,6 +7960,17 @@ static int ppc_fixup_cpu(PowerPCCPU *cpu)
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return 0;
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}
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static inline bool ppc_cpu_is_valid(PowerPCCPUClass *pcc)
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{
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#ifdef TARGET_PPCEMB
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return pcc->mmu_model == POWERPC_MMU_BOOKE ||
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pcc->mmu_model == POWERPC_MMU_SOFT_4xx ||
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pcc->mmu_model == POWERPC_MMU_SOFT_4xx_Z;
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#else
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return true;
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#endif
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}
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static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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@ -7991,8 +8002,8 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
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}
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#if defined(TARGET_PPCEMB)
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if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
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error_setg(errp, "CPU does not possess a BookE MMU. "
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if (!ppc_cpu_is_valid(pcc)) {
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error_setg(errp, "CPU does not possess a BookE or 4xx MMU. "
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"Please use qemu-system-ppc or qemu-system-ppc64 instead "
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"or choose another CPU model.");
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return;
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@ -8209,11 +8220,9 @@ static gint ppc_cpu_compare_class_pvr(gconstpointer a, gconstpointer b)
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return -1;
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}
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#if defined(TARGET_PPCEMB)
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if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
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if (!ppc_cpu_is_valid(pcc)) {
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return -1;
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}
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#endif
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return pcc->pvr == pvr ? 0 : -1;
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}
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@ -8246,11 +8255,10 @@ static gint ppc_cpu_compare_class_pvr_mask(gconstpointer a, gconstpointer b)
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return -1;
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}
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#if defined(TARGET_PPCEMB)
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if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
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if (!ppc_cpu_is_valid(pcc)) {
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return -1;
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}
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#endif
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ret = (((pcc->pvr & pcc->pvr_mask) == (pvr & pcc->pvr_mask)) ? 0 : -1);
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return ret;
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@ -8275,14 +8283,10 @@ static gint ppc_cpu_compare_class_name(gconstpointer a, gconstpointer b)
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{
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ObjectClass *oc = (ObjectClass *)a;
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const char *name = b;
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#if defined(TARGET_PPCEMB)
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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#endif
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if (strncasecmp(name, object_class_get_name(oc), strlen(name)) == 0 &&
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#if defined(TARGET_PPCEMB)
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pcc->mmu_model == POWERPC_MMU_BOOKE &&
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#endif
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ppc_cpu_is_valid(pcc) &&
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strcmp(object_class_get_name(oc) + strlen(name),
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"-" TYPE_POWERPC_CPU) == 0) {
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return 0;
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@ -8414,11 +8418,9 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data)
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char *name;
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int i;
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#if defined(TARGET_PPCEMB)
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if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
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if (!ppc_cpu_is_valid(pcc)) {
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return;
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}
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#endif
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if (unlikely(strcmp(typename, TYPE_HOST_POWERPC_CPU) == 0)) {
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return;
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}
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@ -8466,13 +8468,11 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data)
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const char *typename;
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CpuDefinitionInfoList *entry;
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CpuDefinitionInfo *info;
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#if defined(TARGET_PPCEMB)
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
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if (!ppc_cpu_is_valid(pcc)) {
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return;
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}
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#endif
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typename = object_class_get_name(oc);
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info = g_malloc0(sizeof(*info));
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@ -221,10 +221,7 @@ int main(int argc, char **argv)
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} else if (strcmp(arch, "or32") == 0) {
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ADD_MACHINE_TESTS(arch, openrisc_machines);
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} else if (strcmp(arch, "ppcemb") == 0) {
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#if 0
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/* XXX Available in ppcemb but don't work */
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ADD_MACHINE_TESTS(arch, ppc405_machines);
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#endif
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ADD_MACHINE_TESTS(arch, ppc440_machines);
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} else if (strcmp(arch, "ppc") == 0) {
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ADD_MACHINE_TESTS(arch, ppc405_machines);
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