9dcafa400e
568 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Qiang Liu
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2b3a98255c |
hw/display/xlnx_dp: fix an out-of-bounds read in xlnx_dp_read
xlnx_dp_read allows an out-of-bounds read at its default branch because
of an improper index.
According to
https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
(DP Module), registers 0x3A4/0x3A4/0x3AC are allowed.
DP_INT_MASK 0x000003A4 32 mixed 0xFFFFF03F Interrupt Mask Register for intrN.
DP_INT_EN 0x000003A8 32 mixed 0x00000000 Interrupt Enable Register.
DP_INT_DS 0x000003AC 32 mixed 0x00000000 Interrupt Disable Register.
In xlnx_dp_write, when the offset is 0x3A8 and 0x3AC, the virtual device
will write s->core_registers[0x3A4
>> 2]. That is to say, the maxize of s->core_registers could be ((0x3A4
>> 2) + 1). However, the current size of s->core_registers is (0x3AF >>
>> 2), that is ((0x3A4 >> 2) + 2), which is out of the range.
In xlxn_dp_read, the access to offset 0x3A8 or 0x3AC will be directed to
the offset 0x3A8 (incorrect functionality) or 0x3AC (out-of-bounds read)
rather than 0x3A4.
This patch enforces the read access to offset 0x3A8 and 0x3AC to 0x3A4,
but does not adjust the size of s->core_registers to avoid breaking
migration.
Fixes:
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Peter Maydell
|
a8ca0033c2 |
tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct
Zero-initialize the sockaddr_in struct that we're about to fill in and pass to bind(), to ensure we don't leave possible implementation-defined extension fields as uninitialized garbage. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Corey Minyard <cminyard@mvista.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-id: 20210813150506.7768-4-peter.maydell@linaro.org |
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Thomas Huth
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b063c290f3 |
tests/qtest/vhost-user-blk-test: Check whether qemu-storage-daemon is available
The vhost-user-blk-test currently hangs if QTEST_QEMU_STORAGE_DAEMON_BINARY points to a non-existing binary. Let's improve this situation by checking for the availability of the binary first, so we can fail gracefully if it is not accessible. Message-Id: <20210811095949.133462-1-thuth@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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cc1838c25d |
storage-daemon: Add missing build dependency to the vhost-user-blk-test
vhost-user-blk-test needs the qemu-storage-daemon, otherwise it currently hangs. So make sure that we build the daemon before running the tests. Message-Id: <20210811094705.131314-1-thuth@redhat.com> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Philippe Mathieu-Daudé
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4ac0b72bae |
hw/sd/sdcard: Fix assertion accessing out-of-range addresses with CMD30
OSS-Fuzz found sending illegal addresses when querying the write protection bits triggers the assertion added in commit |
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Peter Xu
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61c32485b7 |
tests: Fix migration-test build failure for sparc
Even if <linux/kvm.h> seems to exist for all archs on linux, however including
it with __linux__ defined seems to be not working yet as it'll try to include
asm/kvm.h and that can be missing for archs that do not support kvm.
To fix this (instead of any attempt to fix linux headers..), we can mark the
header to be x86_64 only, because it's so far only service for adding the kvm
dirty ring test.
Fixes:
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Peter Maydell
|
202abcd389 |
hw/nvme fixes
* new PMR test (Gollu Appalanaidu) * pmr/sgl mapping fix (Padmakar Kalghatgi) * hotplug fixes (me) * mmio out-of-bound read fix (me) * big-endian host fixes (me) -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmD/CnQACgkQTeGvMW1P DenrlQgAhiKhfKQAJPpP59noKaVNgHFCJySNFQdrPmnD8xDehn4wNRiP4pcdc4aL wpB28S5GN9LopzMpLtQBfQZaLygMPFa4QnuJ0ZFJnVoZZa5+T0yQUbBDt8xBJEM5 gVXBeB4rjnP4TjyTipgtRhSUZt7wieul60z9oFUbJwg4ntt0Jp36DFRzSdXAhTXY MubNZy+jqf8p2R4icL97kZISI/phPbWBBMVDSmyqlU5E/pCnip/n5pdISJ/MTPgl amqBA93Zs9d2jzhZlhfiKMT+qtdUuItGUk8NV9L2IKxE7ZTdT+tujKfQ1c54JvGM J70NjthZApzV4EJwZyrqD0UXNYwFIg== =jXUw -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging hw/nvme fixes * new PMR test (Gollu Appalanaidu) * pmr/sgl mapping fix (Padmakar Kalghatgi) * hotplug fixes (me) * mmio out-of-bound read fix (me) * big-endian host fixes (me) # gpg: Signature made Mon 26 Jul 2021 20:18:12 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-next-pull-request: tests/qtest/nvme-test: add mmio read test hw/nvme: fix mmio read hw/nvme: fix out-of-bounds reads hw/nvme: use symbolic names for registers hw/nvme: split pmrmsc register into upper and lower hw/nvme: fix controller hot unplugging tests/qtest/nvme-test: add persistent memory region test hw/nvme: error handling for too many mappings hw/nvme: unregister controller with subsystem at exit hw/nvme: mark nvme-subsys non-hotpluggable hw/nvme: remove NvmeCtrl parameter from ns setup/check functions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Klaus Jensen
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9631a8ab21 |
tests/qtest/nvme-test: add mmio read test
Add a regression test for mmio read on big-endian hosts. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> |
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Gollu Appalanaidu
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51e90178f7 |
tests/qtest/nvme-test: add persistent memory region test
This will test the PMR functionality. Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> [k.jensen: replaced memory-backend-file with memory-backend-ram] Signed-off-by: Klaus Jensen <k.jensen@samsung.com> |
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Dr. David Alan Gilbert
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5e32ffd346 |
tests/qtest/migration-test.c: use 127.0.0.1 instead of 0
OpenBSD doesn't like :0 as an address, switch to using 127.0.0.1 in baddest; it's really testing the :0 port number that isn't allowed on anything. (The test doesn't currently run anyway because of the userfault problem that Peter noticed, but this gets us closer to being able to reenable it) Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210719185217.122105-1-dgilbert@redhat.com> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> |
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Philippe Mathieu-Daudé
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59b63d78be |
hw/sd/sdcard: Check for valid address range in SEND_WRITE_PROT (CMD30)
OSS-Fuzz found sending illegal addresses when querying the write
protection bits triggers an assertion:
qemu-fuzz-i386: hw/sd/sd.c:824: uint32_t sd_wpbits(SDState *, uint64_t): Assertion `wpnum < sd->wpgrps_size' failed.
==11578== ERROR: libFuzzer: deadly signal
#8 0x7ffff628e091 in __assert_fail
#9 0x5555588f1a3c in sd_wpbits hw/sd/sd.c:824:9
#10 0x5555588dd271 in sd_normal_command hw/sd/sd.c:1383:38
#11 0x5555588d777c in sd_do_command hw/sd/sd.c
#12 0x555558cb25a0 in sdbus_do_command hw/sd/core.c💯16
#13 0x555558e02a9a in sdhci_send_command hw/sd/sdhci.c:337:12
#14 0x555558dffa46 in sdhci_write hw/sd/sdhci.c:1187:9
#15 0x5555598b9d76 in memory_region_write_accessor softmmu/memory.c:489:5
Similarly to commit
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Peter Maydell
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9516034d05 |
Some qemu updates for IPMI and I2C
Move some ADC file to where they belong and move some sensors to a sensor directory, since with new BMCs coming in lots of different sensors should be coming in. Keep from cluttering things up. Add support for I2C PMBus devices. Replace the confusing and error-prone i2c_send_recv and i2c_transfer with specific send and receive functions. Several errors have already been made with these, avoid any new errors. Fix the watchdog_expired field in the IPMI watchdog, it's not a bool, it's a u8. After a vmstate transfer, the new value could be wrong. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE/Q1c5nzg9ZpmiCaGYfOMkJGb/4EFAmDoeGAACgkQYfOMkJGb /4HpkQ//YLAddy3Kqo5LbyI0BPxcx567htHH34XXp4Pz22DcAoPvZRyRlsGiAAcR HRmqjSXNBan+KhlA82coczHUami8C+9NQAfnABf7Mv4CQnvf9Hziy9YR0riTAgEk Xfc25eYYK5dzfOHVVbp2KJ2IWPo/sY3UqbIKu9MyYzriNpzIuT5NW1aGjIrhW7Js 2feeIHxH4fEXzhkkgMKMJfXdxkYyD78mB3IfnpVCnoODq3fMZXtMskRDHWjdMEnT 0u53zeQd5T0jElLZXlwDKAd9QpiPWVnfTJwND3fwWjSMIAVkd7kTqJbVtHpYJMWB amOR9qsw72r/WIOow4lLbSjS57GbyEjB344dtlrzHhhW68y9SGbtaSXWD/imkAfB NhLlMzNzsIb+dHZhAwdEgmg4Nz/1HZngiK4Awk2YFBVCn7G6BqAvpMwLGdYYr3Az P4EPs0aVdGYBbcN5XxAwkKEqESrzF+iF7iZvNTocdSJSCV+ebFNLlZWIq/aXS1TA IED1mBmyc/drWF+jA0D520uafT1m+zN4HhPvHpRyK65bqqiH2veDpK20kz0lwQe8 e2ZeDVG2oVTMIQ+mmyu7kD9xgxjmapoHz64K1VkUwsnXE3jp9yqfa17B9vHOjqkq e/iaHiek8xeTWWyoShGk2zoAHBChkwSy/Y2JuZA6FXRnoU6kKsg= =8708 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into staging Some qemu updates for IPMI and I2C Move some ADC file to where they belong and move some sensors to a sensor directory, since with new BMCs coming in lots of different sensors should be coming in. Keep from cluttering things up. Add support for I2C PMBus devices. Replace the confusing and error-prone i2c_send_recv and i2c_transfer with specific send and receive functions. Several errors have already been made with these, avoid any new errors. Fix the watchdog_expired field in the IPMI watchdog, it's not a bool, it's a u8. After a vmstate transfer, the new value could be wrong. # gpg: Signature made Fri 09 Jul 2021 17:25:04 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/for-qemu-6.1-2: (24 commits) tests/qtest: add tests for MAX34451 device model hw/misc: add MAX34451 device tests/qtest: add tests for ADM1272 device model hw/misc: add ADM1272 device hw/i2c: add support for PMBus ipmi/sim: fix watchdog_expired data type error in IPMIBmcSim struct hw/i2c: Introduce i2c_start_recv() and i2c_start_send() hw/i2c: Extract i2c_do_start_transfer() from i2c_start_transfer() hw/i2c: Make i2c_start_transfer() direction argument a boolean hw/i2c: Rename i2c_set_slave_address() -> i2c_slave_set_address() hw/i2c: Remove confusing i2c_send_recv() hw/misc/auxbus: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/misc/auxbus: Replace 'is_write' boolean by its value hw/misc/auxbus: Explode READ_I2C / WRITE_I2C_MOT cases hw/misc/auxbus: Fix MOT/classic I2C mode hw/i2c/ppc4xx_i2c: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/i2c/ppc4xx_i2c: Add reference to datasheet hw/display/sm501: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/display/sm501: Simplify sm501_i2c_write() logic hw/input/lm832x: Define TYPE_LM8323 in public header ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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3cfcc329af |
target-arm queue:
* New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmDodKYZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lLWD/9Ux5FW5GfJstzcLyMaEQCA KMw9I18YYDXKnynxn8vqBYPV49pN8Hc/4xFcCuhVhsNMBiLMvRpNrnzCad2hylVJ JrFkyHO78ibdTRqUCWtnToFnNR37gBei1sL8jlcaex789ifDX7KOpfERqvIa313o 5iMEDLOtbkqauyNXPpMxmS/imP13VLD0iuChQwYM6tYnVKja7uFScJRlU6/3ayRL sZC0Yc8WUuwICmYOxXTu/ANhJo3XsTWMLN9RMlpDQ7PV4nT4hJP2MPtdkEiUpNZo aon/w/Fe+PB1DW6MSfyYYrrJTh9SmpylB+kiEVnZtf5RQB7URpTo0Oyb1CF4xz97 YbUqgSwJtTAeYku6H/2tmXvD87I1w7i7Y6E16Gjo5WXqs7bULYEAR9/l0dt3FMSW MoKAlhnwB7eU/p2kd5NZEkPPx9W/Z0B/nFFctVEKkQpo2CrJoOJX08RsPpFrwGSE Sr8wnyvRQr7YzWwkG/q11Y+uS9SIszuEYZYqEGw1AVBgi78dMVPSFiXktRnV3ERI FQWb7xzQe2pTtTc0W4yrudMxk8bCJvGIa9SYTW4Z5CxO0EJkBOOPTwoIGoNEeLLC NYGDGeaDYy5aCdqRwBz+oguBhRgqIiQagSjPljnJ4vJPQhJvdFik2nuK5JYbKnPl 7G0GxqlDhMQs9tXTQ523Rw== =AkRd -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210709' into staging target-arm queue: * New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message # gpg: Signature made Fri 09 Jul 2021 17:09:10 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210709: hw/intc: Improve formatting of MEMTX_ERROR guest error message target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint hw/arm/stellaris: Expand comment about handling of OLED chipselect hw/gpio/pl061: Document a shortcoming in our implementation hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset hw/arm/virt: Make PL061 GPIO lines pulled low, not high hw/gpio/pl061: Make pullup/pulldown of outputs configurable hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers hw/gpio/pl061: Document the interface of this device hw/gpio/pl061: Add tracepoints for register read and write hw/gpio/pl061: Clean up read/write offset handling logic hw/gpio/pl061: Convert DPRINTF to tracepoints hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write tests/boot-serial-test: Add STM32VLDISCOVERY board testcase docs/system: arm: Add stm32 boards description stm32vldiscovery: Add the STM32VLDISCOVERY Machine stm32f100: Add the stm32f100 SoC Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexandre Iooss
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7cb4097f2d |
tests/boot-serial-test: Add STM32VLDISCOVERY board testcase
New mini-kernel test for STM32VLDISCOVERY USART1. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-5-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexey Kardashevskiy
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fc8c745d50 |
spapr: Implement Open Firmware client interface
The PAPR platform describes an OS environment that's presented by a combination of a hypervisor and firmware. The features it specifies require collaboration between the firmware and the hypervisor. Since the beginning, the runtime component of the firmware (RTAS) has been implemented as a 20 byte shim which simply forwards it to a hypercall implemented in qemu. The boot time firmware component is SLOF - but a build that's specific to qemu, and has always needed to be updated in sync with it. Even though we've managed to limit the amount of runtime communication we need between qemu and SLOF, there's some, and it has become increasingly awkward to handle as we've implemented new features. This implements a boot time OF client interface (CI) which is enabled by a new "x-vof" pseries machine option (stands for "Virtual Open Firmware). When enabled, QEMU implements the custom H_OF_CLIENT hcall which implements Open Firmware Client Interface (OF CI). This allows using a smaller stateless firmware which does not have to manage the device tree. The new "vof.bin" firmware image is included with source code under pc-bios/. It also includes RTAS blob. This implements a handful of CI methods just to get -kernel/-initrd working. In particular, this implements the device tree fetching and simple memory allocator - "claim" (an OF CI memory allocator) and updates "/memory@0/available" to report the client about available memory. This implements changing some device tree properties which we know how to deal with, the rest is ignored. To allow changes, this skips fdt_pack() when x-vof=on as not packing the blob leaves some room for appending. In absence of SLOF, this assigns phandles to device tree nodes to make device tree traversing work. When x-vof=on, this adds "/chosen" every time QEMU (re)builds a tree. This adds basic instances support which are managed by a hash map ihandle -> [phandle]. Before the guest started, the used memory is: 0..e60 - the initial firmware 8000..10000 - stack 400000.. - kernel 3ea0000.. - initramdisk This OF CI does not implement "interpret". Unlike SLOF, this does not format uninitialized nvram. Instead, this includes a disk image with pre-formatted nvram. With this basic support, this can only boot into kernel directly. However this is just enough for the petitboot kernel and initradmdisk to boot from any possible source. Note this requires reasonably recent guest kernel with: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=df5be5be8735 The immediate benefit is much faster booting time which especially crucial with fully emulated early CPU bring up environments. Also this may come handy when/if GRUB-in-the-userspace sees light of the day. This separates VOF and sPAPR in a hope that VOF bits may be reused by other POWERPC boards which do not support pSeries. This assumes potential support for booting from QEMU backends such as blockdev or netdev without devices/drivers used. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20210625055155.2252896-1-aik@ozlabs.ru> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> [dwg: Adjusted some includes which broke compile in some more obscure compilation setups] Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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Titus Rwantare
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7649086f45 |
tests/qtest: add tests for MAX34451 device model
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210708172556.1868139-6-titusr@google.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> |
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Titus Rwantare
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c0167539ba |
tests/qtest: add tests for ADM1272 device model
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210708172556.1868139-4-titusr@google.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> |
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Peter Maydell
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9aef095419 |
* More Meson test conversions and configure cleanups
* Generalize XSAVE area offset so that it matches AMD processors on KVM
* Improvements for -display and deprecation of -no-quit
* Enable SMP configuration as a compound machine property ("-M smp.cpus=...")
* Haiku compilation fix
* Add icon on Darwin
-----BEGIN PGP SIGNATURE-----
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Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* More Meson test conversions and configure cleanups
* Generalize XSAVE area offset so that it matches AMD processors on KVM
* Improvements for -display and deprecation of -no-quit
* Enable SMP configuration as a compound machine property ("-M smp.cpus=...")
* Haiku compilation fix
* Add icon on Darwin
# gpg: Signature made Tue 06 Jul 2021 08:35:23 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (40 commits)
config-host.mak: remove unused compiler-related lines
Set icon for QEMU binary on Mac OS
qemu-option: remove now-dead code
machine: add smp compound property
vl: switch -M parsing to keyval
keyval: introduce keyval_parse_into
keyval: introduce keyval_merge
qom: export more functions for use with non-UserCreatable objects
configure: convert compiler tests to meson, part 6
configure: convert compiler tests to meson, part 5
configure: convert compiler tests to meson, part 4
configure: convert compiler tests to meson, part 3
configure: convert compiler tests to meson, part 2
configure: convert compiler tests to meson, part 1
configure: convert HAVE_BROKEN_SIZE_MAX to meson
configure, meson: move CONFIG_IVSHMEM to meson
meson: store dependency('threads') in a variable
meson: sort existing compiler tests
configure, meson: convert libxml2 detection to meson
configure, meson: convert liburing detection to meson
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Paolo Bonzini
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fe68090e8f |
machine: add smp compound property
Make -smp syntactic sugar for a compound property "-machine
smp.{cores,threads,cpu,...}". machine_smp_parse is replaced by the
setter for the property.
numa-test will now cover the new syntax, while other tests
still use -smp.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Peter Maydell
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9bef7ea9d9 |
9pfs: misc patches
* Add link to 9p developer docs. * Fix runtime check whether client supplied relative path is the export root. * Performance optimization of Twalk requests. * Code cleanup. -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEltjREM96+AhPiFkBNMK1h2Wkc5UFAmDi6V4XHHFlbXVfb3Nz QGNydWRlYnl0ZS5jb20ACgkQNMK1h2Wkc5WsiA//dwLfbNFE9dxAZF3JzwYPmgID ino0zruJxC2UdHaVYr2r0A6H+uL/K1zFTWj53R1EKo6udhsx5avqJvmuLU5np9MA CEflB99YvwEQWLNyM7IRT+IXa+ebe+UvqC7ouRmJeTRuBaSEu7TMj5S2zMj+AD4b uNGVylm6T8yAt+r8QQar+TvK9KYuPuHt/yJgzXqg8tDfly1GGzLh2uoS/0EZoJQU 4emyYadMsBMVOh+E29sqFMBpUnHwlLl+t9JpUl3xVXM1ZShcqHBl2QbQGJIDsfh7 HxXBMKHLiSzJrFJCc2DklsOlaRlP5nZdCVEcO4B0/Sq1kZpmf6r+4V6uYrdu8cCE tP33QNhC1yWQk9FgvItGkqRfAOI/KK02TE8WWJuLxbyo2n62lE0rEU1gBJOGPkxQ rJTGUiFgweV5Ky+NMRbrB4P8EurPLvcgFEhz7qfOEBanmZKHylzI3vwQg5e9Um/t ZABjIfjm95/QB6ufeCvVuktGnmyfBC/WJSZwiDyRG+tBf1V1TJF1P9EwoBOyYexv WGHoYfAExytKbyzgsKPZ32zTGzzKLtTBko+ATIEFPCpsf5TWiSzralzz3c2/DF3j 5PHuPOdL+7nhUN3CSRi2MJzhg+LKW34ca1G8XRpob0u9RkKSjH6VbqKhysB8eQNm kE1lfhSe00ZtuZoTPto= =WqCY -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20210705' into staging 9pfs: misc patches * Add link to 9p developer docs. * Fix runtime check whether client supplied relative path is the export root. * Performance optimization of Twalk requests. * Code cleanup. # gpg: Signature made Mon 05 Jul 2021 12:13:34 BST # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * remotes/cschoenebeck/tags/pull-9p-20210705: 9pfs: reduce latency of Twalk 9pfs: drop root_qid 9pfs: replace not_same_qid() by same_stat_id() 9pfs: drop fid_to_qid() 9pfs: capture root stat 9pfs: fix not_same_qid() 9pfs: simplify v9fs_walk() 9pfs: add link to 9p developer docs Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Christian Schoenebeck
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6f56908427 |
9pfs: add link to 9p developer docs
To lower the entry level for new developers, add a link to the 9p developer docs (i.e. qemu wiki) to MAINTAINERS and to the beginning of 9p source files, that is to: https://wiki.qemu.org/Documentation/9p Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Acked-by: Greg Kurz <groug@kaod.org> Message-Id: <E1leeDf-0008GZ-9q@lizzy.crudebyte.com> |
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Peter Xu
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1f546b709d |
tests: migration-test: Add dirty ring test
Add dirty ring test if kernel supports it. Add the dirty ring parameter on source should be mostly enough, but let's change the dest too to make them match always. Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20210615175523.439830-3-peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> |
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Peter Maydell
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5d2d18ae39 |
audio: bugfixes
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmDUd5AACgkQTLbY7tPo cTjq/Q/+PL8+B9milDJCdBU+tTTOZDB+8V/aWLE5U8VbHF0kkj+eqtWWDgdqmDMf TQDolpZhYtp0UKmzQo6RQivbZX1TZMTVj67mgLw9lQEu0VVjrgUHZOqY4jMNSKCP RikxeVkv90elwJbUdjAtw1gSIepph2sySaNemjZzXT+mDQm1bV3hTwh/s1T8N6TU nVioJGUzHksBQr1hq6OxcMQmMN56ampCrEmmsiPcR3n5dS6IhGD1WfkGWTDSur9H d2UncTzLXb58l3ZaLYujv6n4ArIERcNUDWvi7j93Tcem62YQc+EcxC75nl+5mFSQ 8rnv/8Jli3n3o11ShAAtS1uPSPlGl9euE7FXkDkb28OS3dItxl5R4YbYRy45ZitJ OcS6zatrEUcMBHqO1xXhPSKEAoJ2oBJ82GPRHeQnyRRWId9lJJvfiIe9E0GDbE8P hGmLk7v1txz5ZMG7bFWyC+Ol0HMgvwH+TSSt5XbtFYwmwrVucUarHqh1F8Yi7lqm wLOP8sFtFZalfimhbv8GkZafiFw0qJ3UDot6ISBSLKZLhQXTnGi0Kl+lLJh8wijT z8Ut+LJQKH3//g1hfR73EHUiP60WRX2zL9Xw6JcX8GE2CNaQNRHlQxduO7vLum8v SWn+KqOjk5bFPPhB6OrLW5+KgvmbD2ITiM8Lt+KuHmSiyZHWSIs= =XgQF -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/audio-20210624-pull-request' into staging audio: bugfixes # gpg: Signature made Thu 24 Jun 2021 13:16:16 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20210624-pull-request: hw/audio/sb16: Restrict I/O sampling rate range for command 41h/42h coreaudio: Lock only the buffer Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Qiang Liu
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60e543f5ce |
hw/audio/sb16: Restrict I/O sampling rate range for command 41h/42h
The I/O sampling rate range is enforced to 5000 to 45000HZ according to commit |
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Philippe Mathieu-Daudé
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a8fbec7ed8 |
fuzz: Display hexadecimal value with '0x' prefix
Use memory_region_size() to get the MemoryRegion size, and display it with the '0x' prefix. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210612195842.1595999-1-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Ahmed Abouzied
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e52ee00dab |
Remove leading underscores from QEMU defines
Leading underscores followed by a capital letter or underscore are reserved by the C standard. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/369 Signed-off-by: Ahmed Abouzied <email@aabouzied.com> Message-Id: <20210605174938.13782-1-email@aabouzied.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Corey Minyard
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5e9ae4b1a3 |
sensor: Move hardware sensors from misc to a sensor directory
Lots of this are expected to be coming in, create a directory for them. Also move the tmp105.h file into the include directory where it should be. Cc: Cédric Le Goater <clg@kaod.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Joel Stanley <joel@jms.id.au> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: qemu-arm@nongnu.org Signed-off-by: Corey Minyard <cminyard@mvista.com> Acked-by: Cédric Le Goater <clg@kaod.org> |
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Philippe Mathieu-Daudé
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a2cd86a94a |
hw/audio/sb16: Avoid assertion by restricting I/O sampling rate range
While the SB16 seems to work up to 48000 Hz, the "Sound Blaster Series
Hardware Programming Guide" limit the sampling range from 4000 Hz to
44100 Hz (Section 3-9, 3-10: Digitized Sound I/O Programming, tables
3-2 and 3-3).
Later, section 6-15 (DSP Commands) is more specific regarding the 41h /
42h registers (Set digitized sound output sampling rate):
Valid sampling rates range from 5000 to 45000 Hz inclusive.
There is no comment regarding error handling if the register is filled
with an out-of-range value. (See also section 3-28 "8-bit or 16-bit
Auto-initialize Transfer"). Assume limits are enforced in hardware.
This fixes triggering an assertion in audio_calloc():
#1 abort
#2 audio_bug audio/audio.c:119:9
#3 audio_calloc audio/audio.c:154:9
#4 audio_pcm_sw_alloc_resources_out audio/audio_template.h:116:15
#5 audio_pcm_sw_init_out audio/audio_template.h:175:11
#6 audio_pcm_create_voice_pair_out audio/audio_template.h:410:9
#7 AUD_open_out audio/audio_template.h:503:14
#8 continue_dma8 hw/audio/sb16.c:216:20
#9 dma_cmd8 hw/audio/sb16.c:276:5
#10 command hw/audio/sb16.c:0
#11 dsp_write hw/audio/sb16.c:949:13
#12 portio_write softmmu/ioport.c:205:13
#13 memory_region_write_accessor softmmu/memory.c:491:5
#14 access_with_adjusted_size softmmu/memory.c:552:18
#15 memory_region_dispatch_write softmmu/memory.c:0:13
#16 flatview_write_continue softmmu/physmem.c:2759:23
#17 flatview_write softmmu/physmem.c:2799:14
#18 address_space_write softmmu/physmem.c:2891:18
#19 cpu_outw softmmu/ioport.c:70:5
[*] http://www.baudline.com/solutions/full_duplex/sb16_pci/index.html
OSS-Fuzz Report: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=29174
Fixes:
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Kit Westneat
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6b731a96aa |
tests/qtest/virtio-scsi-test: add unmap large LBA with 4k blocks test
Add test for issue #345 Signed-off-by: Kit Westneat <kit.westneat@gmail.com> Message-Id: <20210603142022.676395-1-kit.westneat@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Peter Maydell
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d2304612b5 |
tests/qtest/tpm-tests: Remove unnecessary NULL checks
Coverity points out that in tpm_test_swtpm_migration_test() we assume that src_tpm_addr and dst_tpm_addr are non-NULL (we pass them to tpm_util_migration_start_qemu() which will unconditionally dereference them) but then later explicitly check them for NULL. Remove the pointless checks. Fixes: Coverity CID 1432367, 1432359 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-6-peter.maydell@linaro.org |
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Peter Maydell
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909e4a0826 |
tests/qtest/pflash-cfi02-test: Avoid potential integer overflow
Coverity points out that we calculate a 64-bit value using 32-bit arithmetic; add the cast to force the multiply to be done as 64-bits. (The overflow will never happen with the current test data.) Fixes: Coverity CID 1432320 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-5-peter.maydell@linaro.org |
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Peter Maydell
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2c398ee5e3 |
tests/qtest/hd-geo-test: Fix checks on mkstemp() return value
Coverity notices that the checks against mkstemp() failing in create_qcow2_with_mbr() are wrong: mkstemp returns -1 on failure but the check is just "g_assert(fd)". Fix to use "g_assert(fd >= 0)", matching the correct check in create_test_img(). Fixes: Coverity CID 1432274 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-4-peter.maydell@linaro.org |
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Peter Maydell
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380822edb3 |
tests/qtest/e1000e-test: Check qemu_recv() succeeded
The e1000e_send_verify() test calls qemu_recv() but doesn't check that the call succeeded, which annoys Coverity. Add an explicit test check for the length of the data. (This is a test check, not a "we assume this syscall always succeeds", so we use g_assert_cmpint() rather than g_assert().) Fixes: Coverity CID 1432324 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-3-peter.maydell@linaro.org |
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Peter Maydell
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3c65e439b2 |
tests/qtest/bios-tables-test: Check for dup2() failure
Coverity notes that we don't check for dup2() failing. Add some assertions so that if it does ever happen we get some indication. (This is similar to how we handle other "don't expect this syscall to fail" checks in this test code.) Fixes: Coverity CID 1432346 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-2-peter.maydell@linaro.org |
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Philippe Mathieu-Daudé
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aaad026480 |
tests/qtest/fuzz: Fix build failure
On Fedora 32, using clang (version 10.0.1-3.fc32) we get:
tests/qtest/fuzz/fuzz.c:237:5: error: implicit declaration of function 'qemu_init' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
qemu_init(result.we_wordc, result.we_wordv, NULL);
^
qemu_init() is declared in "sysemu/sysemu.h", include this
header to fix.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210513162008.3922223-1-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Stefan Hajnoczi
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7999e3136d |
vhost-user-blk-test: test discard/write zeroes invalid inputs
Exercise input validation code paths in block/export/vhost-user-blk-server.c. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210309094106.196911-5-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210322092327.150720-4-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Stefan Hajnoczi
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9c4e99e879 |
tests/qtest: add multi-queue test case to vhost-user-blk-test
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210309094106.196911-4-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210322092327.150720-3-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Coiby Xu
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806952026d |
test: new qTest case to test the vhost-user-blk-server
This test case has the same tests as tests/virtio-blk-test.c except for tests have block_resize. Since the vhost-user-blk export only serves one client one time, two exports are started by qemu-storage-daemon for the hotplug test. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Coiby Xu <coiby.xu@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210309094106.196911-3-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210322092327.150720-2-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Peter Maydell
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2ed765fdee |
tests/qtest/migration-test: Use g_autofree to avoid leaks on error paths
Coverity notices that several places in the migration-test code fail to free memory in error-exit paths. This is pretty unimportant in test case code, but we can avoid having to manually free the memory entirely by using g_autofree. The places where Coverity spotted a leak were relating to early exits not freeing 'uri' in test_precopy_unix(), do_test_validate_uuid(), migrate_postcopy_prepare() and test_migrate_auto_converge(). This patch converts all the string-allocation in the test code to g_autofree for consistency. Fixes: Coverity CID 1432313, 1432315, 1432352, 1432364 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210506185819.9010-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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bfaa3b05a9 |
tests: Avoid side effects inside g_assert() arguments
For us, assertions are always enabled, but side-effect expressions inside the argument to g_assert() are bad style anyway. Fix three occurrences in IPMI related tests, which will silence some Coverity nits. Fixes: CID 1432322, CID 1432287, CID 1432291 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-4-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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6c054176db |
tests/qtest/rtc-test: Remove pointless NULL check
In rtc-test.c we know that s is non-NULL because qtest_start() will return a non-NULL value, and we assume this when we pass s to qtest_irq_intercept_in(). So we can drop the initial assignment of NULL and the "if (s)" condition at the end of the function. Fixes: Coverity CID 1432353 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-3-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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e7b13acdf2 |
tests/qtest/tpm-util.c: Free memory with correct free function
tpm_util_migration_start_qemu() allocates memory with g_strdup_printf() but frees it with free() rather than g_free(), which provokes Coverity complaints (CID 1432379, 1432350). Use the correct free function. Fixes: Coverity CID 1432379, CID 1432350 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Dr. David Alan Gilbert
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3a46f81676 |
tests/migration-test: Fix "true" vs true
Accidental use of "true" as a boolean; spotted by coverity and Peter. Fixes: |
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Peter Maydell
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302585450c |
tests/qtest/npcm7xx_pwm-test.c: Avoid g_assert_true() for non-test assertions
In the glib API, the distinction between g_assert() and g_assert_true() is that the former is for "bug, terminate the application" and the latter is for "test check, on failure either terminate or just mark the testcase as failed". For QEMU, g_assert() is always fatal, so code can assume that if the assertion fails execution does not proceed, but this is not true of g_assert_true(). In npcm7xx_pwm-test, the pwm_index() and pwm_module_index() functions include some assertions that are just guarding against possible bugs in the test code that might lead us to out-of-bounds array accesses. These should use g_assert() because they aren't part of what the test is testing and the code does not correctly handle the case where the condition was false. This fixes some Coverity issues where Coverity knows that g_assert_true() can continue when the condition is false and complains about the possible array overrun at various callsites. Fixes: Coverity CID 1442340, 1442341, 1442343, 1442344, 1442345, 1442346 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-Id: <20210505135516.21097-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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423dbce5a2 |
tests/qtest/ahci-test.c: Calculate iso_size with 64-bit arithmetic
Coverity notes that when calculating the 64-bit iso_size value in ahci_test_cdrom() we actually only do it with 32-bit arithmetic. This doesn't matter for the current test code because nsectors is always small; but adding the cast avoids the coverity complaints. Fixes: Coverity CID 1432343 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-Id: <20210506194358.3925-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Stefan Hajnoczi
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20868330a9 |
libqtest: refuse QTEST_QEMU_BINARY=qemu-kvm
Some downstreams rename the QEMU binary to "qemu-kvm". This breaks qtest_get_arch(), which attempts to parse the target architecture from the QTEST_QEMU_BINARY environment variable. Print an error instead of returning the architecture "kvm". Things fail in weird ways when the architecture string is bogus. Arguably qtests should always be run in a build directory instead of against an installed QEMU. In any case, printing a clear error when this happens is helpful. Since this is an error that is triggered by the user and not a test failure, use exit(1) instead of abort(). Change the existing abort() call in qtest_get_arch() to exit(1) too for the same reason and to be consistent. Reported-by: Qin Wang <qinwang@rehdat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Cc: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210412143050.725918-1-stefanha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Stefan Hajnoczi
|
f62215298a |
libqos/qgraph: fix "UNAVAILBLE" typo
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210412143437.727560-2-stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Markus Armbruster
|
4369223902 |
Drop the deprecated unicore32 target
Target unicore32 was deprecated in commit
|
||
|
Markus Armbruster
|
9d49bcf699 |
Drop the deprecated lm32 target
Target lm32 was deprecated in commit
|
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Thomas Huth
|
875bb7e35b |
Remove the deprecated moxie target
There are no known users of this CPU anymore, and there are no binaries available online which could be used for regression tests, so the code has likely completely bit-rotten already. It's been marked as deprecated since two releases now and nobody spoke up that there is still a need to keep it, thus let's remove it now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210430160355.698194-1-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Commit message typos fixed, trivial conflicts resolved] Signed-off-by: Markus Armbruster <armbru@redhat.com> |
||
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Peter Maydell
|
d45a5270d0 |
Trivial patches pull request 20210503
-----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmCPtbASHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748I3wP/Al7yi77BMpts1t3lGMm7EBjKgkppnpr wZYEM68bJonvvGiEKQjexn1CUfnDcq7f5SZkzcUNLI4oP57pyywb4/gshN0k/Zz8 uCDveMfnhbio2sqlXiMsH9TOhcv/4wtXAek/ghP7EOjkBvyXrAFIQ7eEPEB9cp+X xxs9DxqfWmrGB6vt7Er78zjfUETSMa+UrheVLwbRMhJcc0Bg8hT2DCn9Lw6IjfOy usWdrLTGc6qg1zdZzi8QR7jZ+bNx0h+aJLlm8M4cVitXq9v2wb3+6KdsOAeYioAE AsnClw0m8j/xtMh3g4/hB4oCxMj0jRdZ9GIGs8Didw5ZwkXTRvFM1GK1PHxqX4pF 8xMW6Qq0bSUr4II6bPOukBUMUAnPYdkh+iHXsYSZG0I3u6VZLgMK3AXmKRukAYqe kQ1lcRe3Lwsp2h+jMBBsbCWhwYdA3THFO4YO31cUaZ191A7z57905QMbqJG/H3HB 7IUBYBNbrhgysPsNBvY6Lr7yUJIocMgcfP36UHYcBPsDdZgjNCQZneJlkaRlQb8+ CtUSF8D614EguzGsWaIn3uBSm9THKKLd1rSXCyTSgrXDI285mXlKmEWZvm236ew0 OEmIz/Ach/R4268j76enYGa1aubsxnrphUfC3aePu0Wzd3QW4RxnCSq7wc4ARPw7 WTL7J00P578h =aCeG -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Thomas Huth
|
ee86213aa3 |
Do not include exec/address-spaces.h if it's not really necessary
Stop including exec/address-spaces.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-5-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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Thomas Huth
|
4c386f8064 |
Do not include sysemu/sysemu.h if it's not really necessary
Stop including sysemu/sysemu.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-2-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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Cédric Le Goater
|
5fde7f10c0 |
tests/qtest: Rename m25p80 test in aspeed_smc test
The m25p80 test depends on the Aspeed SMC controller to test our SPI-NOR flash support. Reflect this dependency by changing the name. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210407171637.777743-17-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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Joel Stanley
|
666099520a |
tests/qtest: Add test for Aspeed HACE
This adds a test for the Aspeed Hash and Crypto (HACE) engine. It tests the currently implemented behavior of the hash functionality. The tests are similar, but are cut/pasted instead of broken out into a common function so the assert machinery produces useful output when a test fails. Co-developed-by: Cédric Le Goater <clg@kaod.org> Co-developed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210409000253.1475587-4-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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Mark Cave-Ayland
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ce94fa7aa6 |
tests/qtest: add tests for am53c974 device
Use the autogenerated fuzzer test cases as the basis for a set of am53c974 regression tests. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20210407195801.685-13-mark.cave-ayland@ilande.co.uk> |
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Jason Wang
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22317309df |
Revert "tests: Add tests for query-netdev command"
Several issues has been reported for query-netdev series. Consider
it's late in the rc, this reverts commit
|
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Paolo Bonzini
|
90a66f4847 |
x86: rename oem-id and oem-table-id properties
After introducing non-scalar machine properties, it would be preferrable to have a single acpitable property which includes both generic information (such as the OEM ids) and custom tables currently passed via -acpitable. Do not saddle ourselves with legacy oem-id and oem-table-id properties, instead mark them as experimental. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210402082128.13854-1-pbonzini@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Doug Evans
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a62ee00aa0 |
net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set
Turning REG_MCMDR_RXON is enough to start receiving packets. Signed-off-by: Doug Evans <dje@google.com> Message-id: 20210319195044.741821-1-dje@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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b3566001d4 |
memory: Add offset_in_region to flatview_cb arguments
The function flatview_for_each_range() calls a callback for each range in a FlatView. Currently the callback gets the start and length of the range and the MemoryRegion involved, but not the offset within the MemoryRegion. Add this to the callback's arguments; we're going to want it for a new use in the next commit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210318174823.18066-4-peter.maydell@linaro.org |
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Peter Maydell
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d1e8cf77f1 |
memory: Make flatview_cb return bool, not int
The return value of the flatview_cb callback passed to the flatview_for_each_range() function is zero if the iteration through the ranges should continue, or non-zero to break out of it. Use a bool for this rather than int. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210318174823.18066-2-peter.maydell@linaro.org |
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Philippe Mathieu-Daudé
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7d6a4f123e |
net/eth: Read ip6_ext_hdr_routing buffer before accessing it
We can't know the caller read enough data in the memory pointed
by ext_hdr to cast it as a ip6_ext_hdr_routing.
Declare rt_hdr on the stack and fill it again from the iovec.
Since we already checked there is enough data in the iovec buffer,
simply add an assert() call to consume the bytes_read variable.
This fix a 2 bytes buffer overrun in eth_parse_ipv6_hdr() reported
by QEMU fuzzer:
$ cat << EOF | ./qemu-system-i386 -M pc-q35-5.0 \
-accel qtest -monitor none \
-serial none -nographic -qtest stdio
outl 0xcf8 0x80001010
outl 0xcfc 0xe1020000
outl 0xcf8 0x80001004
outw 0xcfc 0x7
write 0x25 0x1 0x86
write 0x26 0x1 0xdd
write 0x4f 0x1 0x2b
write 0xe1020030 0x4 0x190002e1
write 0xe102003a 0x2 0x0807
write 0xe1020048 0x4 0x12077cdd
write 0xe1020400 0x4 0xba077cdd
write 0xe1020420 0x4 0x190002e1
write 0xe1020428 0x4 0x3509d807
write 0xe1020438 0x1 0xe2
EOF
=================================================================
==2859770==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7ffdef904902 at pc 0x561ceefa78de bp 0x7ffdef904820 sp 0x7ffdef904818
READ of size 1 at 0x7ffdef904902 thread T0
#0 0x561ceefa78dd in _eth_get_rss_ex_dst_addr net/eth.c:410:17
#1 0x561ceefa41fb in eth_parse_ipv6_hdr net/eth.c:532:17
#2 0x561cef7de639 in net_tx_pkt_parse_headers hw/net/net_tx_pkt.c:228:14
#3 0x561cef7dbef4 in net_tx_pkt_parse hw/net/net_tx_pkt.c:273:9
#4 0x561ceec29f22 in e1000e_process_tx_desc hw/net/e1000e_core.c:730:29
#5 0x561ceec28eac in e1000e_start_xmit hw/net/e1000e_core.c:927:9
#6 0x561ceec1baab in e1000e_set_tdt hw/net/e1000e_core.c:2444:9
#7 0x561ceebf300e in e1000e_core_write hw/net/e1000e_core.c:3256:9
#8 0x561cef3cd4cd in e1000e_mmio_write hw/net/e1000e.c:110:5
Address 0x7ffdef904902 is located in stack of thread T0 at offset 34 in frame
#0 0x561ceefa320f in eth_parse_ipv6_hdr net/eth.c:486
This frame has 1 object(s):
[32, 34) 'ext_hdr' (line 487) <== Memory access at offset 34 overflows this variable
HINT: this may be a false positive if your program uses some custom stack unwind mechanism, swapcontext or vfork
(longjmp and C++ exceptions *are* supported)
SUMMARY: AddressSanitizer: stack-buffer-overflow net/eth.c:410:17 in _eth_get_rss_ex_dst_addr
Shadow bytes around the buggy address:
0x10003df188d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df188e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df188f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18910: 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1
=>0x10003df18920:[02]f3 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18930: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18940: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18950: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18960: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18970: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Shadow byte legend (one shadow byte represents 8 application bytes):
Addressable: 00
Partially addressable: 01 02 03 04 05 06 07
Stack left redzone: f1
Stack right redzone: f3
==2859770==ABORTING
Add the corresponding qtest case with the fuzzer reproducer.
FWIW GCC 11 similarly reported:
net/eth.c: In function 'eth_parse_ipv6_hdr':
net/eth.c:410:15: error: array subscript 'struct ip6_ext_hdr_routing[0]' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=array-bounds]
410 | if ((rthdr->rtype == 2) && (rthdr->segleft == 1)) {
| ~~~~~^~~~~~~
net/eth.c:485:24: note: while referencing 'ext_hdr'
485 | struct ip6_ext_hdr ext_hdr;
| ^~~~~~~
net/eth.c:410:38: error: array subscript 'struct ip6_ext_hdr_routing[0]' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=array-bounds]
410 | if ((rthdr->rtype == 2) && (rthdr->segleft == 1)) {
| ~~~~~^~~~~~~~~
net/eth.c:485:24: note: while referencing 'ext_hdr'
485 | struct ip6_ext_hdr ext_hdr;
| ^~~~~~~
Cc: qemu-stable@nongnu.org
Buglink: https://bugs.launchpad.net/qemu/+bug/1879531
Reported-by: Alexander Bulekov <alxndr@bu.edu>
Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Miroslav Rezanina <mrezanin@redhat.com>
Fixes:
|
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|
Peter Maydell
|
bdee969c0e |
* fixes for i386 TCG paging
* fixes for Hyper-V enlightenments * avoid uninitialized variable warning -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmBUt1QUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNa+QgAjcOo9t4cP9CMAM+BwI3qe+iVo1Ug OzfLEtACd7BWeB7gZLzbX0ga926/ZQ5WJpgvKQmIdOOCM1PY07WbFogOkpk1B3IZ XyCSBneyqrlojSBsSzW3L//GNCyCD0aY8dIWPipsNenz5S/ObS7VMDzEoWOOElva wDctnxNRcGmRjs1HnXADyG3yBm8+vEhMImMXxTZdWAlxyL+wI/Aq+VdfkeAD47kZ uO0Z291KgYy3iyeZGxqJJJtVZGK8RPp8toM/ociMrk65gG+igctJdR/FRZY6SP7x 2TkPoohJLwEehTBM7qP+36VVRvskwKwG/jwVxwORXFv4KNxBRaOCtaAMVQ== =OBel -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fixes for i386 TCG paging * fixes for Hyper-V enlightenments * avoid uninitialized variable warning # gpg: Signature made Fri 19 Mar 2021 14:38:12 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: tests/qtest: cleanup the testcase for bug 1878642 hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable i386: Make migration fail when Hyper-V reenlightenment was enabled but 'user_tsc_khz' is unset i386: Fix 'hypercall_hypercall' typo target/i386: svm: do not discard high 32 bits of EXITINFO1 target/i386: fail if toggling LA57 in 64-bit mode target/i386: allow modifying TCG phys-addr-bits qom: use qemu_printf to print help for user-creatable objects Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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|
Paolo Bonzini
|
af05ffffd7 |
tests/qtest: cleanup the testcase for bug 1878642
Clean up the writes to the configuration space and the PM region, and rename the test to lpc-ich9-test. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Markus Armbruster
|
9585376ab5 |
fuzz: Avoid deprecated misuse of -drive if=sd
qemu-fuzz-i386-target-generic-fuzz-sdhci-v3 uses -drive=sd where it
should use -drive if=none instead. This prints a deprecation warning:
$ ./build-oss-fuzz/DEST_DIR/qemu-fuzz-i386-target-generic-fuzz-sdhci-v3 -runs=1 -seed=1
[ASan warnings snipped...]
--> i386: -drive if=sd,index=0,file=null-co://,format=raw,id=mydrive: warning: bogus if=sd is deprecated, use if=none
INFO: Seed: 1
[More normal output snipped...]
Support for this usage will be gone soon. Adjust the test.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210319132008.1830950-1-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
|
||
|
Kevin Wolf
|
9695c3af3a |
tests: Drop 'props' from object-add calls
The 'props' option has been deprecated in 5.0 in favour of a flattened object-add command. Time to change our test cases to drop the deprecated option. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Peter Krempa <pkrempa@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> |
||
|
Peter Maydell
|
1b507e55f8 |
Remove many old deprecated features
The following features have been deprecated for well over the 2
release cycle we promise
``-drive file=json:{...{'driver':'file'}}`` (since 3.0)
``-vnc acl`` (since 4.0.0)
``-mon ...,control=readline,pretty=on|off`` (since 4.1)
``migrate_set_downtime`` and ``migrate_set_speed`` (since 2.8.0)
``query-named-block-nodes`` result ``encryption_key_missing`` (since 2.10.0)
``query-block`` result ``inserted.encryption_key_missing`` (since 2.10.0)
``migrate-set-cache-size`` and ``query-migrate-cache-size`` (since 2.11.0)
``query-named-block-nodes`` and ``query-block`` result dirty-bitmaps[i].status (since 4.0)
``query-cpus`` (since 2.12.0)
``query-cpus-fast`` ``arch`` output member (since 3.0.0)
``query-events`` (since 4.0)
chardev client socket with ``wait`` option (since 4.0)
``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`` (since 4.0.0)
``ide-drive`` (since 4.2)
``scsi-disk`` (since 4.2)
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=cFRH
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/berrange-gitlab/tags/dep-many-pull-request' into staging
Remove many old deprecated features
The following features have been deprecated for well over the 2
release cycle we promise
``-drive file=json:{...{'driver':'file'}}`` (since 3.0)
``-vnc acl`` (since 4.0.0)
``-mon ...,control=readline,pretty=on|off`` (since 4.1)
``migrate_set_downtime`` and ``migrate_set_speed`` (since 2.8.0)
``query-named-block-nodes`` result ``encryption_key_missing`` (since 2.10.0)
``query-block`` result ``inserted.encryption_key_missing`` (since 2.10.0)
``migrate-set-cache-size`` and ``query-migrate-cache-size`` (since 2.11.0)
``query-named-block-nodes`` and ``query-block`` result dirty-bitmaps[i].status (since 4.0)
``query-cpus`` (since 2.12.0)
``query-cpus-fast`` ``arch`` output member (since 3.0.0)
``query-events`` (since 4.0)
chardev client socket with ``wait`` option (since 4.0)
``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`` (since 4.0.0)
``ide-drive`` (since 4.2)
``scsi-disk`` (since 4.2)
# gpg: Signature made Thu 18 Mar 2021 09:23:39 GMT
# gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full]
# gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* remotes/berrange-gitlab/tags/dep-many-pull-request:
block: remove support for using "file" driver with block/char devices
block: remove 'dirty-bitmaps' field from 'BlockInfo' struct
block: remove dirty bitmaps 'status' field
block: remove 'encryption_key_missing' flag from QAPI
hw/scsi: remove 'scsi-disk' device
hw/ide: remove 'ide-drive' device
chardev: reject use of 'wait' flag for socket client chardevs
machine: remove 'arch' field from 'query-cpus-fast' QMP command
machine: remove 'query-cpus' QMP command
migrate: remove QMP/HMP commands for speed, downtime and cache size
monitor: remove 'query-events' QMP command
monitor: raise error when 'pretty' option is used with HMP
ui, monitor: remove deprecated VNC ACL option and HMP commands
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
||
|
Daniel P. Berrangé
|
8af54b9172 |
machine: remove 'query-cpus' QMP command
The newer 'query-cpus-fast' command avoids side effects on the guest execution. Note that some of the field names are different in the 'query-cpus-fast' command. Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Tested-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
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Daniel P. Berrangé
|
cbde7be900 |
migrate: remove QMP/HMP commands for speed, downtime and cache size
The generic 'migrate_set_parameters' command handle all types of param. Only the QMP commands were documented in the deprecations page, but the rationale for deprecating applies equally to HMP, and the replacements exist. Furthermore the HMP commands are just shims to the QMP commands, so removing the latter breaks the former unless they get re-implemented. Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
||
|
Alexander Bulekov
|
25d309fb0d |
fuzz: configure a sparse-mem device, by default
The generic-fuzzer often provides randomized DMA addresses to virtual-devices. For a 64-bit address-space, the chance of these randomized addresses coinciding with RAM regions, is fairly small. Even though the fuzzer's instrumentation eventually finds valid addresses, this can take some-time, and slows-down fuzzing progress (especially, when multiple DMA buffers are involved). To work around this, create "fake" sparse-memory that spans all of the 64-bit address-space. Adjust the DMA call-back to populate this sparse memory, correspondingly Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
d7da0e5601 |
fuzz: add a am53c974 generic-fuzzer config
Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
d0614b8e7a |
fuzz: don't leave orphan llvm-symbolizers around
I noticed that with a sufficiently small timeout, the fuzzer fork-server sometimes locks up. On closer inspection, the issue appeared to be caused by entering our SIGALRM handler, while libfuzzer is in it's crash handlers. Because libfuzzer relies on pipe communication with an external child process to print out stack-traces, we shouldn't exit early, and leave an orphan child. Check for children in the SIGALRM handler to avoid this issue. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexander Bulekov
|
e8a2a62106 |
fuzz: fix the pro100 generic-fuzzer config
The device-type names for the pro100 network cards, are i8255.. We were matching "eepro", which catches the PCI PIO/MMIO regions for those devices, however misses the actual PCI device, which we use to map the BARs, before fuzzing. Fix that Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Philippe Mathieu-Daudé
|
b43957dcdd |
tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available
This test fails when QEMU is built without the virtio-scsi device, restrict it to its availability. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Philippe Mathieu-Daudé
|
c887d3339e |
tests/qtest: Only run fuzz-megasas-test if megasas device is available
This test fails when QEMU is built without the megasas device, restrict it to its availability. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
||
|
Alexey Kirillov
|
3c3b656885 |
tests: Add tests for query-netdev command
A simply qtest that checks for correct number of netdevs in the response of the query-netdev. Signed-off-by: Alexey Kirillov <lekiravi@yandex-team.ru> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> |
||
|
Hao Wu
|
999be4a2d3 |
tests/qtest: Test PWM fan RPM using MFT in PWM test
This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm test. It tests whether the MFT module can measure correct fan values for a PWM fan in NPCM7XX boards. Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210311180855.149764-6-wuhaotsh@google.com [PMM: fixed format strings for printing uint64_t] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
6f34661b6c |
Pull request
-----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmBJQHkSHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748EdsP/2U2CGTM95tjDunTs9uZV/7zM6PWt85M vAPItNVU2jYPfzmaJN8twrzlj0PEDhvB9Q+OJjE4HEGxEbPcdblLg/R6Zs/EaWuY N6oKHPXnOnHb+e80UUJdiAq+Y5RUnJbb5L3ArycnVzBgws+Oj3DtqjB2VDccY4C/ Gkt23tZ7ikU4958e5VBqW2NUUrr+BQO0mqsW+sbbeE3WPj75NQc6srvS3TWvsg7W OYEyVYwm52/q2W/1a3Knfv/YO6UU9NGMpGyDLD2kwQwKbgUWYLW2BiWVwOAUldo9 De3nfKbKnFezLCZAZro20lfCa/aKwNGCOXWzlrKxqUQCmGYUx7gM1+3ahrSd5N0v zUgLdZm7O428ZHL6GujWGLA1UwwzpM9X3P3yo4c0S1J6fHypbI6a9jtewrUFvFgP TuQ7dp6cn2DTBYUcsrWilPHbTZMADYQNRD/xUtKqalYBEWy3FX5W75+OYBJKKh+X Qip68m6JBzgkszXhCcu6xlLb8ynZJr2VsHvtvIgf4NnLqNOIEgVLcMtoMZT8DPrp rIoRc5oUFz8zj5lHnJuLADBUvlCMqoCCoU3h2aqHwH8a7RGb180f+82BW9aBcb2u Jk+WgAhBUjWBBC97ReFgrINUD/qZRXVoOq8LthTuQSSyr/i1zq+oLM1F0EDXcMDm ssATku2IxL24 =moUF -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Pull request # gpg: Signature made Wed 10 Mar 2021 21:56:09 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: (22 commits) sysemu: Let VMChangeStateHandler take boolean 'running' argument sysemu/runstate: Let runstate_is_running() return bool hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards qemu-common.h: Update copyright string to 2021 tests/fp/fp-test: Replace the word 'blacklist' qemu-options: Replace the word 'blacklist' seccomp: Replace the word 'blacklist' scripts/tracetool: Replace the word 'whitelist' ui: Replace the word 'whitelist' virtio-gpu: Adjust code space style exec/memory: Use struct Object typedef fuzz-test: remove unneccessary debugging flags net: Use id_generate() in the network subsystem, too MAINTAINERS: Fix the location of tools manuals vhost_user_gpu: Drop dead check for g_malloc() failure backends/dbus-vmstate: Fix short read error handling target/hexagon/gen_tcg_funcs: Fix a typo hw/elf_ops: Fix a typo ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
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Peter Maydell
|
821e7ed167 |
* Add some missing gitlab-CI job dependencies
* Re-enable "make check SPEED=slow" * Improve the gitlab-pipeline-status script * Clean up inclusing of qtest.h headers * Improve libqos/qgraph documentation * Fix downloading problem in the acceptance tests * Remove deprecated target tilegx * Add new bsd-user maintainers -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmBHTZERHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbW1bA//Xkqv1MXiTllIp9/MaayzrCXE4QI1yosA onaEQWBuchw2oO/riyayskD516J5q0dyMlQAWx2tv9N1wFC+F8gUcP/q0zpckqhu 79DyRj9upDYrCgmGUi+0O9qelv3f7VHB6B1bBZlJzA+W7WskrXYk97dXkezvGDQa a+D95upQiOLu2cxvEWTx+Z4Gz1R4NMM/JaudnMkNy/WECLOrEQr/bEgk60dwomO2 Vdb2t1DLwmjFXXQgBvP5olVk/4vHGcDCMOD3gy8TTt7sNv3VR7re18rUdWnOQcB8 hm3IRGLYZ/JYTqKutJ4QYpOFA1hUyKOLysi3Wj/jhuzV/n028izpPbeCsuWGZ1Ck QmdOdP/g8XZzPWekEEG+pL8gZgVM/HdJAm+Ameiwq2F6ybDXS75EgBzCjFC3p1kF KA6UFUD9tw2ZGIjy5vzJToTn4wtku6n9B9sP3nHeVQYbQtSFQhfQwP02NVM66dua PLSlIPP09jtmGS/LO9j+aw72bNhMJzpEORQvnoAOsbH8cgTpu6auzvKDg2+cMqGb pXBihfvhRvfk3RV8dn2nk929FS6hxybjW3aU9iZAG+Dg0YIPwFOk/w/awgbAjhYe bwywmRZSE1mkqm6brE8J1y6SORlcvontv6PLy5NYLe6gGHJex4j8U0zWKW0qDjNr hot+/3Mstsw= =8JHZ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-03-09' into staging * Add some missing gitlab-CI job dependencies * Re-enable "make check SPEED=slow" * Improve the gitlab-pipeline-status script * Clean up inclusing of qtest.h headers * Improve libqos/qgraph documentation * Fix downloading problem in the acceptance tests * Remove deprecated target tilegx * Add new bsd-user maintainers # gpg: Signature made Tue 09 Mar 2021 10:27:29 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2021-03-09: bsd-user: Add new maintainers Remove deprecated target tilegx Acceptance Tests: restore filtering of tests by target arch Acceptance Tests: restore downloading of VM images docs/devel/qgraph: improve qgraph documentation libqos/qgraph: format qgraph comments for sphinx documentation scripts/ci/gitlab-pipeline-status: give more info when pipeline not found scripts/ci/gitlab-pipeline-status: give more information on failures scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET meson: Re-enable the possibility to run "make check SPEED=slow" docker: OpenSBI build job depends on OpenSBI container docker: EDK2 build job depends on EDK2 container docker: Alpine build job depends on Alpine container qtest: delete superfluous inclusions of qtest.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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5c6295a45b |
target-arm queue:
* Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implement a Xilinx CSU DMA model * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() -----BEGIN PGP SIGNATURE----- iQJMBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmBI0AQZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3n1WD/iXrX/YMZDrBOzP5h6sE5W/ W5tiTJBCKskRW1HduJjObFFl29yuiTzYld7+zfOTQUFgecpCN8q7AHuN0y9Sg+9B cyHNHwseOfkHE4CGe2ImjmpYSZUUEkQBtCN2OmJjsaiEoK/eZCIErPw4JMUcusLL VPccPjXS92WtqQkGshNYribMOhZnuBcvX/LsT7IL8THDVPv8OECIeq8ewTZtLMe/ l/x3D3PJ56q69EFMnYt6TS1cd9OtD7pw3Jnbfv0iStE/TiJQB92ft8H07kpE6KVI jhRkhyVBnrVI2deTFcFC+rZDQggzWGRVAbUzMikZOZycUML/zjJKEIGM2V6iCHmL bQMUOTR4GLFbVyabJ/IH6YoCFS+8hUboyQXQL0gOKtcJiryoDI3AjyKNjxRbIY3b qEV3xQYTtrS7mdrwQZqwH6Rs/54jDyX7eBNWfZwq4dOQKvnTQPQEj6iWmj4rOvma McWbhu6bAfU6ZINOxkr8HcG/AxF3IYw9Gtb8KRg7/87JRvNvxj++kqqjSRRLU4Co QUYuQnpd+ux7eSXKcRfnzd27iaZ++dKJMct4Gq8i0VASb+uk+xmkG2MiGEBVSJv8 kIK5NLzDGjWjrZd366uAUtHBnWktP/5J4DKq1XKx0mtrkt7tbU6Oh90a7rSiOgur LtpGH4IPQDwp/YGXZD86 =Qu2a -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210310' into staging target-arm queue: * Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implement a Xilinx CSU DMA model * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() # gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits) hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips hw/ssi: xilinx_spips: Clean up coding convention issues hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI hw/arm: xlnx-zynqmp: Clean up coding convention issues hw/dma: Implement a Xilinx CSU DMA model target/arm: Restrict v7A TCG cpus to TCG accel tests/qtest/sse-timer-test: Test counter scaling changes tests/qtest/sse-timer-test: Test the system timer tests/qtest/sse-timer-test: Add simple test of the SSE counter docs/system/arm/mps2.rst: Document the new mps3-an547 board hw/arm/mps2-tz: Add new mps3-an547 board hw/arm/mps2-tz: Make initsvtor0 setting board-specific hw/arm/mps2-tz: Support running APB peripherals on different clock hw/misc/mps2-scc: Implement changes for AN547 hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate hw/arm/mps2-tz: Make UART overflow IRQ board-specific hw/arm/armsse: Add SSE-300 support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
a557b00469 |
Block layer patches:
- qemu-storage-daemon: add --pidfile option - qemu-storage-daemon: CLI error messages include the option name now - vhost-user-blk export: Misc fixes - docs: Improvements for qemu-storage-daemon documentation - parallels: load bitmap extension - backup-top: Don't crash on post-finalize accesses - Improve error messages related to node-name options - iotests improvements -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmBGWHURHGt3b2xmQHJl ZGhhdC5jb20ACgkQfwmycsiPL9ZpyxAAk0gRiayMUidSzgvzU/CeUhzBsC4ayEkn dLtTZ8hl7cW/w3GjDK1Wri4MANRN/0YHjiLSzO38lfVpK0z8SJr5aU4CwhRlOKVm VWgx+OLlV4Azht9fMNF4SwUXgXhl7pUNiFMNnomb++gvqhjMCedDZcWlnVKhbuQ+ O3TKGO4tToSGaXP85jCM4xukw5HZ//4QMYg6MH0gDk8ahfE2MhyTHz64oDp412os qhxvc4bU2S5xGLaBfLGhsc6VPQFKjblG704P/Y73zeoxq12A0L2Ru98WvrNaXw7Z m54jJUINiDkJ7ZOl6W04zdeiLvs3BOrNe+7mxawOTmdkBsLOKErrhrTO1gJmHHmX kJLWEh9VYWxVbvE7C3KQt9bclR6wt+aPup4X1XE8pHtocPVONVq5bvctrVgxgK0b btN06NcK+2jQxcQkG4MnBJ8S41qmxHyIEQlQWKyUWXvKt6zsFU/NuWKMQrAfYZZi 5J+RPU/fB073LY4lpAgou0OP1/RIvQmi5zWzjWm/Qbp3JpgC+azcYvxn7UU7J71P +u8IEQ4+Q9s0gvXQAh/U8AQg2eOqAwEAyFUJl9wpPN56O03dbI8KyCV5ECIRJu49 CC8uKlJxZkbw9ZBs11SAmm/0J64WcNb2AMWxDPC8Z6oQbVaRRRznoRwRP2H6odUu uBolS43+5cI= =eAjH -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging Block layer patches: - qemu-storage-daemon: add --pidfile option - qemu-storage-daemon: CLI error messages include the option name now - vhost-user-blk export: Misc fixes - docs: Improvements for qemu-storage-daemon documentation - parallels: load bitmap extension - backup-top: Don't crash on post-finalize accesses - Improve error messages related to node-name options - iotests improvements # gpg: Signature made Mon 08 Mar 2021 17:01:41 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (30 commits) blockdev: Clarify error messages pertaining to 'node-name' block: Clarify error messages pertaining to 'node-name' docs: qsd: Explain --export nbd,name=... default MAINTAINERS: update parallels block driver iotests: add parallels-read-bitmap test iotests.py: add unarchive_sample_image() helper parallels: support bitmap extension for read-only mode block/parallels: BDRVParallelsState: add cluster_size field parallels.txt: fix bitmap L1 table description qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public block/export: port virtio-blk read/write range check block/export: port virtio-blk discard/write zeroes input validation block/export: fix vhost-user-blk export sector number calculation block/export: use VIRTIO_BLK_SECTOR_BITS block/export: fix blk_size double byteswap libqtest: add qtest_remove_abrt_handler() libqtest: add qtest_kill_qemu() libqtest: add qtest_socket_server() vhost-user-blk: fix blkcfg->num_queues endianness docs: replace insecure /tmp examples in qsd docs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexander Bulekov
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c8ffacbf7c |
fuzz-test: remove unneccessary debugging flags
These flags cause the output to look strange for 'make check', and they aren't needed to reproduce bugs, if they reappear. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210216181316.794276-1-alxndr@bu.edu> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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|
Emanuele Giuseppe Esposito
|
222455ef81 |
libqos/qgraph: format qgraph comments for sphinx documentation
Change documentation style and fix minor typos in tests/qtest/libqos/qgraph.h to automatically generate sphinx documentation in docs/devel/qgraph.rst The mechanism explanation that once was in qgraph.h is now moved to qgraph.rst There is no functional change intended. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210308073240.6363-1-eesposit@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Peter Maydell
|
bf7ca80386 |
tests/qtest/sse-timer-test: Test counter scaling changes
Test that when we change the scaling of the system counter that the system timer responds appropriately. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
||
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Peter Maydell
|
f277d1c373 |
tests/qtest/sse-timer-test: Test the system timer
Add a test which tests various parts of the functionality of the SSE system timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
||
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Peter Maydell
|
1eca58aa1d |
tests/qtest/sse-timer-test: Add simple test of the SSE counter
Add a simple qtest to exercise the new system counter device in the SSE-300. We'll add tests of the system timer device here too, so this includes scaffolding (register definitions, etc) for those. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-45-peter.maydell@linaro.org |
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Stefan Hajnoczi
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e1fa7f5591 |
libqtest: add qtest_remove_abrt_handler()
Add a function to remove previously-added abrt handler functions. Now that a symmetric pair of add/remove functions exists we can also balance the SIGABRT handler installation. The signal handler was installed each time qtest_add_abrt_handler() was called. Now it is installed when the abrt handler list becomes non-empty and removed again when the list becomes empty. The qtest_remove_abrt_handler() function will be used by vhost-user-blk-test. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20210223144653.811468-5-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Stefan Hajnoczi
|
7a23c52376 |
libqtest: add qtest_kill_qemu()
Tests that manage multiple processes may wish to kill QEMU before destroying the QTestState. Expose a function to do that. The vhost-user-blk-test testcase will need this. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20210223144653.811468-4-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Stefan Hajnoczi
|
9fb7bb0698 |
libqtest: add qtest_socket_server()
Add an API that returns a new UNIX domain socket in the listen state. The code for this was already there but only used internally in init_socket(). This new API will be used by vhost-user-blk-test. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20210223144653.811468-3-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Peter Maydell
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0436c55edf |
* fix tracing vs -daemonize (Daniel)
* detect invalid CFI configuration (Daniele) * 32-bit PVH fix (David) * forward SCSI passthrough host-status to the SCSI HBA (Hannes) * detect ill-formed id in QMP object-add (Kevin) * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng Liang) * add nodelay option for chardev (myself) * deprecate -M kernel-irqchip=off on x86 (myself) * keep .d files (myself) * Fix -trace file (myself) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmBDXMAUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroPYPwf/YeM8TYqCFCt3Th4Ap2IuMqI/7HRq iNFlKWfM2S7Gk87RaNINL96MHadOteeYSQLuh4Y6FHL1OGpWX2ZByXR//z2DARLC AuV1IncevVyQiSDQzwZj6BU7G4b8xSU3Ey5yseYv+hjUhVbiscDvpioV2USkUvD5 IJFXwL5+eRAOGma0SAcumgwu5xc5/GGh5D63vZ0R7q5eDCu69Q6/ZYvK93b6+TP7 GWboGJFcbTvYku56S4ip8VdEzxiNhfQgGNa3nNDx4ejiTt4mYAft7wy+j/iQjPW9 P0y4AYuvInCrUy1RBR1BqAE+ZXNxqby3AQ0ZTujG+YMiWLIvz5FZtGEvyg== =aCET -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fix tracing vs -daemonize (Daniel) * detect invalid CFI configuration (Daniele) * 32-bit PVH fix (David) * forward SCSI passthrough host-status to the SCSI HBA (Hannes) * detect ill-formed id in QMP object-add (Kevin) * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng Liang) * add nodelay option for chardev (myself) * deprecate -M kernel-irqchip=off on x86 (myself) * keep .d files (myself) * Fix -trace file (myself) # gpg: Signature made Sat 06 Mar 2021 10:43:12 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (23 commits) meson: Stop if cfi is enabled with system slirp trace: skip qemu_set_log_filename if no "-D" option was passed trace: fix "-trace file=..." meson: adjust timeouts for some slower tests build-sys: invoke ninja with -d keepdepfile qemu-option: do not suggest using the delay option scsi: move host_status handling into SCSI drivers scsi: inline sg_io_sense_from_errno() into the callers. scsi-generic: do not snoop the output of failed commands scsi: Add mapping for generic SCSI_HOST status to sense codes scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error codes qemu-config: add error propagation to qemu_config_parse x86/pvh: extract only 4 bytes of start address for 32 bit kernels elf_ops: correct loading of 32 bit PVH kernel lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize accel: kvm: Add aligment assert for kvm_log_clear_one_slot accel: kvm: Fix memory waste under mismatch page size vl.c: do not execute trace_init_backends() before daemonizing qom: Check for wellformed id in user_creatable_add_type() chardev: add nodelay option ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Paolo Bonzini
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dc1d91ac56 |
meson: adjust timeouts for some slower tests
Adjust the timeouts for the benchmarks (Meson 0.57 allows 0 to mean
infinite) and for the longest running tests. These are the
times that I measured and the corresponding timeouts. For generic
qtests, the target that reported the longest runtime is included.
unit tests:
test-crypto-tlscredsx509 13.15s 45s
test-crypto-tlssession 14.12s 45s
qtests:
qos-test 21.26s 60s (i386)
ahci-test 22.18s 60s
pxe-test 26.51s 60s
boot-serial-test 28.02s 60s (sparc)
prom-env-test 28.86s 60s
bios-tables-test 50.17s 120s (aarch64)
test-hmp 57.15s 120s (aarch64)
npcm7xx_pwm-test 71.27s 150s
migration-test 97.09s 150s (aarch64)
qom-test 139.20s 240s (aarch64)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Doug Evans
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e6646167cc |
tests/qtests: Add npcm7xx emc model test
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Doug Evans <dje@google.com> Message-id: 20210218212453.831406-4-dje@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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07dbfdd290 |
* fix --enable-fuzzing linker failures (Alexander)
* target/i386: Add bus lock debug exception support (Chenyi) * update documentation for preferred boolean option syntax (Daniel) * make SCSI io_timeout configurable (Hannes) * fix handling of guest recoverable SCSI errors (myself) * misc fixes (Pavel, Zheng Zhan Liang, Zihao) * fix installation of binaries with entitlements (Akihiko) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmA3tzQUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMsngf+OkbgTDouxq3qnn1K89n6j2wKlAj0 qPP+57o1sv5u5MjX0BkawXCMJfvTKJaOt/Cs8S0FaPTehfR5H0T2tL76KZBEdlEP /+V3EC0Qmd1S47LKIOuDkV15szvnccyjpgwaL7Osjb0Eh0SxeXd4pBTc3yYtkacu zb/srZ63U2iJZr93QwGmEJjuW57WNym6QWXF3Mrg9PFXybkXFTGumB2vZMlQc+MN RWPTUKZKAiIr/HfdvpIETXY+HzJhylvIQ8OVWtM3XDorl48OWcOat/jyeNEVYgG3 o+gxIRnfvIL+42GkmUFbOKLzT5SV6p9EYYGLTuE1kU7nc6HWoD0CdPxA3A== =UBVO -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fix --enable-fuzzing linker failures (Alexander) * target/i386: Add bus lock debug exception support (Chenyi) * update documentation for preferred boolean option syntax (Daniel) * make SCSI io_timeout configurable (Hannes) * fix handling of guest recoverable SCSI errors (myself) * misc fixes (Pavel, Zheng Zhan Liang, Zihao) * fix installation of binaries with entitlements (Akihiko) # gpg: Signature made Thu 25 Feb 2021 14:41:56 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (29 commits) tcg/i386: rdpmc: fix the the condtions chardev: do not use short form boolean options in non-QemuOpts character device descriptions vl: deprecate -writeconfig target/i386: Add bus lock debug exception support qom/object.c: Fix typo target/i386: update to show preferred boolean syntax for -cpu docs: update to show preferred boolean syntax for -cpu docs: update to show preferred boolean syntax for -vnc docs: update to show preferred boolean syntax for -chardev qemu-options: update to show preferred boolean syntax for -vnc qemu-options: update to show preferred boolean syntax for -incoming qemu-options: update to show preferred boolean syntax for -netdev qemu-options: update to show preferred boolean syntax for -spice qemu-options: update to show preferred boolean syntax for -chardev gdbstub: use preferred boolean option syntax char: don't fail when client is not connected scsi: drop 'result' argument from command_complete callback scsi-disk: pass guest recoverable errors through even for rerror=stop scsi-disk: pass SCSI status to scsi_handle_rw_error scsi: introduce scsi_sense_from_errno() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Daniel P. Berrangé
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b7d77f5a8e |
target/i386: update to show preferred boolean syntax for -cpu
The preferred syntax is to use "foo=on|off", rather than a bare "+foo" or "-foo" Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20210216191027.595031-11-berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Isaku Yamahata
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7b630d937a |
qtest/acpi/bios-tables-test: update acpi tables
update golden master acpi tables and empty bios-tables-test-allowed-diff.h. Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <de5a7f88563d39ed0cec34ff1d4cd6a1bdc927f0.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
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9a70e04359 |
acpi: add test case for -no-hpet
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <5ef9a81e49793afb42ffd19bbf1f44e269c65e93.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
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0dabb2e802 |
acpi: add test case for smm unsupported -machine smm=off
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <22f774a51255af1608b07b00b257af426adcf4ab.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
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7995d9a399 |
qtest: update tests/qtest/bios-tables-test-allowed-diff.h
The following tests will modify acpi tables. prepare qtests to allow acpi table change. add new tables for new tests. - tests/data/acpi/pc/DSDT.nohpet - tests/data/acpi/pc/FACP.nosmm - tests/data/acpi/q35/DSDT.nohpet - tests/data/acpi/q35/FACP.nosmm Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <c8285f54deab362ed839d31f0fb5bb590ab71fdd.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Xingang Wang
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2182e4058c |
tests/data/acpi/virt/DSDT.pxb: update with _CCA
Update expected DSDT files accordingly, and re-enable their testing.
diff of disassembly of changed expected files:
diff -ru -IDisassembly old/tests/data/acpi/virt/DSDT.pxb.dsl new/tests/data/acpi/virt/DSDT.pxb.dsl
--- old/tests/data/acpi/virt/DSDT.pxb.dsl 2021-02-23 09:54:18.566781350 -0500
+++ new/tests/data/acpi/virt/DSDT.pxb.dsl 2021-02-23 09:57:51.952816428 -0500
Name (_BBN, 0x80) // _BBN: BIOS Bus Number
Name (_UID, 0x80) // _UID: Unique ID
Name (_STR, Unicode ("pxb Device")) // _STR: Description String
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
{
Package (0x04)
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Xingang Wang
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451730cfe4 |
acpi: Allow pxb DSDT acpi table changes
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1612490205-48788-2-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> |
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Thomas Huth
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45d10d724b |
tests/qtest/boot-sector: Check that the guest did not panic
The s390-ccw bios code panics if it can not boot successfully. In this case, it does not make sense that we wait the full 600 seconds for the boot sector test to finish and can signal the failure immediately, thus let's check the status of the guest with the "query-status" QMP command here, too. Reported-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210212113141.854871-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Philippe Mathieu-Daudé
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421954f43b |
tests/qtest/boot-serial-test: Test Virt machine with 'max'
When using KVM, using a specific cpu type will only work if the host CPU really is that exact CPU type. During testing we can simply use the 'max' CPU which will select all the features available from the host. This allow running this test on a Cavium CN8890 (ThunderX cores). Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210205144345.2068758-4-f4bug@amsat.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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f0f75dc174 |
* HVF fixes
* Extra qos-test debugging output (Christian) * SEV secret address autodetection (James) * SEV-ES support (Thomas) * Relocatable paths bugfix (Stefan) * RR fix (Pavel) * EventNotifier fix (Greg) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmAr778UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNVLwf/V3lb/HbyqFkhacB9eqEsEXGC3Hdp hU4J11P3lGS84muByxCdfw1axCGZ5x2cJmJSE71LfCcHXxEQSx4FmfxX5xeKbp1n vHPJ1XKhsFkOYA2O6mCW4yynTfizmp+JK36wwjmG3BEXTMMC5o2V8gAnzkP1sT9l 0h454CtPq2lD0upgVIvI7AStpWXZwysh0hQEDk8TsIfFfzLNs+MJyvlPGn4pj+kN k+G3475FinPdncIBGsnRNMfiBmA4/L0L4lriQzZPV57lDfZ8sJkrmh1+/JfK6vsb FWIe6Suior6JGorzATbXrFhmNJ+FxNNEmlzSdqRxRz7CDv0SDZb7Ckv37Q== =FDIr -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * HVF fixes * Extra qos-test debugging output (Christian) * SEV secret address autodetection (James) * SEV-ES support (Thomas) * Relocatable paths bugfix (Stefan) * RR fix (Pavel) * EventNotifier fix (Greg) # gpg: Signature made Tue 16 Feb 2021 16:15:59 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (21 commits) replay: fix icount request when replaying clock access event_notifier: Set ->initialized earlier in event_notifier_init() hvf: Fetch cr4 before evaluating CPUID(1) target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT hvf: x86: Remove unused definitions target/i386/hvf: add vmware-cpuid-freq cpu feature hvf: Guard xgetbv call util/cutils: Skip "." when looking for next directory component tests/qtest/qos-test: dump QEMU command if verbose tests/qtest/qos-test: dump environment variables if verbose tests/qtest/qos-test: dump qos graph if verbose libqos/qgraph_internal: add qos_printf() and qos_printf_literal() libqos/qgraph: add qos_node_create_driver_named() sev/i386: Enable an SEV-ES guest based on SEV policy kvm/i386: Use a per-VM check for SMM capability sev/i386: Don't allow a system reset under an SEV-ES guest sev/i386: Allow AP booting under SEV-ES sev/i386: Require in-kernel irqchip support for SEV-ES guests sev/i386: Add initial support for SEV-ES sev: update sev-inject-launch-secret to make gpa optional ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Christian Schoenebeck
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b0019c995e |
tests/qtest/qos-test: dump QEMU command if verbose
If qtests are run in verbose mode (i.e. if --verbose CL argument was provided) then print the assembled qemu command line for each test. Use qos_printf() instead of g_test_message() to avoid the latter cluttering the output. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <110bef3595cb841dfa1b86733c174ac9774eb37e.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
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093360dc32 |
tests/qtest/qos-test: dump environment variables if verbose
If qtests are run in verbose mode (i.e. if --verbose CL argument was provided) then print all environment variables to stdout before running the individual tests. It is common nowadays, at least being able to output all config vectors in a build chain, especially if it is required to investigate build- and test-issues on foreign/remote machines, which includes environment variables. In the context of writing new test cases this is also useful for finding out whether there are already some existing options for common questions like is there a preferred location for writing test files to? Is there a maximum size for test data? Is there a deadline for running tests? Use qos_printf() instead of g_test_message() to avoid the latter cluttering the output. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <21d77b33c578d80b5bba1068e61fd3562958b3c2.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
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83ff78e567 |
tests/qtest/qos-test: dump qos graph if verbose
If qtests were run in verbose mode (i.e. if --verbose CL argument was provided) then dump the generated qos graph (all nodes and edges, along with their current individual availability status) to stdout, which allows to identify problems in the created qos graph e.g. when writing new qos tests. See API doc comment on function qos_dump_graph() for details. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <6bffb6e38589fb2c06a2c1b5deed33f3e710fed1.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
|
23820025af |
libqos/qgraph_internal: add qos_printf() and qos_printf_literal()
These two are macros wrapping regular printf() call. They are intended to be used instead of calling printf() directly in order to avoid breaking TAP output format. TAP output format is enabled by using --tap command line argument. Starting with glib 2.62 it is enabled by default. Unfortunately there is currently no public glib API available to check whether TAP output format is enabled. For that reason qos_printf() simply always prepends a '#' character for now. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <653a5ef61c5e7d160e4d6294e542c57ea324cee4.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
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f6a2c6eee7 |
libqos/qgraph: add qos_node_create_driver_named()
So far the qos subsystem of the qtest framework had the limitation that only one instance of the same official QEMU (QMP) driver name could be created for qtests. That's because a) the created qos node names must always be unique, b) the node name must match the official QEMU driver name being instantiated and c) all nodes are in a global space shared by all tests. This patch removes this limitation by introducing a new function qos_node_create_driver_named() which allows test case authors to specify a node name being different from the actual associated QEMU driver name. It fills the new 'qemu_name' field of QOSGraphNode for that purpose. Adjust build_driver_cmd_line() and qos_graph_node_set_availability() to correctly deal with either accessing node name vs. node's qemu_name correctly. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <3be962ff38f3396f8040deaa5ffdab525c4e0b16.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Hao Wu
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6b6e7570d6 |
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
This patch implements the FIFO mode of the SMBus module. In FIFO, the user transmits or receives at most 16 bytes at a time. The FIFO mode allows the module to transmit large amount of data faster than single byte mode. Since we only added the device in a patch that is only a few commits away in the same patch set. We do not increase the VMstate version number in this special case. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Corey Minyard <cminyard@mvista.com> Message-id: 20210210220426.3577804-6-wuhaotsh@google.com Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Hao Wu
|
d986bf729c |
hw/i2c: Add a QTest for NPCM7XX SMBus Device
This patch adds a QTest for NPCM7XX SMBus's single byte mode. It sends a byte to a device in the evaluation board, and verify the retrieved value is equivalent to the sent value. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210210220426.3577804-5-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Alexander Bulekov
|
fff7111fb9 |
fuzz: add virtio-9p configurations for fuzzing
virtio-9p devices are often used to expose a virtual-filesystem to the guest. There have been some bugs reported in this device, such as CVE-2018-19364, and CVE-2021-20181. We should fuzz this device This patch adds two virtio-9p configurations: * One with the widely used -fsdev local driver. This driver leaks some state in the form of files/directories created in the shared dir. * One with the synth driver. While it is not used in the real world, this driver won't leak leak state between fuzz inputs. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210117230924.449676-4-alxndr@bu.edu> |
||
|
Alexander Bulekov
|
8630b43f11 |
fuzz: enable dynamic args for generic-fuzz configs
For some device configurations, it is useful to configure some resources, and adjust QEMU arguments at runtime, prior to fuzzing. This patch adds an "argfunc" to generic the generic_fuzz_config. When specified, it is responsible for configuring the resources and returning a string containing the corresponding QEMU arguments. This can be useful for targets that rely on e.g.: * a temporary qcow2 image * a temporary directory * an unused TCP port used to bind the VNC server Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210117230924.449676-2-alxndr@bu.edu> |
||
|
Alexander Bulekov
|
61f90e0461 |
fuzz: log the arguments used to initialize QEMU
This is useful for building reproducers. Instead checking the code or the QEMU_FUZZ_ARGS, the arguments are at the top of the crash log. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210117201014.271610-3-alxndr@bu.edu> |
||
|
Alexander Bulekov
|
d54d9b1d12 |
fuzz: refine the ide/ahci fuzzer configs
Disks work differently depending on the x86 machine type (SATA vs PATA). Additionally, we should fuzz the atapi code paths, which might contain vulnerabilities such as CVE-2020-29443. This patch adds hard-disk and cdrom generic-fuzzer configs for both the pc (PATA) and q35 (SATA) machine types. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210120152211.109782-1-alxndr@bu.edu> |
||
|
Alexander Bulekov
|
fc1c8344e6 |
fuzz: ignore address_space_map is_write flag
We passed an is_write flag to the fuzz_dma_read_cb function to differentiate between the mapped DMA regions that need to be populated with fuzzed data, and those that don't. We simply passed through the address_space_map is_write parameter. The goal was to cut down on unnecessarily populating mapped DMA regions, when they are not read from. Unfortunately, nothing precludes code from reading from regions mapped with is_write=true. For example, see: https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg04729.html This patch removes the is_write parameter to fuzz_dma_read_cb. As a result, we will fill all mapped DMA regions with fuzzed data, ignoring the specified transfer direction. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210120060255.558535-1-alxndr@bu.edu> |
||
|
Marian Postevca
|
277a582bf8 |
tests/acpi: disallow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-6-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Marian Postevca
|
4b1f88820f |
tests/acpi: add OEM ID and OEM TABLE ID test
Add support for testing the fields OEM ID and
OEM TABLE ID in all ACPI tables for PC,Q35,MICROVM,AARCH64
Full diff of changed files disassembly:
Table tests/data/acpi/virt/FACP diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-VQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-BQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-QQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-OQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-EMIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-RMIIX0, Mon Jan 18 23:55:00 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-JROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-2ROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-WROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-YOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-TOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-LPOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 0000006A
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : AB
+[009h 0009 1] Checksum : 65
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.numamem diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-HPOMX0, Mon Jan 18 23:55:27 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-OERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-BERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-8DRTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-IN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E2
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 5C
+[009h 0009 1] Checksum : 16
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SLIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SLIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-CN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/SSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-9M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002E0 (736)
* Revision 0x01
- * Checksum 0x3F
+ * Checksum 0xFF
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/NFIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/NFIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-6M6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D1
+[009h 0009 1] Checksum : 82
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-3M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000019A5 (6565)
* Revision 0x02
- * Checksum 0x90
+ * Checksum 0x3F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/virt/FACP.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-206LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-E16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-J16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-N16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-B16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.pxb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-G16LX0, Mon Jan 18 23:55:52 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E09 (7689)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/pc/HPET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-QNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-NNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-MB7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-0C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/TPM2.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/TPM2.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-ZC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [TPM2]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface table]
[004h 0004 4] Table Length : 0000004C
[008h 0008 1] Revision : 04
-[009h 0009 1] Checksum : 72
+[009h 0009 1] Checksum : 15
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCTPM2"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-XC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-VC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.tis diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-RC7EX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000020D7 (8407)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC8
+ * Checksum 0x77
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3N7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-WN7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-DI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-BI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-9H7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.bridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.bridge, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-6H7NX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E8B (7819)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x8F
+ * Checksum 0x3E
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-KW0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-HR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-OR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 3B
+[009h 0009 1] Checksum : F5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-TR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ZR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.mmio64 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-7R0GX0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000022E4 (8932)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x9D
+ * Checksum 0x4C
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VVX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-GUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-QUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.ipmibt diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.ipmibt, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-3UX8W0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001EC4 (7876)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x2A
+ * Checksum 0xD9
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-2HJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ARJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 7B
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ERJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-IRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000130
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 36
+[009h 0009 1] Checksum : F0
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SLIT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SLIT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-MRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-PRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-TRJNX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.cphp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.cphp, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-2RJNX0, Mon Jan 18 23:58:57 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002049 (8265)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x5A
+ * Checksum 0x09
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/HPET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-V1NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-B2NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-BJ6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-UH6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ITDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-STDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000090
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : AE
+[009h 0009 1] Checksum : 4B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-WTDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-XTJEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000188
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 68
+[009h 0009 1] Checksum : 22
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0TDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/SSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-8TDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002DE (734)
* Revision 0x01
- * Checksum 0x46
+ * Checksum 0x06
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/q35/NFIT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9VDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000F0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 24
+[009h 0009 1] Checksum : D5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-DWDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-IWDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000024EF (9455)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x26
+ * Checksum 0xD5
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/q35/FACP.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-OKSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000080
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DA
+[009h 0009 1] Checksum : 77
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-5KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : C0
+[009h 0009 1] Checksum : 7A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HMAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ALYOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HMAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 98
+[009h 0009 1] Checksum : 42
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHMAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ELSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ILSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.acpihmat diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-2JSOX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000023A6 (9126)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xB3
+ * Checksum 0x62
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-1HH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-GIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-PIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-OIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.ipmikcs diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-9GH9W0, Mon Jan 18 23:58:59 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001411 (5137)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x33
+ * Checksum 0xE2
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-84PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-D5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-P5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-N5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.roothp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-83PIX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000148D (5261)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC6
+ * Checksum 0x75
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-2ZSAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-B0SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-G2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-F2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-R2SAX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000013A2 (5026)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xD9
+ * Checksum 0x88
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-D9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-K9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-L4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-W4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbrroot diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-S4COX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000C0C (3084)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x81
+ * Checksum 0x30
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/microvm/FACP.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-PZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.usb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.usb, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-XZ3FX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000019E (414)
* Revision 0x02
- * Checksum 0x72
+ * Checksum 0x21
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TX8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-QS8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.rtc diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.rtc, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-4S8BX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000194 (404)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZRMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-VMMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000052
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : E6
+[009h 0009 1] Checksum : 83
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.ioapic2 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TMMOX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000016D (365)
* Revision 0x02
- * Checksum 0x1C
+ * Checksum 0xCB
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-M6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-V6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 0000006E
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DF
+[009h 0009 1] Checksum : 7C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.pcie diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-16CGX0, Tue Jan 19 00:03:13 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000BD7 (3031)
* Revision 0x02
- * Checksum 0x99
+ * Checksum 0x48
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-4-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
||
|
Marian Postevca
|
99f84ac051 |
tests/acpi: allow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-2-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
||
|
Peter Maydell
|
7bbb12f305 |
tests/qtest/cmsdk-apb-watchdog-test: Test clock changes
Now that the CMSDK APB watchdog uses its Clock input, it will correctly respond when the system clock frequency is changed using the RCC register on in the Stellaris board system registers. Test that when the RCC register is written it causes the watchdog timer to change speed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-22-peter.maydell@linaro.org Message-id: 20210121190622.22000-22-peter.maydell@linaro.org |
||
|
Peter Maydell
|
9bc064b539 |
tests: Add a simple test of the CMSDK APB dual timer
Add a simple test of the CMSDK dual timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Message-id: 20210128114145.20536-6-peter.maydell@linaro.org Message-id: 20210121190622.22000-6-peter.maydell@linaro.org |
||
|
Peter Maydell
|
9cf5eb29b2 |
tests: Add a simple test of the CMSDK APB watchdog
Add a simple test of the CMSDK watchdog, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-5-peter.maydell@linaro.org Message-id: 20210121190622.22000-5-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
||
|
Peter Maydell
|
30858dafd1 |
tests: Add a simple test of the CMSDK APB timer
Add a simple test of the CMSDK APB timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-4-peter.maydell@linaro.org Message-id: 20210121190622.22000-4-peter.maydell@linaro.org |
||
|
Mihai Carabas
|
c0f82826a1 |
tests/qtest: add a test case for pvpanic-pci
Add a test case for pvpanic-pci device. The scenario is the same as pvpanic ISA device, but is using the PCI bus. Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> [PMM: added code to free dev and pcibus, which the oss-fuzz build otherwise complains about as a leak] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Mihai Carabas
|
677726ef1e |
hw/misc/pvpanic: split-out generic and bus dependent code
To ease the PCI device addition in next patches, split the code as follows: - generic code (read/write/setup) is being kept in pvpanic.c - ISA dependent code moved to pvpanic-isa.c Also, rename: - ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE. - TYPE_PVPANIC -> TYPE_PVPANIC_ISA. - MemoryRegion io -> mr. - pvpanic_ioport_* in pvpanic_*. Update the build system with the new files and config structure. Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Hao Wu
|
1e5ce6e10a |
hw/misc: Fix arith overflow in NPCM7XX PWM module
Fix potential overflow problem when calculating pwm_duty. 1. Ensure p->cmr and p->cnr to be from [0,65535], according to the hardware specification. 2. Changed duty to uint32_t. However, since MAX_DUTY * (p->cmr+1) can excceed UINT32_MAX, we convert them to uint64_t in computation and converted them back to uint32_t. (duty is guaranteed to be <= MAX_DUTY so it won't overflow.) Fixes: CID 1442342 Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Doug Evans <dje@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210127011142.2122790-1-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Paolo Bonzini
|
7848023ae4 |
arm: rename xlnx-zcu102.canbusN properties
The properties to attach a CANBUS object to the xlnx-zcu102 machine have a period in them. We want to use periods in properties for compound QAPI types, and besides the "xlnx-zcu102." prefix is both unnecessary and different from any other machine property name. Remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20210118162537.779542-1-pbonzini@redhat.com Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Peter Maydell
|
0bcd12fb15 |
Block layer patches:
- Fix crash on write to read-only devices - iotests: Rewrite 'check' in Python, get rid of 'groups' and allow non-numeric test case names -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmARxVARHGt3b2xmQHJl ZGhhdC5jb20ACgkQfwmycsiPL9ZxrA//TAulJrmJ0T+h/782HRzA8St+Yuzkbdhh 96xuxqG+flhiRi1gq2LOiOUnIzYGgG0x2bI1INZku3AsqNp2BG02DtX95jdxpPkg 8Yr/PGAZ1Z+/fdajphcAVujR8A9tDrfj4wNXHOfN5cPoIXobNQGwMHX4+fDWJ3yf sbeihc70JmjQ3V6Psau2YAVLCESRLfPkG571YYiNu1DmBVI5n0xgMUD4Oc6hzIPR igJ6K5EO+uacrY1b6j5WsTIn7+mmUD8EC6njNZrYcF3aq8/SsCIaLqV/+6LN589e KdvysjU3EtRbeln2Zk83m4YTL48Cpz967aCbfD908lRmsq0tu+X0LrAQoa9Y7+0x DHS7jkUAG2LOppVrSFKUSt6QxOz08z8qqCBZutdMEBTJtfiq04I/EJhdv4HqLjD8 4dE9PQITAILO2NzfbWS+vVhHOgoyIuSu4QtC2Nw6ztUiGrtqkbRRkfPLmEv3vrxn daA/yHgyJFwyKPtiubKqk20LZb/5txJKXCPpo18MVIs9r70NcqfRT6J1XVqApFQA aXPhEsBNZ/p0gCBiej98ukCb15rOqlSk7iVlSV3kIPtp/Nk5kDqC3XV48Uy+GtXW shSM4QZxoE6CoKPGkB5hWyMAAvYwyJRRJAPy7w/Rcqd3vTsfgwX7Ad0bBVQe0kpo +pMOKs0/Yk8= =gFsg -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging Block layer patches: - Fix crash on write to read-only devices - iotests: Rewrite 'check' in Python, get rid of 'groups' and allow non-numeric test case names # gpg: Signature made Wed 27 Jan 2021 19:56:00 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: iotests: rename and move 169 and 199 tests iotests: rewrite check into python iotests: add testrunner.py iotests: add testenv.py iotests: add findtests.py iotests: 146: drop extra whitespaces from .out file virtio-scsi-test: Test writing to scsi-cd device block: Separate blk_is_writable() and blk_supports_write_perm() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|
Kevin Wolf
|
720d10d67b |
virtio-scsi-test: Test writing to scsi-cd device
This tests that trying to write to a (read-only) scsi-cd device backed by a read-write image file doesn't crash and results in the correct error. This is a regression test for https://bugs.launchpad.net/bugs/1906693. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210118123448.307825-3-kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
||
|
Markus Armbruster
|
f8a9b4c665 |
libqtest: Rework qtest_rsp()
qtest_rsp() is used in two different ways: (1) return some arguments to caller, which the caller must free, and (2) return no arguments to caller. Passing non-zero @expected_args gets you (1), and passing zero gets you (2). Having "the return value must be freed" depend on an argument this way is less than ideal. Provide separate functions for the two ways: (1) qtest_rsp_args() takes @expected_args (possibly zero), and returns that number of arguments. Caller must free the return value always. (2) qtest_rsp() assumes zero, and returns nothing. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20210126151649.2220902-1-armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Stefan Berger
|
f8e3df09d2 |
tests: Fix memory leak in tpm-util.c
This patch fixes the following memory leak detected by asan:
Indirect leak of 560320 byte(s) in 136 object(s) allocated from:
#0 0x556b3b3f9b57 in calloc (/home/stefanb/tmp/qemu-tip/build/tests/qtest/tpm-crb-swtpm-test+0x23fb57)
#1 0x152b0e96b9b0 in g_malloc0 (/lib64/libglib-2.0.so.0+0x589b0)
#2 0x556b3b588f61 in parse_object /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:318:12
#3 0x556b3b588f61 in parse_value /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:546:16
#4 0x556b3b5886e8 in json_parser_parse /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:580:14
#5 0x556b3b52ff4a in json_message_process_token /home/stefanb/tmp/qemu-tip/build/../qobject/json-streamer.c:92:12
#6 0x556b3b59896f in json_lexer_feed_char /home/stefanb/tmp/qemu-tip/build/../qobject/json-lexer.c:313:13
#7 0x556b3b598443 in json_lexer_feed /home/stefanb/tmp/qemu-tip/build/../qobject/json-lexer.c:350:9
#8 0x556b3b436c70 in qmp_fd_receive /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:614:9
#9 0x556b3b435871 in qtest_qmp_receive_dict /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:636:12
#10 0x556b3b435871 in qtest_qmp_receive /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:624:27
#11 0x556b3b435c59 in qtest_vqmp /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:715:12
#12 0x556b3b435c59 in qtest_qmp /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:756:16
#13 0x556b3b4328c7 in tpm_util_wait_for_migration_complete /home/stefanb/tmp/qemu-tip/build/../tests/qtest/tpm-util.c:245:15
#14 0x556b3b4333be in tpm_test_swtpm_migration_test /home/stefanb/tmp/qemu-tip/build/../tests/qtest/tpm-tests.c:117:5
#15 0x152b0e98e29d (/lib64/libglib-2.0.so.0+0x7b29d)
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210115204637.3332555-1-stefanb@linux.vnet.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
||
|
Gan Qixin
|
3e829c0468 |
qtest/npcm7xx_pwm-test: Fix memleak in pwm_qom_get
The pwm_qom_get function didn't free "response", which caused an indirect
memory leak. So use qobject_unref() to fix it.
ASAN shows memory leak stack:
Indirect leak of 74160000 byte(s) in 18000 object(s) allocated from:
#0 0x7f96e2f79d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f96e2d98a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x556313112180 in qdict_new ../qobject/qdict.c:30
#3 0x556313115bca in parse_object ../qobject/json-parser.c:318
#4 0x556313117810 in parse_value ../qobject/json-parser.c:546
#5 0x556313117bda in json_parser_parse ../qobject/json-parser.c:580
#6 0x55631310fe67 in json_message_process_token ../qobject/json-streamer.c:92
#7 0x5563131210b7 in json_lexer_feed_char ../qobject/json-lexer.c:313
#8 0x556313121662 in json_lexer_feed ../qobject/json-lexer.c:350
#9 0x5563131101e9 in json_message_parser_feed ../qobject/json-streamer.c:121
#10 0x5563130cb81e in qmp_fd_receive ../tests/qtest/libqtest.c:614
#11 0x5563130cba2b in qtest_qmp_receive_dict ../tests/qtest/libqtest.c:636
#12 0x5563130cb939 in qtest_qmp_receive ../tests/qtest/libqtest.c:624
#13 0x5563130cbe0d in qtest_vqmp ../tests/qtest/libqtest.c:715
#14 0x5563130cc40f in qtest_qmp ../tests/qtest/libqtest.c:756
#15 0x5563130c5623 in pwm_qom_get ../tests/qtest/npcm7xx_pwm-test.c:180
#16 0x5563130c595e in pwm_get_duty ../tests/qtest/npcm7xx_pwm-test.c:210
#17 0x5563130c7529 in test_toggle ../tests/qtest/npcm7xx_pwm-test.c:447
Reported-by: Euler Robot <euler.robot@huawei.com>
Message-Id: <20210115075634.717909-1-ganqixin@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|
||
|
Jiaxun Yang
|
d2c4f3841d |
tests: Rename PAGE_SIZE definitions
As per POSIX specification of limits.h [1], OS libc may define PAGE_SIZE in limits.h. Self defined PAGE_SIZE is frequently used in tests, to prevent collosion of definition, we give PAGE_SIZE definitons reasonable prefixs. [1]: https://pubs.opengroup.org/onlinepubs/7908799/xsh/limits.h.html Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210118063808.12471-7-jiaxun.yang@flygoat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
||
|
Gan Qixin
|
73624e04a5 |
npcm7xx_adc-test: Fix memleak in adc_qom_set
The adc_qom_set function didn't free "response", which caused an indirect
memory leak. So use qobject_unref() to fix it.
ASAN shows memory leak stack:
Indirect leak of 593280 byte(s) in 144 object(s) allocated from:
#0 0x7f9a5e7e8d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f9a5e607a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x55b1bebf636b in qdict_new ../qobject/qdict.c:30
#3 0x55b1bec09699 in parse_object ../qobject/json-parser.c:318
#4 0x55b1bec0b2df in parse_value ../qobject/json-parser.c:546
#5 0x55b1bec0b6a9 in json_parser_parse ../qobject/json-parser.c:580
#6 0x55b1bec060d1 in json_message_process_token ../qobject/json-streamer.c:92
#7 0x55b1bec16a12 in json_lexer_feed_char ../qobject/json-lexer.c:313
#8 0x55b1bec16fbd in json_lexer_feed ../qobject/json-lexer.c:350
#9 0x55b1bec06453 in json_message_parser_feed ../qobject/json-streamer.c:121
#10 0x55b1bebc2d51 in qmp_fd_receive ../tests/qtest/libqtest.c:614
#11 0x55b1bebc2f5e in qtest_qmp_receive_dict ../tests/qtest/libqtest.c:636
#12 0x55b1bebc2e6c in qtest_qmp_receive ../tests/qtest/libqtest.c:624
#13 0x55b1bebc3340 in qtest_vqmp ../tests/qtest/libqtest.c:715
#14 0x55b1bebc3942 in qtest_qmp ../tests/qtest/libqtest.c:756
#15 0x55b1bebbd64a in adc_qom_set ../tests/qtest/npcm7xx_adc-test.c:127
#16 0x55b1bebbd793 in adc_write_input ../tests/qtest/npcm7xx_adc-test.c:140
#17 0x55b1bebbdf92 in test_convert_external ../tests/qtest/npcm7xx_adc-test.c:246
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210118065627.79903-1-ganqixin@huawei.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Richard Henderson
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eb94284d08 |
target/arm: Add cpu properties to control pauth
The crypto overhead of emulating pauth can be significant for some workloads. Add two boolean properties that allows the feature to be turned off, on with the architected algorithm, or on with an implementation defined algorithm. We need two intermediate booleans to control the state while parsing properties lest we clobber ID_AA64ISAR1 into an invalid intermediate state. Tested-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210111235740.462469-3-richard.henderson@linaro.org [PMM: fixed docs typo, tweaked text to clarify that the impdef algorithm is specific to QEMU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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e0cbcf1eea |
pc,pci,virtio: fixes, features
Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmAEIzcPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpKrcIALB4vyMrgBYtgirTfqYiOD6b4pFRo7oDrX+r lYCoOwzqFj/2iF6ccIZk3aamCu4bYeSt2xfW4bdldVcv6TjvEgXkWmJpEQxWMCUq gVdwa0afSzM8jqvN1HYhwhEZxGdZtdB+zzciZwYeYp56Vbf6nJsN6wkQ0ApA6yzf yJrSqUpIBHyU44Crfp5uhqIBTEK7fKurwAY7pmi5Ty/bZeiqCMa4Tt29K3btB+of XwqVjCqmvo9UJqvkCkOOtD2HJVkzOBbVzYPQBAn7gvNhkYV1esXYv46kGRJLVRyh Y2sPf7LexVxJdi+ZJf4iA9elvr8bE/EYnj7naPidVPW9VgINXog= =nQMo -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: fixes, features Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 17 Jan 2021 11:44:55 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Update _DSM method in expected files acpi: Enable pxb unit-test for ARM virt machine Kconfig: Compile PXB for ARM_VIRT acpi/gpex: Exclude pxb's resources from PCI0 acpi/gpex: Inform os to keep firmware resource map acpi: Add addr offset in build_crs acpi: Fix unmatched expected DSDT.pxb file acpi: Allow DSDT acpi table changes vhost-user-fs: add the "bootindex" property pci/shpc: don't push attention button when ejecting powered-off device Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Jiahui Cen
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ccee1a8140 |
acpi: Update _DSM method in expected files
A new _DSM #5 method is added. Update expected DSDT files accordingly, and re-enable their testing. Full diff of changed files disassembly: tests/data/acpi/microvm/DSDT.pcie.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00000BCF (3023) + * Length 0x00000BD7 (3031) * Revision 0x02 - * Checksum 0x29 + * Checksum 0x99 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1302,9 +1302,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000144C (5196) + * Length 0x00001454 (5204) * Revision 0x02 - * Checksum 0xF0 + * Checksum 0x60 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1838,9 +1838,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.memhp.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000199D (6557) + * Length 0x000019A5 (6565) * Revision 0x02 - * Checksum 0x11 + * Checksum 0x90 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1840,9 +1840,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.numamem.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000144C (5196) + * Length 0x00001454 (5204) * Revision 0x02 - * Checksum 0xF0 + * Checksum 0x60 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1838,9 +1838,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.pxb.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00001DF9 (7673) + * Length 0x00001E09 (7689) * Revision 0x02 - * Checksum 0x42 + * Checksum 0x30 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1810,9 +1810,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) @@ -3025,9 +3030,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-9-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jiahui Cen
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f698a88a77 |
acpi: Enable pxb unit-test for ARM virt machine
No matter whether the pxb is enabled or not, the CONFIG_PXB macro in test would keep undefined. And since pxb is now enabled for ARM Virt machine by default, let's enable pxb unit-test by removing the CONFIG_PXB. Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-8-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jiahui Cen
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6f9ec653f3 |
acpi: Allow DSDT acpi table changes
Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-2-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Peter Maydell
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6b63d12612 |
* UI configury cleanups and Meson conversion
* scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl/9yL8UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOl8wgAjryxhmkNRYFDrhtLqB3OirurvQlS eZEwFIE88rcv6KvE2Acw+n+0cvk40mKVE5u265VjmKgItbEQKBsmA+vo9NVY+ZDT Yz5p27AzYUM/dNgtajcUzkainzcseYMCyoXV3+7+1X67i15gxJsa7/y0jAVRyrW/ z8RJOYQC1oP9dRbhH7Y5nw6XRLpB2+CEMX2nQ/g58bM/X/vNeNxhFKAZlnm6cy4q ClX8pZYewGg/w+LKNPCUZvnSyYeErdYqoX0bKZjawp71a8/6/Qth2NDU6r1VoaKa e3zF2XRdQcSPohGAwmmCMFV1rP7DplFcKO4bQ2Q0BuI5E79MykhQeLztLA== =yW7F -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * UI configury cleanups and Meson conversion * scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround # gpg: Signature made Tue 12 Jan 2021 16:05:19 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: target/i386: Use X86Seg enum for segment registers configure: quote command line arguments in config.status configure: move Cocoa incompatibility checks to Meson configure: move GTK+ detection to Meson configure: move X11 detection to Meson gtk: remove CONFIG_GTK_GL cocoa: do not enable coreaudio automatically virtio-scsi: trace events meson: Propagate gnutls dependency Docs/RCU: Correct sample code of qatomic_rcu_set scripts/gdb: implement 'qemu bt' scripts/gdb: fix 'qemu coroutine' when users selects a non topmost stack frame meson: fix Cocoa option in summary whpx: move whpx_lapic_state from header to c file maintainers: Add me as Windows Hosted Continuous Integration maintainer cirrus/msys2: Cache msys2 mingw in a better way. cirrus/msys2: Exit powershell with $LastExitCode whpx: move internal definitions to whpx-internal.h whpx: rename whp-dispatch to whpx-internal.h meson: do not use CONFIG_VIRTFS Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Hao Wu
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73314f1384 |
hw/misc: Add QTest for NPCM7XX PWM Module
We add a qtest for the PWM in the previous patch. It proves it works as expected. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210108190945.949196-6-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Hao Wu
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77c05b0b74 |
hw/adc: Add an ADC module for NPCM7XX
The ADC is part of NPCM7XX Module. Its behavior is controled by the ADC_CON register. It converts one of the eight analog inputs into a digital input and stores it in the ADC_DATA register when enabled. Users can alter input value by using qom-set QMP command. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-4-wuhaotsh@google.com [PMM: Added missing hw/adc/trace.h file] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Paolo Bonzini
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2c9dce0196 |
meson: do not use CONFIG_VIRTFS
CONFIG_VIRTFS is not anymore part of the config_host dictionary. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Alexander Bulekov
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b677001d70 |
fuzz: map all BARs and enable PCI devices
Prior to this patch, the fuzzer found inputs to map PCI device BARs and enable the device. While it is nice that the fuzzer can do this, it added significant overhead, since the fuzzer needs to map all the BARs (regenerating the memory topology), at the start of each input. With this patch, we do this once, before fuzzing, mitigating some of this overhead. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201221181203.1853-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Gan Qixin
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661465c2e0 |
qtest/libqtest: fix heap-buffer-overflow in qtest_cb_for_every_machine()
When the length of mname is less than 5, memcpy("xenfv", mname, 5) will cause
heap buffer overflow. Therefore, use strncmp to avoid this problem.
The asan showed stack:
ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60200000f2f4 at
pc 0x7f65d8cc2225 bp 0x7ffe93cc5a60 sp 0x7ffe93cc5208 READ of size 5 at
0x60200000f2f4 thread T0
#0 0x7f65d8cc2224 in memcmp (/lib64/libasan.so.5+0xdf224)
#1 0x5632c20be95b in qtest_cb_for_every_machine tests/qtest/libqtest.c:1282
#2 0x5632c20b7995 in main tests/qtest/test-hmp.c:160
#3 0x7f65d88fed42 in __libc_start_main (/lib64/libc.so.6+0x26d42)
#4 0x5632c20b72cd in _start (build/tests/qtest/test-hmp+0x542cd)
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20210106050625.518041-1-ganqixin@huawei.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Peter Maydell
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3896895ab4 |
* Two fuzzer patches from Alexander
* Show logs of failed acceptance jobs in the gitlab-CI -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAl/gpV0RHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbUUmA//eGv+EL6Mqot42ZMuuwpDkoD4kg6yNX0m xUbvzWhWWlyIAEUZBoHb4s8vpZRuS0Zo/aGt9q3oCBdomiU72ageTT6urrbRSdH+ X5WdBpVgudKePBBvS8AtsDHkC346nZqZYop67QFiwAYScaZMXtcblIosJm7n+ogJ UwQjzPEsIzG3dX8eaMQVTnTpKlaiXQDnOEy59vOnNMpM0f7hsG7FxNYtOByvkMzS zp5ntO+ZqbP804xR15exUIISqvJQKYLdEaKkBOH99LVxyvz43oBknh/kpUrtcSam aNC5tbY3Z7WrkXwOBvAWT6my6GW9aeIGm5xu3U8wFlDS7+2bCrwxqhVxRqZWqKCd 0D+xiXsCiVmloAyWfGDqA3vqQzTPgyvwnGyrgU4R8uu4RgzvmD4dGjZhVFkWhWu1 hQXZh1JhbzjiFuIufF9x2Ccq0MQSuU2puH8scqYFKf/W1eEYoeVqFd+uEw2Dm5cg hTQQEn2pT6y6EA4x6uvKXEeF3B+N3HCYuufOYqsFerL0p5wfWGvUWnxR3f1oqtQY RmejgmaNX+Os/t0HPIR9vf5x6VIZVY5M+GsThcPFyKI5vWa5vfVokOYOQcov2COT 5hgm24L2eW3yHgcQ/Rq3bTxG7ZMaXaCWzbUJgkG/IAmsmCEY/j3TnM42BqGoPlG8 DGbWZ4cNIc4= =lmIG -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-12-21' into staging * Two fuzzer patches from Alexander * Show logs of failed acceptance jobs in the gitlab-CI # gpg: Signature made Mon 21 Dec 2020 13:38:37 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-12-21: gitlab-ci: Archive logs of acceptance tests gitlab-ci: Refactor code that show logs of failed acceptances tests/acceptance: Bump avocado requirements to 83.0 fuzz: fix the generic-fuzz-floppy config fuzz: Add more i386 configurations for fuzzing Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Markus Armbruster
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eab3a4678b |
qobject: Change qobject_to_json()'s value to GString
qobject_to_json() and qobject_to_json_pretty() build a GString, then covert it to QString. Just one of the callers actually needs a QString: qemu_rbd_parse_filename(). A few others need a string they can modify: qmp_send_response(), qga's send_response(), to_json_str(), and qmp_fd_vsend_fds(). The remainder just need a string. Change qobject_to_json() and qobject_to_json_pretty() to return the GString. qemu_rbd_parse_filename() now has to convert to QString. All others save a QString temporary. to_json_str() actually becomes a bit simpler, because GString provides more convenient modification functions. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-6-armbru@redhat.com> |
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Markus Armbruster
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6589f45991 |
qobject: Make qobject_to_json_pretty() take a pretty argument
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-4-armbru@redhat.com> |
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Alexander Bulekov
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d61368d1e9 |
fuzz: fix the generic-fuzz-floppy config
On the pc-i440fx machine, the floppy drive relies on the i8257 DMA controller. Add this device to the floppy fuzzer config, and silence the warning about a missing format specifier for the null-co:// drive. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201216203328.41112-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Alexander Bulekov
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cbe945c74c |
fuzz: Add more i386 configurations for fuzzing
This adds configurations for fuzzing the following devices on oss-fuzz: * vmxnet3 CC: Dmitry Fleytman <dmitry.fleytman@gmail.com> * ne2k * pcnet * rtl8139 CC: Jason Wang <jasowang@redhat.com> * eepro100 CC: Stefan Weil <sw@weilnetz.de> * sdhci CC: Philippe Mathieu-Daudé <f4bug@amsat.org> * ehci * ohci * ac97 * cs4231a * es1370 * sb16 CC: Gerd Hoffmann <kraxel@redhat.com> * megasas CC: Hannes Reinecke <hare@suse.com> * parallel CC: Michael S. Tsirkin <mst@redhat.com> CC: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201123184352.242907-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Paolo Bonzini
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4bfb024bc7 |
memory: clamp cached translation in case it points to an MMIO region
In using the address_space_translate_internal API, address_space_cache_init
forgot one piece of advice that can be found in the code for
address_space_translate_internal:
/* MMIO registers can be expected to perform full-width accesses based only
* on their address, without considering adjacent registers that could
* decode to completely different MemoryRegions. When such registers
* exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
* regions overlap wildly. For this reason we cannot clamp the accesses
* here.
*
* If the length is small (as is the case for address_space_ldl/stl),
* everything works fine. If the incoming length is large, however,
* the caller really has to do the clamping through memory_access_size.
*/
address_space_cache_init is exactly one such case where "the incoming length
is large", therefore we need to clamp the resulting length---not to
memory_access_size though, since we are not doing an access yet, but to
the size of the resulting section. This ensures that subsequent accesses
to the cached MemoryRegionSection will be in range.
With this patch, the enclosed testcase notices that the used ring does
not fit into the MSI-X table and prints a "qemu-system-x86_64: Cannot map used"
error.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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