Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset().
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Make TYPE_ALPHA_CPU abstract and add types <name>-alpha-cpu.
Use type inheritence, and turn "2*" models into aliases.
Move cpu_alpha_init() to cpu.c and split out CPU realization.
Default to creating type "ev67-alpha-cpu" as before.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Richard Henderson <rth@twiddle.net>
Replace cpu_init() macro with inline function for backwards
compatibility.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Richard Henderson <rth@twiddle.net>
Pass around CPUArchState instead of using global cpu_single_env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
For all targets that currently call tcg_gen_debug_insn_start,
add CPU_LOG_TB_OP_OPT to the condition that gates it.
This is useful for comparing optimization dumps, when the
pre-optimization dump is merely noise.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
For proper cmov insns, as well as the non-goto-tb case
of conditional branch.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Save the cpu_model_str so that we have a non-null value when
creating a new cpu during clone.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This softfp feature post-dates the last major update to the Alpha
fpu translation. We can make use of this to eliminate at least
one helper function that was performing this operation by hand.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This completes the transition away from AREG0. This patch must
be last because it requires CONFIG_TCG_PASS_AREG0 set too.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Scripted conversion:
sed -i "s/CPUState/CPUAlphaState/g" target-alpha/*.[hc]
sed -i "s/#define CPUAlphaState/#define CPUState/" target-alpha/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
The change in cpu.h is needed when HOST_LONG_BITS is defined in qemu-common.h.
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
The alarm is a fully general one-shot time comparator, which will be
usable under Linux as a hrtimer source. It's much more flexible than
the RTC source available on real hardware.
The wall clock allows the guest access to the host timekeeping. Much
like the KVM wall clock source for other guests.
Both are accessed via the PALcode Cserve entry point.
Signed-off-by: Richard Henderson <rth@twiddle.net>
In particular, SWPIPL is used quite a lot by the Linux kernel.
Doing this inline makes it significantly easier to step through
without the debugger getting confused by the mode switch.
Signed-off-by: Richard Henderson <rth@twiddle.net>
We had two different methods in use, both of which referenced ENV,
and neither of which indicated to the generic code when different
compilation modes are not compatible.
Signed-off-by: Richard Henderson <rth@twiddle.net>
These aren't actually used yet, but we can at least access
them via the HW_MFPR and HW_MTPR instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
The EXC_M_* constants were being set for the EV6, not as set for
the Unix kernel entry point.
Use PS_USER_MODE instead of hard-coding access to the PS register.
Signed-off-by: Richard Henderson <rth@twiddle.net>
There's no need to attempt to match EXCP_* values with PALcode entry
point offsets. Instead, compress all the values to make for more
efficient switch statements within QEMU.
We will be doing TLB fill within QEMU proper, not within the PALcode,
so all of the ITB/DTB miss, double fault, and access exceptions can
be compressed to EXCP_MMFAULT.
Compress all of the EXCP_CALL_PAL exceptions into one.
Use env->error_code to store the specific entry point.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Delete all the code that tried to emulate the real IPRs of some
unnamed CPU. Replace those with just 3 slots that we can use to
communicate trap information between the helper functions that
signal exceptions and the OS trap handler.
Signed-off-by: Richard Henderson <rth@twiddle.net>
All of the "raw" memory accesses should be "phys" instead. Fix
some confusion about argument ordering of the store routines.
Fix the implementation of store-conditional.
Delete the "alt-mode" helpers. Because we only implement two
mmu modes, let /a imply user-mode unconditionally.
Leave some combinations of virt access without permission
checks as unimplemented. There are too many hoops through
which to jump, and these insns will not be needed in the
emulation palcode.
Signed-off-by: Richard Henderson <rth@twiddle.net>
