Commit Graph

5678 Commits

Author SHA1 Message Date
aurel32
9c08393f26 target-alpha: fix syscall error check
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5689 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:31:01 +00:00
aurel32
3587f82a68 qemu: generate signals on tap I/O
Currently tap does not generate signals on I/O; this causes
network latency to be dependent on the timer tick (1ms without
dyntick, guest dependent with dyntick).  By generating a signal
on I/O, we can inform the guest immediately that a packet has
arrived.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5688 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:30:53 +00:00
aurel32
7aa763c72e Use HOST_CC instead of CC on TCG only targets
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5687 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:30:45 +00:00
aurel32
1c58b16694 Don't stop translation for mtc0 compare
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5686 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:30:37 +00:00
aurel32
dc18031fa8 Disable debug code for production.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5685 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 13:30:24 +00:00
aurel32
a6e92a658b target-mips: gen_compute_branch1()
Optimize code generation in gen_compute_branch1():
- Directly use I32 variables instead of converting values from _tl to
  _i32 and back to _tl.
- Write the result directly to bcond instead of passing by a local
  variable.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5684 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:51 +00:00
aurel32
9bf3eb2ca5 target-mips: optimize movc*()
Optimize code generation in gen_movc*():
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.
- Avoid using temporary variables to transfer values.
- Access fpu_fcr31 directly in gen_movcf_ps().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5683 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:43 +00:00
aurel32
2a0ab99899 target-mips: optimize gen_farith()
Optimize code generation in gen_farith():
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5682 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:33 +00:00
aurel32
b10fa3c906 target-mips: optimize gen_muldiv()
Optimize code generation in gen_muldiv():
- Don't do sign extension when the value is already guaranteed to be
  sign extended (otherwise, results are marked as UNPREDICTABLE).
- Access the LO, HI registers directly instead of writting them through
  a temporary variable.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5681 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:25 +00:00
aurel32
507563e85d target-mips: optimize gen_arith()/gen_arith_imm()
Optimize code generation in gen_arith()/gen_arith_imm():
- Don't do sign extension when the value is already guaranteed to be
  sign extended (otherwise, results are marked as UNPREDICTABLE).
- When the value is sign extended, compare the value to 0 instead of
  testing bit 31/63.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5680 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:50:17 +00:00
aurel32
49bcf33cc7 target-mips: convert bit shuffle ops to TCG
Bit shuffle operations can be written with very few TCG instructions
(between 5 and 8), so it is worth converting them to TCG.

This code also move all bit shuffle generation code to a separate
function in order to have a cleaner exception code path, that is it
doesn't store back the TCG register to the target register after the
exception, as the TCG register doesn't exist anymore.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:47:06 +00:00
aurel32
505ad7c2ff target-mips: convert bitfield ops to TCG
Bitfield operations can be written with very few TCG instructions
(between 2 and 5), so it is worth converting them to TCG.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:46:58 +00:00
aurel32
2623c1ecfc target-mips: optimize gen_op_addr_add() (2/2)
Instead of dynamically generating different code depending on the UX
flag, add a new flag in ctx->flags to generate different code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:39:33 +00:00
aurel32
d144d1d9e5 target-mips: optimize gen_op_addr_add() (1/2)
The user mode can be tested at translation time using ctx->hflags.
This simplifies gen_op_addr_add().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5676 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:36:52 +00:00
aurel32
1eb75d4a36 target-mips: optimize gen_save_pc()
We obviously don't need to use a temporary variable to write PC.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5675 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:36:04 +00:00
aurel32
add69063e8 target-mips: fix mft* helpers/call
This patch attempts to fix mft* helpers and the associated TCG calls.
mft* helpers do not take a register in argument, however:
- some helpers are called with an argument while they do not take one.
- some helpers are declared with an argument they don't use.

Acked-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:34:39 +00:00
aurel32
c24135ffcc target-mips: fix temporary variable freeing in op_ldst_##insn()
Move tcg_temp_free() out of the conditional part to make sure
the TCG temporary variable is freed in all cases.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Thiemo Seufer <ths@networkno.de>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5673 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:34:30 +00:00
aurel32
1f9611242b target-alpha: add proper fcntl definitions
On Alpha the target to native fcntl definitions were missing.  Because of
this, programs trying to open files with the O_CREAT option were getting
O_APPEND instead, etc.

This was keeping gcc from the spec benchmarks from running, among other
things.

(Vince Weaver)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5672 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:30:48 +00:00
aurel32
9cd38c2372 target-alpha: fix double TCG variable allocation
Noticed by Chris Krumme.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5671 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:30:04 +00:00
malc
828808f5ec Fix alignment problem with some 64bit load/store instructions
LD/STD/LWA require displacement to be multiple of 4, provide
tcg_out_ldsta which checks the supplied displacement and falls
back on indexed variant when the check fails. All uses of
LD/STD/LWA outside of tcg_out_ldst appear to be safe.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5670 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 03:04:57 +00:00
aliguori
becfc39041 KVM: simplify kvm_cpu_exec hook
We don't need to use cpu_loop_exit() because we never use the 
condition codes so everything can be folded into a single case.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5669 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 15:55:14 +00:00
aurel32
57951c2742 target-ppc: convert most SPE integer instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5668 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 11:10:23 +00:00
aurel32
970d622e8a target-alpha: fix cmpbge instruction
The cmpbge instruction should compare all 8 bytes of one 64-bit value with
another.  However, we were looping with a < 7 condition which was skipping
the top byte.  So if we were doing a compare where the top byte was
important, we could get the wrong result (this notably breaks the strlen()
function with certain sized strings).

(Vince Weaver)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5667 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 11:10:14 +00:00
balrog
e441570f8a use target_mmap() to allocate idt, gdt and ldt (Kirill A. Shutemov).
env->*dt.base should fit target address space, so we should use
target_mmap to allocate them.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5666 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 02:55:33 +00:00
balrog
8ce0f86993 Currently trying to turn an oversized directory into a VVFAT image will
result in a cryptic error (and an abort):
  qemu: block-vvfat.c:97: array_get: Assertion `index < array->next' failed.
  Aborted

Turn this into an actually useful error message:
  Directory does not fit in FAT16 (capacity 504MB)
  qemu: could not open disk image fat:$DIR/


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5665 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 01:34:27 +00:00
balrog
59795a1f92 x86 CPUID extended family/model (Andre Przywara).
x86 CPUs feature extended family/model bits in CPUID leaf
0000_0001|EAX. Refer to page 10 in:
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf

Those bits are necessary to model newer AMD CPUs:
-cpu qemu64,family=15,model=65,stepping=3 or
-cpu qemu64,family=16,model=4,stepping=2

Signed-off-by: Andre Przywara <andre.przywara@amd.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5664 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 01:05:01 +00:00
blueswir1
2576d836af Use TCG not op
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5663 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:52:36 +00:00
blueswir1
81b5b816e2 Use andc, orc, nor and nand
Also fix which argument gets negated in fandnot[12] and fornot[12]


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:50:37 +00:00
aurel32
741a7444a3 target-ppc: fix TCG argument
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5661 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 18:27:28 +00:00
aurel32
a973001797 target-ppc: Remove a few TCG temp variable leaks
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5660 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 17:27:36 +00:00
aurel32
ec6469a3b1 target-ppc: fixes for gen_op_neg()
- Rename to gen_op_arith_neg for consistency with other functions.
- Correctly free TCG temp variable.
- Fix the return value in 64-bit mode in case of overflow.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5659 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 17:27:27 +00:00
aurel32
2ef1b120d1 target-ppc: gen_op_arith_divw() & gen_op_arith_divd fixes
gen_op_arith_divw():
- "deoptimize" gen_op_arith_divw to make it more readable.
- Correctly free TCG temp variable

gen_op_arith_divd():
- Call the right function.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5658 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 17:27:19 +00:00
aurel32
1e4c090f7d target-ppc: optimize mullw and make the code more readable
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5657 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 17:27:11 +00:00
aurel32
bdc4e053d1 target-ppc: indentation fixes
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5656 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 17:27:03 +00:00
blueswir1
539390668a Sparc32 BSD user support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5655 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 09:31:37 +00:00
balrog
2d5646916d Document bluetooth support in qemu-doc.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5654 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 02:24:54 +00:00
balrog
ac4b0d0c4f Add qemu_strndup: qemu_strdup with length limit.
Also optimise qemu_strdup by using memcpy - using pstrcpy is usually 
suboptimal.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5653 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 00:28:40 +00:00
balrog
dc72ac14d8 Add the -bt switch for setting up bluetooth stuff.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5652 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 00:04:26 +00:00
balrog
793a10a2d4 Revert r5532, r5536 and a piece of r5531.
The use of strncat and strndup was correct, pstrcpy and pstrdup wasn't.
I'll try to restore building on non-gnu OSes in a later commit.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5651 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-08 23:57:26 +00:00
aliguori
4fc9af53d8 Use an option rom instead of boot sector for -kernel
Generate an option rom instead of using a hijacked boot sector for kernel
booting.  This just requires adding a small option ROM header and a few more
instructions to the boot sector to take over the int19 vector and run our
boot code.

A disk is no longer needed when using -kernel on x86.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5650 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-08 16:27:07 +00:00
aurel32
6223246ad9 target-alpha: fix the return value of stl_c/stq_c
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5649 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-08 09:10:39 +00:00
aurel32
4870167d04 target-ppc: fix tcg fatal error on i386 host
It looks like the i386 runs out of registers for allocation due
to too many global registers allocated by the ppc target.

Here is a quick and dirty fix that seems to solve the problem.
This should be considered as temporary.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5648 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-08 08:57:45 +00:00
balrog
18c5f8eab1 Use the right format string to printf sector num with DEBUG_IDE.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5647 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-07 23:05:14 +00:00
blueswir1
24646c7ed8 Fix some build issues for BSD.
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5646 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-07 16:55:48 +00:00
aurel32
57a92c8e36 target-alpha: fix locked loads/stores
Fix reading of cpu_lock in gen_qemu_stql_c, original patch from Laurent
Desnogues.

A new flag was added to gen_store_mem to allocate local temps instead
of temps;  this flag should be set when the tcg_gen_qemu_store callback
uses brcond before using the temps or else liveness analysis will get
rid of the temps.

This also adds lock printing in cpu_dump_state which can help
debug.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5645 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-07 14:00:24 +00:00
aurel32
e32ad5c268 target-ppc: fix flags computation for tcg_gen_qemu_st
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5644 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-07 13:48:25 +00:00
malc
e1638bd858 Fix interrupt exclusion via SSTEP_NOIRQ
Commit #5620 revealed an issue of the SSTEP_NOIRQ masking that was
applied on all interrupt sources (including internal ones) when single
stepping through the guest. Due to that commit, we now ended up in an
infinite loop when CPU_INTERRUPT_EXIT was pending on SSTEP resume. That
was due to #5620 eating all TBs while CPU_INTERRUPT_EXIT is pending, but
SSTEP_NOIRQ preventing CPU_INTERRUPT_EXIT to be processed.

What SSTEP_NOIRQ should actually do is to block the delivery of all
external, guest visible interrupts. With the fix below applied, single
stepping now works again.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5643 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-06 18:54:46 +00:00
aurel32
6d946cdae0 User qemu profiling
- Makefile.target:  re-enable profiling for user qemu.  It seems
  profiling was (accidently?) removed by commit 3937

- syscall.c:
    * add an include to get _mcleanup prototype
    * add a call to _mcleanup for exit_group in a way
      similar to what is done for exit

(Laurent Desnogues)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5642 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-06 16:15:18 +00:00
aurel32
afec112248 Remove unused reg_T2 definition
No longer used, remove it.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5641 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-06 16:15:08 +00:00
aliguori
825a4929da Make sure to resume the monitor only after flushing out outstanding
network traffic.

This was bug was reported by Chris Lalancette.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5640 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-06 15:30:22 +00:00