Commit Graph

11289 Commits

Author SHA1 Message Date
Richard Henderson
91493631fe tcg-hppa: Fix in/out register overlap in add2/sub2.
Handle the output log part overlapping the input high parts.
Also, improve sub2 to handle some constants the second input low part.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:57:14 +02:00
Richard Henderson
fd76e73a10 tcg-hppa: Finish the port.
Delete inline functions from tcg-target.h that don't need to be there,
move the others to tcg-target.c.  Add 'Z', 'I', 'J' constraints for
0, signed 11-bit, and signed 5-bit respectively.  Add GUEST_BASE support
similar to ppc64, with the value stored in a register.  Add missing
registers to reg_alloc_order.  Add support for 12-bit branch relocations.
Add functions for synthetic operations: addi, mtctl, dep, shd, vshd, ori,
andi, shifts, rotates, multiply, branches, setcond.  Split out TLB reads
from qemu_ld and qemu_st; fix argument loading for tlb external calls.
Generate the prologue.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Richard Henderson
f57040be4c tcg-hppa: Compute is_write in cpu_signal_handler.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Gerd Hoffmann
af92284bec update bochs vbe interface
The bochs vbe interface got a new register a while back, which specifies
the linear framebuffer size in 64k units.  This patch adds support for
the new register to qemu.  With this patch applied vgabios 0.6c works
with qemu.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Naphtali Sprei
2db7ad59fc read-only: allow read-only CDROM with any interface
Signed-off-by: Naphtali Sprei <nsprei@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Yoshiaki Tamura
f7c11b5350 Replace direct phys_ram_dirty access with wrapper functions.
Replaces direct phys_ram_dirty access with wrapper functions to prevent
direct access to the phys_ram_dirty bitmap.

Signed-off-by: Yoshiaki Tamura <tamura.yoshiaki@lab.ntt.co.jp>
Signed-off-by: OHMURA Kei <ohmura.kei@lab.ntt.co.jp>
Reviewed-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Yoshiaki Tamura
ca39b46e18 Introduce wrapper functions to access phys_ram_dirty.
Adds wrapper functions to prevent direct access to the phys_ram_dirty bitmap.

Signed-off-by: Yoshiaki Tamura <tamura.yoshiaki@lab.ntt.co.jp>
Signed-off-by: OHMURA Kei <ohmura.kei@lab.ntt.co.jp>
Reviewed-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Lars Munch
d996882703 target-arm: resource leak fixes for iwmmxt disassemble
This patch fixes few resource leaks in the iwmmxt disassemble.

Signed-off-by: Lars Munch <lars@segv.dk>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Aurelien Jarno
f7177937a2 linux-user: switch default ppc64 CPU to 970fx from 970
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
Aurelien Jarno
a175b996b2 tcg/ia64: fix tlb addend read
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 11:11:21 +02:00
malc
98926b0a25 tcg/ppc64: Fix typo
Signed-off-by: malc <av1474@comtv.ru>
2010-04-07 02:26:22 +04:00
Paolo Bonzini
55274a3052 fix 100% cpu utilization when cpu is stopped
> Hello,
>
> d6f4ade (disentangle tcg and deadline calculation, 2010-03-10)
> introduces following regression(s):
>
> 100% cpu utilization when QEMU is invoked like:
> qemu -S -s ...
>
> ditto when gdb takes control over the session via gdb-stub
> (i.e. the breakpoint is hit or C-c is pressed inside gdb to
>   interrupt the attached qemu instance)

The bug is that env->stopped is not really as comprehensive as it seems to
be (and cpu_has_work thinks); it is only valid with iothread basically,
and even then it is cleared by reset and it is not set when starting
qemu with -S.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Cc: malc <av1474@comtv.ru>
Signed-off-by: malc <av1474@comtv.ru>
2010-04-07 02:24:58 +04:00
malc
f7e2aca834 tcg/ppc: Fix typo
Signed-off-by: malc <av1474@comtv.ru>
2010-04-06 03:10:03 +04:00
malc
a884dcb804 tcg/ppc: Implment bswap16/32
Signed-off-by: malc <av1474@comtv.ru>
2010-04-06 02:54:22 +04:00
Paul Brook
61d3cf93e2 OHCI qdev conversion
Convert remaining OHCI devices to QDEV interface.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05 19:57:40 +01:00
Paul Brook
4f78c9ad5a Fix arm-linux-user
Only include hw/loader.h from target-arm/helper.c when building for
system emulation.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05 19:56:34 +01:00
Paul Brook
983fe82611 ARMv7-M reset fixes
Move ARMv7-M PC/SP initialization to the CPU reset routine.  Add a board
reset routine to call this.  Also load values directly from ROM as
images have not been copied yet.

Avoid clearing the NVIC pointer on cpu reset.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05 19:43:12 +01:00
Aurelien Jarno
116348def2 tcg/mips: use seb/seh instructions on MIPS32R2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-05 15:16:44 +02:00
Aurelien Jarno
ba0d89bbeb tcg/mips: fix 64-bit linux-user on big endian MIPS
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-05 15:16:44 +02:00
malc
aa77bebd98 tcg/ppc: Implement eqv, nand and nor
Signed-off-by: malc <av1474@comtv.ru>
2010-04-05 16:09:05 +04:00
Paul Brook
355b194369 Split TLB addend and target_phys_addr_t
Historically the qemu tlb "addend" field was used for both RAM and IO accesses,
so needed to be able to hold both host addresses (unsigned long) and guest
physical addresses (target_phys_addr_t).  However since the introduction of
the iotlb field it has only been used for RAM accesses.

This means we can change the type of addend to unsigned long, and remove
associated hacks in the big-endian TCG backends.

We can also remove the host dependence from target_phys_addr_t.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05 00:28:53 +01:00
Paul Brook
5bd2c0d7a6 UHCI spurious interrut fix
Only raise an interrupt if the TD has actually completed.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-04 21:48:31 +01:00
Paul Brook
a67ba3b6f8 Revert "Compile usb-ohci only once"
This reverts commit f1698408f1.

PCI is always little-endian. Having a user-visible "be" property is just
plain wrong.
2010-04-04 21:18:26 +01:00
malc
36368cf0d5 tcg/ppc: Fix not_i32
Thanks to Alexander Graf for bug report and a good reproducible test
case.

Signed-off-by: malc <av1474@comtv.ru>
2010-04-04 20:36:29 +04:00
Alexander Graf
4a9590f32e Make cpu_get_real_ticks use mfspr
PowerPC CPUs have had two ways to read the time base for quite some time now.
They provide it using the mfspr instruction or - if a special bit is set in
that opcode - using mftb. For timekeeping we're currently using mftb.

While trying to get Qemu up and running on an e500v2 system, I stumbled over
the CPU not supporting mftbu. It just throws an illegal instruction trap.

So let's read the SPR values instead. All PPC CPUs should support them anyways.

I tested this patch on an e500v2 system where it makes qemu work and on my 970MP
system with 32-bit user space where everything still works with this patch
applied.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: malc <av1474@comtv.ru>
2010-04-03 14:26:45 +04:00
Blue Swirl
93c5a32f89 sparc32: add IOMMU chipset doc links
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-03 07:40:47 +00:00
Blue Swirl
240566908f sparc32: rename iommu.c to sun4m_iommu.c to make room for other IOMMUs
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-03 07:35:50 +00:00
Blue Swirl
68fb89a2c0 sparc32: improve timer implementation
Timer with zero period (free-run) will never match.

Timer counting starts with tick value of 0x200, not from 0,
so the period must calculated from one tick less than the limit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-03 06:17:35 +00:00
Anthony Liguori
25da2f343c Fix build on mingw32
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-02 10:40:08 -05:00
Aurelien Jarno
9caa3ec1e9 hw/r2d: add a USB keyboard
The R2D board does not have a PS/2 port, and only support a keyboard on
the USB bus.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-02 12:16:04 +02:00
TeLeMan
98f22dc172 usb-bus: fix no params
After commit 702f3e0fb5, the params is
nerver NULL. It should check *params instead of params to determine
whether the params is empty.

Signed-off-by: TeLeMan <geleman@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-02 12:12:17 +02:00
Aurelien Jarno
8152fc0bfa Update PowerPC OpenBIOS image to r721
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-02 10:07:44 +02:00
Stefan Weil
2b3af99984 win32: Fix compiler errors from u_int64_t
u_int64_t raises compiler error messages:

  CC    libhw32/virtio.o
/qemu/ar7/hw/virtio.c: In function ‘virtio_queue_get_avail_size’:
/qemu/ar7/hw/virtio.c:776: error: ‘u_int64_t’ undeclared (first use in this function)
/qemu/ar7/hw/virtio.c:776: error: (Each undeclared identifier is reported only once
/qemu/ar7/hw/virtio.c:776: error: for each function it appears in.)

Replacing u_int64_t by uint64_t helps.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 17:01:02 -05:00
Aurelien Jarno
a18f844fb5 tcg/TODO: remove setcond
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 22:00:41 +02:00
Stefan Weil
a1606b0baa Fix compilation with missing inotify_init1
Commit c05c7a7306
breaks cross compilation for mips (and other
compilations without CONFIG_INOTIFY1):

make[1]: Entering directory `/qemu/bin/mips'
  CC    i386-linux-user/syscall.o
cc1: warnings being treated as errors
/qemu/linux-user/syscall.c: In function ‘do_syscall’:
/qemu/linux-user/syscall.c:7067: error: implicit declaration of function ‘sys_inotify_init1’

Cc: Riku Voipio <riku.voipio@nokia.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Alexander Graf
0104dcacf3 S390: Tell user why VM creation failed
The KVM kernel module on S390 refuses to create a VM when the switch_amode
kernel parameter is not used.

Since that is not exactly obvious, let's give the user a nice warning.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Alexander Graf
c92114b1fb S390: Add stub for cpu_get_phys_page_debug
We don't implement any virtual memory in the S390 target so far, so let's
add a stub for this now mandatory function.

Fixes building of S390 target.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Aurelien Jarno
477ba62001 tcg: initial ia64 support
A few words about design choices:
* On IA64, instructions should be grouped by bundle, and dependencies
  between instructions declared. A first version of this code tried to
  schedule instructions automatically, but was very complex and too
  invasive for the current common TCG code (ops not ending at
  instruction boundaries, code retranslation breaking already generated
  code, etc.)  It was also not very efficient, as dependencies between
  TCG ops is not available.
  Instead the option taken by the current implementation does not try
  to fill the bundle by scheduling instructions, but by providing ops
  not available as an ia64 instruction, and by offering 22-bit constant
  loading for most of the instructions. With both options the bundle are
  filled at approximately the same level.

* Up to 128 registers can be affected to a function on IA64, but TCG
  limits this number to 64, which is actually more than enough. The
  register affectation is the following:
  - r0: used to map a constant argument with value 0
  - r1: global pointer
  - r2, r3: internal use
  - r4 to r6: not used to avoid saving them
  - r7: env structure
  - r8 to r11: free for TCG (call clobbered)
  - r12: stack pointer
  - r13: thread pointer
  - r14 to r31: free for TCG (call clobbered)
  - r32: reserved (return address)
  - r33: reserved (PFS)
  - r33 to r63: free for TCG

* The IA64 architecture has only 64-bit registers and no 32-bit
  instructions (the only exception being cmp4). Therefore 64-bit
  registers and instructions are used for 32-bit ops. The adopted
  strategy is the same as the ABI, that is the higher 32 bits are
  undefined. Most ops (and, or, add, shl, etc.) can directly use
  the 64-bit registers, while some others have to sign-extend (sar,
  div, etc.) or zero-extend (shr, divu, etc.) the register first.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Aurelien Jarno
ebf50fb3b9 tcg: align static_code_gen_buffer to CODE_GEN_ALIGN
On ia64, the default memory alignement is not enough for a code
alignement. To fix that, force static_code_gen_buffer alignment
to CODE_GEN_ALIGN.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Aurelien Jarno
903ec55cc0 ia64 disas support
Taken from binutils SVN, using last GPLv2 version.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Aurelien Jarno
45d679d643 linux-user: fix page_unprotect when host page size > target page size
When the host page size is bigger that the target one, unprotecting a
page should:
- mark all the target pages corresponding to the host page as writable
- invalidate all tb corresponding to the host page (and not the target
  page)

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01 21:51:59 +02:00
Aurelien Jarno
60e99246d6 linux-user/ia64: workaround ia64 strangenesses
ia64 has some strangenesses that need to be workaround:
- it has a __clone2() syscall instead of the using clone() one, with
  different arguments, and which is not declared in the usual headers.
- ucontext.uc_sigmask is declared with type long int, while it is
  actually of type sigset_t.
- uc_mcontext, uc_sigmask, uc_stack, uc_link are declared using #define,
  which clashes with the target_ucontext fields. Change their names to
  tuc_*, as already done for some target architectures.
2010-04-01 21:51:58 +02:00
Michael S. Tsirkin
9bc6304c15 virtio-net: vhost net support
This connects virtio-net to vhost net backend.
The code is structured in a way analogous to what we have with vnet
header capability in tap.

We start/stop backend on driver start/stop as
well as on save and vm start (for migration).

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
b202554cf7 tap: add API to retrieve vhost net header
will be used by virtio-net for vhost net support

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
82b0d80ef6 tap: add vhost/vhostfd options
This adds vhost binary option to tap, to enable vhost net accelerator.
Default is off for now, we'll be able to make default on long term
when we know it's stable.

vhostfd option can be used by management, to pass in the fd. Assigning
vhostfd implies vhost=on.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
d59700553e vhost: vhost net support
This adds vhost net device support in qemu. Will be tied to tap device
and virtio by following patches.  Raw backend is currently missing,
will be worked on/submitted separately.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
ade80dc845 virtio-pci: fill in notifier support
Support host/guest notifiers in virtio-pci.
The last one only with kvm, that's okay
because vhost relies on kvm anyway.

Note on kvm usage: kvm ioeventfd API
is implemented on non-kvm systems as well,
this is the reason we don't need if (kvm_enabled())
around it.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
2be24aaafe virtio: move typedef to qemu-common
make it possible to use type without header include,
simplifying header dependencies.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
3e607cb503 virtio: add set_status callback
vhost net backend needs to be notified when
frontend status changes. Add a callback,
similar to set_features.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00
Michael S. Tsirkin
1cbdabe203 virtio: notifier support + APIs for queue fields
vhost needs physical addresses for ring and other queue fields,
so add APIs for these. In particular, add binding API to set
host/guest notifiers.  Will be used by vhost.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01 13:56:43 -05:00