Commit Graph

69465 Commits

Author SHA1 Message Date
Fabien Chouteau
6e2716d8ca
RISC-V: fix single stepping over ret and other branching instructions
This patch introduces wrappers around the tcg_gen_exit_tb() and
tcg_gen_lookup_and_goto_ptr() functions that handle single stepping,
i.e. call gen_exception_debug() when single stepping is enabled.

Theses functions are then used instead of the originals, bringing single
stepping handling in places where it was previously ignored such as jalr
and system branch instructions (ecall, mret, sret, etc.).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24 12:09:22 -07:00
Jonathan Behrens
b86f416763
target/riscv: Do not allow sfence.vma from user mode
The 'sfence.vma' instruction is privileged, and should only ever be allowed
when executing in supervisor mode or higher.

Signed-off-by: Jonathan Behrens <fintelia@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24 12:09:19 -07:00
Fabien Chouteau
30efbf330a
SiFive RISC-V GPIO Device
QEMU model of the GPIO device on the SiFive E300 series SOCs.

The pins are not used by a board definition yet, however this
implementation can already be used to trigger GPIO interrupts from the
software by configuring a pin as both output and input.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-24 11:58:30 -07:00
Peter Maydell
a7b21f6762 Add /proc/hardware and /proc/cpuinfo,
update SIOCXXX ioctls,
 fix shmat emulation,
 add nanoseconds in stat,
 init field fp_abi on mips
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc59R0AAoJEPMMOL0/L748px4QAJBgq468iQPge+6L2uwj4bX1
 xfclzs/HwNSZaxMj98HGHw+mMdMCZhcRMjZKBcF3bqMQ8vJEHEcHpZBVqGTxoQG9
 yDmMZzOSMPGOMjfYasKYaOLNXFexFigVI1tp1EHjuS/PEpaR/O3heFtp4ZqwBA/Y
 xIXbMVVod0my0uIBbs947CjPHFdFR7UrOvqQIUv0ptCukUsA1NNco4LxvYSur3Co
 YJgxXct9HIwueubwZKYVCxUI4SfDKuLD2aqkJGolhBSxiHMktzwR3kLdcosU0tnr
 b9ekBT6UdSVJZirLTHQOOAnU4Ph+bDrLZP3K+WaUdMndLIxWfgV6yaP0Fc5Sdmnv
 /NDctRthodYqqYXEUtSZrOAkQzVJsUoh6WHg8DKkNS22Q6Hzp6UkiAiKuKvhI/Hs
 V+5T3Wlkek8M6Zm3Hic7dCz9bATuaMrAb4j/2MI1VKbE1a2OCWruk+v7rAeMhi8d
 DOS94LJMmLHPUYviXoPyveEA60qm8jRIQAN2Yxuw3CLklDNmxY2UHY5bsfhKfkp5
 xTCyJalqUkYIMoj5j6Rtxjfo4SCg4lGyiu5/wKgD5Ry3YLr5NkTLsasutsqbvOt+
 D2JIJWny2JvCXMCkJLqffmlm96xglaPfsonrGlhufonuqw2nYyebddQLFo4rIz5b
 AYxBlo1cb5B77zpGFXC2
 =IEm6
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging

Add /proc/hardware and /proc/cpuinfo,
update SIOCXXX ioctls,
fix shmat emulation,
add nanoseconds in stat,
init field fp_abi on mips

# gpg: Signature made Fri 24 May 2019 12:24:36 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-4.1-pull-request:
  linux-user: Pass through nanosecond timestamp components for stat syscalls
  linux-user: Align mmap_find_vma to host page size
  linux-user: Fix shmat emulation by honoring host SHMLBA
  linux-user: Sanitize interp_info and, for mips only, init field fp_abi
  linux-user: Add support for SIOC<G|S>IFPFLAGS ioctls for all targets
  linux-user: Add support for SIOCSPGRP ioctl for all targets
  linux-user: Fix support for SIOCATMARK and SIOCGPGRP ioctls for xtensa
  linux-user: add pseudo /proc/hardware for m68k
  linux-user: add pseudo /proc/cpuinfo for sparc

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24 12:47:49 +01:00
Chen-Yu Tsai
5f992db605 linux-user: Pass through nanosecond timestamp components for stat syscalls
Since Linux 2.6 the stat syscalls have mostly supported nanosecond
components for each of the file-related timestamps.

QEMU user mode emulation currently does not pass through the nanosecond
portion of the timestamp, even when the host system fills in the value.
This results in a mismatch when run on subsecond resolution filesystems
such as ext4 or XFS.

An example of this leading to inconsistency is cross-debootstraping a
full desktop root filesystem of Debian Buster. Recent versions of
fontconfig store the full timestamp (instead of just the second portion)
of the directory in its per-directory cache file, and checks this against
the directory to see if the cache is up-to-date. With QEMU user mode
emulation, the timestamp stored is incorrect, and upon booting the rootfs
natively, fontconfig discovers the mismatch, and proceeds to rebuild the
cache on the comparatively slow machine (low-power ARM vs x86). This
stalls the first attempt to open whatever application that incorporates
fontconfig.

This patch renames the "unused" padding trailing each timestamp element
to its nanosecond counterpart name if such an element exists in the
kernel sources for the given platform. Not all do. Then have the syscall
wrapper fill in the nanosecond portion if the host supports it, as
specified by the _POSIX_C_SOURCE and _XOPEN_SOURCE feature macros.

Recent versions of glibc only use stat64 and newfstatat syscalls on
32-bit and 64-bit platforms respectively. The changes in this patch
were tested by directly calling the stat, stat64 and newfstatat syscalls
directly, in addition to the glibc wrapper, on arm and aarch64 little
endian targets.

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Message-Id: <20190522162147.26303-1-wens@kernel.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-05-24 13:16:21 +02:00
Richard Henderson
443b7505c6 linux-user: Align mmap_find_vma to host page size
This can avoid stack allocation failures for i386 guest
on ppc64 (64k page) host.

Suggested-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190519201953.20161-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-05-24 13:16:21 +02:00
Richard Henderson
30ab9ef296 linux-user: Fix shmat emulation by honoring host SHMLBA
For those hosts with SHMLBA > getpagesize, we don't automatically
select a guest address that is compatible with the host.  We can
achieve this by boosting the alignment of guest_base and by adding
an extra alignment argument to mmap_find_vma.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190519201953.20161-13-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-05-24 13:16:21 +02:00
Peter Maydell
40575757e1 ramfb: misc improvements.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJc57HbAAoJEEy22O7T6HE4WnIQANWL3c/Zmxq2RU++nD6J59hz
 b3+qAgwp9FZfk8FJPpo8ROY3aOcxGgWR5J8rmvDfiu3pzNa6pMTfptvPn0uRiDbd
 evhtT7rMjcKGVH7WOGuJsWkQ50bFOp59vW79puf4p8B2MtRj6UhOmLVGlYFHivwQ
 4uP8cMgeYe16QxYqn5u7IVv95MULEFEnm+QjU27kHLcLYWcZgU6ExyCr4hLYY96e
 f635/nH8bVYqWERb4xRj5e8pDOeQrlFkURjMrL8BS/ytxekIDdKwsbDwaNI6W81k
 lRzeozLqffYpPk1oRsG+5wAOmCxYbcDH+qzc5gqDNpAo4YHJWxUrwcUJzAgXqNDv
 dBmEtR2Zp4GlJVQeWBrUhLm2+YmJ9YQarscr6S5MV2p3td9OqlBN4Yxykr7hEkTG
 MoSgmtrPKEO92dQGg03psmbTafdGYpAPMp8JJrhG5NbpGZqZku0PJAzYKru3PBWc
 oNQ4YJJpHQUzfkXaC9OIFWXMieCk3wwePO0sD753tZw5jAxv9F6p4qJjZ07+jT0w
 WaRs22kF69RE0u4sUSz/4fo6+KyYFVEiTQz1tIi8Trs0L4l+10jtdeh1Cnu7iZQO
 Pf43itvTNPyz54VOBd5APekYnDAlOOMEW9KwIwoL9Pm8yThQc7uWAUQE1u6F0YVT
 mwwPDoO7XaraBlwMhEt7
 =r71e
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/kraxel/tags/vga-20190524-pull-request' into staging

ramfb: misc improvements.

# gpg: Signature made Fri 24 May 2019 09:56:59 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/vga-20190524-pull-request:
  hw/display/ramfb: initialize fw-config space with xres/ yres
  hw/display/ramfb: lock guest resolution after it's set
  hw/display/ramfb: fix guest memory un-mapping

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24 12:09:23 +01:00
Peter Maydell
636011255d Misc gvec improvements
-----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAlzlzGwdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV++1Qf/WnjdPjQvYkeFdpri
 mpnevuxgl6DAQ+5+rLbe4+DCEamvVIstuPJQ6W4MudvIk/ppKO3a5/NF2Qfypq6k
 P934kF8FjHQ33wHx+mRoH7x/yBCxIF+sujqX+8KHveSm5mxvDh8CTWIiIrHoWtrr
 cfp8pDPLCJCNXhOnoZoLPekc+zTFgdA9LOp3s0lB1UaJYUMkV2c0t8Y6MhUNSKmu
 CD0zZ7AsEy6BxHn9SmKdZld91cJDiEFSmx5kRsOuxPlPsJRpGIatdCOLz87eIR32
 gzirBSlBH/EUcTFh3j+Rdus+dsaijg7TVVzYT65kZ1a9PRMelEv1HNeW+ttmFN2F
 z5M2pA==
 =Yi4m
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190522' into staging

Misc gvec improvements

# gpg: Signature made Wed 22 May 2019 23:25:48 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190522:
  tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store
  tcg/aarch64: Allow immediates for vector ORR and BIC
  tcg/aarch64: Build vector immediates with two insns
  tcg/aarch64: Use MVNI in tcg_out_dupi_vec
  tcg/aarch64: Split up is_fimm
  tcg/aarch64: Support vector bitwise select value
  tcg/i386: Use umin/umax in expanding unsigned compare
  tcg/i386: Remove expansion for missing minmax
  tcg/i386: Support vector comparison select value
  tcg: Add TCG_OPF_NOT_PRESENT if TCG_TARGET_HAS_foo is negative
  tcg: Expand vector minmax using cmp+cmpsel
  tcg: Introduce do_op3_nofail for vector expansion
  tcg: Add support for vector compare select
  tcg: Add support for vector bitwise select
  tcg: Fix missing checks and clears in tcg_gen_gvec_dup_mem
  tcg/i386: Fix dupi/dupm for avx1 and 32-bit hosts

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24 11:07:56 +01:00
Peter Maydell
ceac83e9ba target-arm queue:
* exynos4210: QOM'ify the Exynos4210 SoC
  * exynos4210: Add DMA support for the Exynos4210
  * arm_gicv3: Fix writes to ICC_CTLR_EL3
  * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
  * target/arm: Fix vector operation segfault
  * target/arm: Minor improvements to BFXIL, EXTR
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAlzmrL8ZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3rh7D/4yQGoQOxXXe7MPJcjk7K0I
 3jlIM7Lw9JJjdc7fJyC0oNpR6sJEjbT/W+tHzb6f5reAojvloM1nMymCoR829n5w
 nxCjeWkbWo5+UGvDlPx4xLA3NaqKKahjMkPI6oyjDWgzIUZ9nFYMmoGBSGIo/ZhP
 JEJKnUoWpYXRNw8ThjmiOT3LHOLb5Bb2XrVcr5l/f0twqeiykmMbK1hZn7f9HjjF
 Kaa9kiiITxWqvQtOr+mMyMoHJ1PSvOf0FpTU6gisbAf2fcjB0vP3NsFq6PEIs61G
 J/P03qsLZrzc0Rf7b/4DCaFrdQVJ83+J8PnP8YyrubEEKY8z98SaxSkb6K++Tmji
 3bqkk/RhLoP6+WTTvWq3MlLTHmeoAKa1/8DCwzO/tCgkfcRmZgGj+LXC/XR5Nbv9
 YhXTbjNdJ4cuLJykiEodLZ1Yjx31eN6TRs8G/yX7rUbhww/TEOkRDK4MvwL3f/E0
 43QqxQ8jpPmPX1X8P3x7ap9H2qPj/LtVnbs4REURRZpA1xleeY3GDgNR2GGfnHWT
 ZXnV+Q1LSG/xu74l7SUD+5FRp72SANEi3GcMyqfapMc1qLGX/bN/ScATR+32GwSy
 0w0Ht6TIsaoVztLgh/kp3kH9xQm0YsdyaFrn48DP3Hs9iYAA22ycc2AFnaPfV9qK
 0s1zmKLB54tszS5TnXkU/g==
 =AixZ
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190523' into staging

target-arm queue:
 * exynos4210: QOM'ify the Exynos4210 SoC
 * exynos4210: Add DMA support for the Exynos4210
 * arm_gicv3: Fix writes to ICC_CTLR_EL3
 * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
 * target/arm: Fix vector operation segfault
 * target/arm: Minor improvements to BFXIL, EXTR

# gpg: Signature made Thu 23 May 2019 15:22:55 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20190523:
  hw/arm/exynos4210: QOM'ify the Exynos4210 SoC
  hw/arm/exynos4210: Add DMA support for the Exynos4210
  hw/arm/exynos4: Use the IEC binary prefix definitions
  hw/arm/exynos4: Remove unuseful debug code
  hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
  hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
  arm: Rename hw/arm/arm.h to hw/arm/boot.h
  arm: Remove unnecessary includes of hw/arm/arm.h
  arm: Move system_clock_scale to armv7m_systick.h
  target/arm: Fix vector operation segfault
  target/arm: Simplify BFXIL expansion
  target/arm: Use extract2 for EXTR

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-24 10:16:29 +01:00
Hou Qiming
f79081b4b7 hw/display/ramfb: initialize fw-config space with xres/ yres
If xres / yres were specified in QEMU command line, write them as an initial
resolution to the fw-config space on guest reset, which a later BIOS / OVMF
patch can take advantage of.

Signed-off-by: HOU Qiming <hqm03ster@gmail.com>
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Message-id: 20190513115731.17588-4-marcel.apfelbaum@gmail.com
[fixed malformed patch]
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-24 09:10:29 +02:00
Hou Qiming
a9e0cb67b7 hw/display/ramfb: lock guest resolution after it's set
Only allow one resolution change per guest boot, which prevents a
crash when the guest writes garbage to the configuration space (e.g.
when rebooting).

Signed-off-by: HOU Qiming <hqm03ster@gmail.com>
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Message-id: 20190513115731.17588-3-marcel.apfelbaum@gmail.com
[fixed malformed patch]
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-24 09:10:29 +02:00
Hou Qiming
d57f252add hw/display/ramfb: fix guest memory un-mapping
Pulled back the `qemu_create_displaysurface_guestmem` function to create
the display surface so that the guest memory gets properly unmapped.

Signed-off-by: HOU Qiming <hqm03ster@gmail.com>
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Message-id: 20190513115731.17588-2-marcel.apfelbaum@gmail.com
[rename the new functions and use QEMU coding style]
Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-05-24 09:10:29 +02:00
Philippe Mathieu-Daudé
98e4f4fdb8 hw/arm/exynos4210: QOM'ify the Exynos4210 SoC
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:44 +01:00
Guenter Roeck
59520dc65e hw/arm/exynos4210: Add DMA support for the Exynos4210
QEMU already supports pl330. Instantiate it for Exynos4210.

Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi:

/ {
    soc: soc {
        amba {
            pdma0: pdma@12680000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12680000 0x1000>;
                interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clock CLK_PDMA0>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
                #dma-channels = <8>;
                #dma-requests = <32>;
            };
            pdma1: pdma@12690000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12690000 0x1000>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clock CLK_PDMA1>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
                #dma-channels = <8>;
                #dma-requests = <32>;
            };
            mdma1: mdma@12850000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12850000 0x1000>;
                interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clock CLK_MDMA>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
                #dma-channels = <8>;
                #dma-requests = <1>;
            };
        };
    };
};

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520214342.13709-4-philmd@redhat.com
[PMD: Do not set default qdev properties, create the controllers in the SoC
      rather than the board (Peter Maydell), add dtsi in commit message]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:44 +01:00
Philippe Mathieu-Daudé
e12a0dd28d hw/arm/exynos4: Use the IEC binary prefix definitions
It eases code review, unit is explicit.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-3-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:44 +01:00
Philippe Mathieu-Daudé
67c9b59f8e hw/arm/exynos4: Remove unuseful debug code
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20190520214342.13709-2-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:44 +01:00
Peter Maydell
09380dd131 hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3
The ICC_CTLR_EL3 register includes some bits which are aliases
of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses
to keep those bits in the cs->icc_ctlr_el1[] struct fields.
Unfortunately a missing '~' in the code to update the bits
in those fields meant that writing to ICC_CTLR_EL3 would corrupt
the ICC_CLTR_EL1 register values.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-5-peter.maydell@linaro.org
2019-05-23 14:47:44 +01:00
Peter Maydell
8b7fbd6c36 hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}
In ich_vmcr_write() we enforce "writes of BPR fields to less than
their minimum sets them to the minimum" by doing a "read vbpr and
write it back" operation.  A typo here meant that we weren't handling
writes to these fields correctly, because we were reading from VBPR0
but writing to VBPR1.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190520162809.2677-4-peter.maydell@linaro.org
2019-05-23 14:47:43 +01:00
Peter Maydell
12ec8bd51e arm: Rename hw/arm/arm.h to hw/arm/boot.h
The header file hw/arm/arm.h now includes only declarations
relating to hw/arm/boot.c functionality. Rename it accordingly,
and adjust its header comment.

The bulk of this commit was created via
 perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h

In a few cases we can just delete the #include:
hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and
include/hw/arm/bcm2836.h did not require it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-4-peter.maydell@linaro.org
2019-05-23 14:47:43 +01:00
Peter Maydell
55bb1a55c7 arm: Remove unnecessary includes of hw/arm/arm.h
The hw/arm/arm.h header now only includes declarations relating
to boot.c code, so it is only needed by Arm board or SoC code.
Remove some unnecessary inclusions of it from target/arm files
and from hw/intc/armv7m_nvic.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-3-peter.maydell@linaro.org
2019-05-23 14:47:43 +01:00
Peter Maydell
807420f0b0 arm: Move system_clock_scale to armv7m_systick.h
The system_clock_scale global is used only by the armv7m systick
device; move the extern declaration to the armv7m_systick.h header,
and expand the comment to explain what it is and that it should
ideally be replaced with a different approach.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190516163857.6430-2-peter.maydell@linaro.org
2019-05-23 14:47:43 +01:00
Alistair Francis
2f143d3ad1 target/arm: Fix vector operation segfault
Commit 89e68b575 "target/arm: Use vector operations for saturation"
causes this abort() when booting QEMU ARM with a Cortex-A15:

0  0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6
1  0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6
2  0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673
3  0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386
4  0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289
5  0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612
6  0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96
7  0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901
8  0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736
9  0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407
10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728
11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431
12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735
13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709
14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502
15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread.

This patch ensures that we don't hit the abort() in the second switch
case in disas_neon_data_insn() as we will return from the first case.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:43 +01:00
Richard Henderson
87eb65a3c4 target/arm: Simplify BFXIL expansion
The mask implied by the extract is redundant with the one
implied by the deposit.  Also, fix spelling of BFXIL.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:43 +01:00
Richard Henderson
80ac954c36 target/arm: Use extract2 for EXTR
This is, after all, how we implement extract2 in tcg/aarch64.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190514011129.11330-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:47:43 +01:00
Peter Maydell
8dc7fd56dd fw_cfg patches for 2019-05-23
- Add trace events
 - Get rid of globals in fw_cfg-test
 - Explicit 'reboot-timeout' is little endian
 - Add tests for 'reboot-timeout' and 'splash-time'
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc5pTAAAoJEOPjLCzercDedJoQANff68Low2mqNWYJ1HTH+l3G
 kJjWqxyMDkCUwKJ22rDc/kcNyOve2ISOeMDvNPoZk3sjAhsPTeOZfwyJUz0T9yqm
 3epEN3IGtg7nop98On33GG7D+ThTuEn9XcVebDz41L1KtL7M7i2jMQCl7LKO58JF
 dhcqn+bbA/QLlwYX897cnqf0beofpFfqL6uGqJKA1pxTEiExmKCPcJYHu9qzH7m7
 idbhbCQBoF/CRws4NphWWLH+GiLzjj/rQJfQmLa7U/fsY0JPbs+Q1DmbAWVdtZc4
 YrBbCn4tnagOyhhhHY5zPkmYAVVAzf/3ujBkQLo8eyB9/iPfinzM2vBu+sZmTZ0Q
 3I7F9m8Gu5BN9LIozLSw48qSRyUKPb1CFhkQcrIntCUOdTuLQDqW4M9+vm3u8ZFv
 To7FPelyYFp1eb0LAbzT909zzpkg1azWuJ3JynBIq21K8/U7KokZVLo6kOJ+d27b
 85+GQCHpfAsUbEDNmO5fY80a3yOatJS1NEVpRTHeZdVlZJW59RyLTwt5++bG3kyz
 K9A2kIlEKPgXy7iJlKC9lGHcWlVTYSuG49gLrxoo80q2VNWlRiQOaT6I2tIWICW/
 URctyLaWcvBL6+UZKZ1XzNBW5e7brvTQ+fM30DVXqYKCPPwa9kj4R8D/jwEi9A6M
 t47LkbPTMdTOgtDbhIER
 =fFZr
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/fw_cfg-20190523-pull-request' into staging

fw_cfg patches for 2019-05-23

- Add trace events
- Get rid of globals in fw_cfg-test
- Explicit 'reboot-timeout' is little endian
- Add tests for 'reboot-timeout' and 'splash-time'

# gpg: Signature made Thu 23 May 2019 13:40:32 BST
# gpg:                using RSA key E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/fw_cfg-20190523-pull-request:
  tests: fw_cfg: add 'splash-time' test case
  tests: fw_cfg: add 'reboot-timeout' test case
  hw/nvram/fw_cfg: Store 'reboot-timeout' as little endian
  tests: fw_cfg: add a function to get the fw_cfg file
  tests: refactor fw_cfg_test
  tests/fw_cfg: Free QFWCFG object after qtest has run
  tests/libqos: Add pc_fw_cfg_uninit() and use it
  tests/libqos: Add io_fw_cfg_uninit() and mm_fw_cfg_uninit()
  hw/sparc64: Implement fw_cfg_arch_key_name()
  hw/sparc: Implement fw_cfg_arch_key_name()
  hw/ppc: Implement fw_cfg_arch_key_name()
  hw/i386: Implement fw_cfg_arch_key_name()
  hw/i386: Extract fw_cfg definitions to local "fw_cfg.h"
  hw/nvram/fw_cfg: Add fw_cfg_arch_key_name()
  hw/nvram/fw_cfg: Add trace events

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 14:15:34 +01:00
Li Qiang
3ae9dd1a30 tests: fw_cfg: add 'splash-time' test case
Signed-off-by: Li Qiang <liq3ea@163.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190424140643.62457-6-liq3ea@163.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Li Qiang
b41e912f32 tests: fw_cfg: add 'reboot-timeout' test case
Signed-off-by: Li Qiang <liq3ea@163.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190424140643.62457-5-liq3ea@163.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Li Qiang
04da973501 hw/nvram/fw_cfg: Store 'reboot-timeout' as little endian
The current codebase is not specific about the endianess of the
fw_cfg 'file' entry 'reboot-timeout'.

Per docs/specs/fw_cfg.txt:

  === All Other Data Items ===

  Please consult the QEMU source for the most up-to-date
  and authoritative list of selector keys and their respective
  items' purpose, format and writeability.

Checking the git history, this code was introduced in commit
ac05f34924, very similar to commit 3d3b8303c6 for the
'boot-menu-wait' entry, which explicitely use little-endian.

OVMF consumes 'boot-menu-wait' as little-endian, however it does
not consume 'reboot-timeout'.

Regarding the git history and OVMF use, we choose to explicit
'reboot-timeout' endianess as little-endian.

Signed-off-by: Li Qiang <liq3ea@163.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190424140643.62457-4-liq3ea@163.com>
[PMD: Reword commit description based on review comments]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Li Qiang
c99f5f1dd4 tests: fw_cfg: add a function to get the fw_cfg file
This is useful to write qtest about fw_cfg file entry.

Signed-off-by: Li Qiang <liq3ea@163.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190424140643.62457-3-liq3ea@163.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Li Qiang
7a44091d48 tests: refactor fw_cfg_test
Currently, fw_cfg_test uses one QTestState for every test case.
This will add all command lines for every test case and
this is unnecessary. This patch split the test cases and for
every test case it uses his own QTestState. This patch does following
things:

1. Get rid of the global 'fw_cfg', this need add a uninit function

2. Convert every test case in a separate QTestState

After this patch, we can add fw_cfg test case freely and will not
have effect on other test cases.

Signed-off-by: Li Qiang <liq3ea@163.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190424140643.62457-2-liq3ea@163.com>
[PMD: Removed 'ret' local variable in main()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
10b789b70c tests/fw_cfg: Free QFWCFG object after qtest has run
We allocate the QFWCFG object previous to run the qtests,
free it once we are finished.

Signed-off-by: Li Qiang <liq3ea@163.com>
Message-Id: <20190424140643.62457-2-liq3ea@163.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Split patch, fill commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
65461d1243 tests/libqos: Add pc_fw_cfg_uninit() and use it
The pc_fw_cfg_init() function allocates an IO QFWCFG object.
Add the pc_fw_cfg_uninit() function to deallocate it (and use it).

Signed-off-by: Li Qiang <liq3ea@163.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20190424140643.62457-2-liq3ea@163.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Split patch, fill commit description, call uninit in malloc-pc.c]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
0729d833d6 tests/libqos: Add io_fw_cfg_uninit() and mm_fw_cfg_uninit()
The mm_fw_cfg_init() allocates a QFWCFG object,
add mm_fw_cfg_uninit() to deallocate it.
Similarly with io_fw_cfg_init(), add io_fw_cfg_uninit().

Signed-off-by: Li Qiang <liq3ea@163.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190424140643.62457-2-liq3ea@163.com>
[PMD: Split patch, filled commit description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
a2b45ea508 hw/sparc64: Implement fw_cfg_arch_key_name()
Implement fw_cfg_arch_key_name(), which returns the name of a
sparc64-specific key.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-8-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
d5a42d1942 hw/sparc: Implement fw_cfg_arch_key_name()
Implement fw_cfg_arch_key_name(), which returns the name of a
sparc32-specific key.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-7-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
d632b9de78 hw/ppc: Implement fw_cfg_arch_key_name()
Implement fw_cfg_arch_key_name(), which returns the name of a
ppc-specific key.

The fw_cfg device is used by the machine using OpenBIOS:
- 40p
- mac99 (oldworld)
- g3beige (newworld)

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-6-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
bd3f680f66 hw/i386: Implement fw_cfg_arch_key_name()
Implement fw_cfg_arch_key_name(), which returns the name of a
i386-specific key.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-5-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
87abaa5d8c hw/i386: Extract fw_cfg definitions to local "fw_cfg.h"
Extract the architecture-specific fw_cfg definitions to "fw_cfg.h".

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-4-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
b15c0f7d55 hw/nvram/fw_cfg: Add fw_cfg_arch_key_name()
Add fw_cfg_arch_key_name() which returns the name of
an architecture-specific key.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-3-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Philippe Mathieu-Daudé
1f80b0d67e hw/nvram/fw_cfg: Add trace events
Add trace events to dump the key content.

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20190422195020.1494-2-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-05-23 14:10:31 +02:00
Peter Maydell
d418238dca Introduce qemu_guest_getrandom.
Use qemu_guest_getrandom in aspeed, nrf51, bcm2835, exynos4210 rng devices.
 Use qemu_guest_getrandom in target/ppc darn instruction.
 Support ARMv8.5-RNG extension.
 Support x86 RDRAND extension.
 
 Acked-by: Daniel P. Berrangé <berrange@redhat.com>
 Acked-by: Laurent Vivier <laurent@vivier.eu>
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAlzllrsdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9/qAgAuYpF/gHrkfT+IFrw
 OsgV1pPdhh+opxp44ayIQ6VC64voij0k/NnmC3/BxRv89yPqchvA6m0c2jzfGuwZ
 ICpDt7LvFTrG9k8X9vEXbOTfh5dS/5g1o0LXiGU9RmMaC/5z2ZIabxU8K1Ti3+X0
 P3B5s65rRQ8fPzOAMLEjeaHYQ/AOX/CNsmgFDve+d0b9tJY99UVO3Pb0h3+eR0s3
 /4AHWG+IACGX7MVgFIfkEbGVnwboNiT20MUq3Exn2yGgg0IbLfoUazOnbfRz9jkX
 kbN6nAZ+WDynf31SvvkEL/P6W5medf58ufJOiBB8opIp1E4WDdM30V8RkkPOyj4z
 YOBmSw==
 =2RnL
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging

Introduce qemu_guest_getrandom.
Use qemu_guest_getrandom in aspeed, nrf51, bcm2835, exynos4210 rng devices.
Use qemu_guest_getrandom in target/ppc darn instruction.
Support ARMv8.5-RNG extension.
Support x86 RDRAND extension.

Acked-by: Daniel P. Berrangé <berrange@redhat.com>
Acked-by: Laurent Vivier <laurent@vivier.eu>

# gpg: Signature made Wed 22 May 2019 19:36:43 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-rng-20190522: (25 commits)
  target/i386: Implement CPUID_EXT_RDRAND
  target/ppc: Use qemu_guest_getrandom for DARN
  target/ppc: Use gen_io_start/end around DARN
  target/arm: Implement ARMv8.5-RNG
  target/arm: Put all PAC keys into a structure
  hw/misc/exynos4210_rng: Use qemu_guest_getrandom
  hw/misc/bcm2835_rng: Use qemu_guest_getrandom_nofail
  hw/misc/nrf51_rng: Use qemu_guest_getrandom_nofail
  aspeed/scu: Use qemu_guest_getrandom_nofail
  linux-user: Remove srand call
  linux-user/aarch64: Use qemu_guest_getrandom for PAUTH keys
  linux-user: Use qemu_guest_getrandom_nofail for AT_RANDOM
  linux-user: Call qcrypto_init if not using -seed
  linux-user: Initialize pseudo-random seeds for all guest cpus
  cpus: Initialize pseudo-random seeds for all guest cpus
  util: Add qemu_guest_getrandom and associated routines
  ui/vnc: Use gcrypto_random_bytes for start_auth_vnc
  ui/vnc: Split out authentication_failed
  crypto: Change the qcrypto_random_bytes buffer type to void*
  crypto: Use getrandom for qcrypto_random_bytes
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 12:57:17 +01:00
Peter Maydell
c4600d5d41 typo fixes, TYPE_XXX usage cleanup, comments update,
virtio-mmio trace functions cleanup
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc5XOgAAoJEPMMOL0/L748VGYQAJlKRyKnq22z6PkOdhtVY+c4
 rsqwtWA4VmRkNo/3AukXvO82Rd3k6lW0NgtW56LZ7U4z6sUlf2OIDZJYwdTuISij
 hTqaZ87ThzP5+n/kUJxnnb17fzSsAr48UYXW2UxMrjMfwf9x0bOqivxa2ussx0NW
 nQDJvQPjBqSjeoPHhyXiX7x5ImmRbSJsViYvcgfhwlAFhfaWOSYzm/PSKHbAfEYU
 muYJR+XIiNRfpz5z+t/aReyxx3AmFk7fuIT/otZZ9GuDV6Ot6GRxX5je4DbjsTyB
 41ad5V/ie+6tAy7ijLJFpiEsWPf3a4+e58X84VF22DOnedtTyItairyhVvkt//6j
 rfd3QFgugshYRIKdqtgiS0aXl+NGm33np6UQRwpRwn3aMJEKXGoTOvVJ1GTZsYEo
 ytTmlfAusga5OwbIVImjafp7nt/vHdvAkxKidZUaflM8DtEnn/uMeqgVt7QtuGIq
 h0+W+3OnlgKtNc91m4Q3f9SHUfr0YnPtdVh2An9vA3RM4d1Cd08I/iQt3ZfaYk3L
 h+nv6h/ho7P0gB4qTDnzwb62A1hSl5WUHP6apcMC/sIzaO3s4KmvJTaU7574qS5C
 4m0hfQxGmPS/GO4UjjUUpeBBpGhMVyLCGnhX9bQCGogZb0nbqb6CvB1LuBJfNGsH
 8pI54eIsOdcnczceppM2
 =inQB
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging

typo fixes, TYPE_XXX usage cleanup, comments update,
virtio-mmio trace functions cleanup

# gpg: Signature made Wed 22 May 2019 17:06:56 BST
# gpg:                using RSA key F30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  pci: msix: move 'MSIX_CAP_LENGTH' to header file
  vfio: platform: fix a typo
  hw: vfio: drop TYPE_FOO MACRO in VMStateDescription
  vfio: pci: make "vfio-pci-nohotplug" as MACRO
  configure: Fix spelling of sdl-image in --help
  migration: Fix typo in migrate_add_blocker() error message
  roms: List and describe the Makefile 'clean' rule
  roms: Correct the EDK2_BASETOOLS_OPTFLAGS variable description
  hw/virtio/virtio-mmio: Convert DPRINTF to trace and log

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 12:00:37 +01:00
Peter Maydell
94b63b6007 Miscellaneous patches for 2019-05-22
-----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJc5VF0AAoJEDhwtADrkYZTF0UP/j7Mtv7/AYrike4GXMgU/8fO
 f5BzjBjJnHKFuTJH2jp9NFju1N8j79tCfuh0Ir4ZfmMbQM+dSZC4Xtd9tgGoLNs1
 iDKddlN4zUzCYYIyan2cBe69kdAox9sWjE/Y51RqoBXeA8mVFM6NOkW9qyKeXudC
 MymxafaUs3Z0a1DdTLKxlNDzsfrJPKS2BVq9CdT3+ujlFJCiaJDVtAAmccKCIplA
 TqaYceUsfxogzZRwTPzC5xzv5FQga97y+Yid4tycB2cUMjJsipCGfNu6nxFjS30W
 5fGmczz1ih3fxAH1UCZX3nL4Q2GDQMaYl9cbXUM8Q9XH2fsY0Xja9edyKK86w5N0
 5lM8Bo4dbxausAbVx1EP/Lpe+avekoWlnWOBhSrDsW3P7vJDqT+98t722e6l5Q2M
 Pzs2JLK8qNvnwDfSZdYCySYGepNMTxAJsEqTd0Bl4a8b2e0Er3mia94Ph6RRpwqZ
 buh78QUJeYmvXNROeE0EEkQP8txMTyMhcIvdll106JLJJ9CuswiVFUELCjdv5oh6
 NcMEnVM8vavkuhHWiaMv3m/QbVkMuLUt2LolpiMk56MKBcz7uR7ep8SdvNyBuffl
 /7UVY8d60pxeY+BJxBlqN/mg7YC/Grt6XpGjcqK64t9x43HMaKn5EVDZ4hV9GNX2
 9rvTtLXm/LLfIuD/y9HO
 =opvX
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-05-22' into staging

Miscellaneous patches for 2019-05-22

# gpg: Signature made Wed 22 May 2019 14:41:08 BST
# gpg:                using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-misc-2019-05-22:
  cutils: Simplify how parse_uint() checks for whitespace
  gdbstub: Fix misuse of isxdigit()
  gdbstub: Reject invalid RLE repeat counts
  tests/vhost-user-bridge: Fix misuse of isdigit()
  qemu-bridge-helper: Fix misuse of isspace()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 11:22:01 +01:00
Peter Maydell
297a082700 input: add vhost-user-input to contrib.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJc5Qe6AAoJEEy22O7T6HE40E4QALCaoOhdir3ugneC4X25qEat
 FxTB1cgsyI+s77wfIVRBq9Ut8Lg70Dxt8LW+xq8Zojp1jiU6QT05T7EK87xPDkbV
 3lKSOwXQMZp3Q/d9o0rR6zZo/GAq+U5vgRcWP2cb9Nsqb9yqsD0DLai5DQwQtETh
 l6NdxDqY6B3c/8GdPsfT5h87q+60N7JKvYhIf9TnVkGj7OmIeiwlC10qR3Daj0k/
 Xe49H5NNi+S70FUmSyrzxpYOuubs3UmTT7DQhetKnxNDB00qQJUZllmDg0Zo98wK
 fbz5U+9Ppe1t6ksA9/XusO6nyLlNRerIoz9MFjrS3fjFUMBt0t27C1jO4XP7EZSc
 TgvnDqAhm+/YAotWWCm1+solairSJjWyYaEWJBnUywac0ajC9E/PWam+1W/E4yGi
 BLQaPbXzCBgbwSjW5SP6joAEXuIgNkdNEj8PzuRMPZAroEhb0EYx/uP1slpmhVFG
 2b/dmdJ1AsbmFHHJw9On6y7Glyw4a9ZC+oUhS75MaSSXKU67G8foxspReIdKCojE
 CHAH1UKu9VQPHWjQlFM6kRwyknKC1QxaNXNbV8ONBV9bWCC6S4OTvffo0cWHgCeo
 VAGKG0zbKBBFdKI3XhKHT7+FPt4upa+YQNNf1hbRrYVsSGDftZWzXULcNkcM1HVF
 a3eNNLCZkJKYwaEcbBWe
 =DGKk
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/kraxel/tags/input-20190522-pull-request' into staging

input: add vhost-user-input to contrib.

# gpg: Signature made Wed 22 May 2019 09:26:34 BST
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/input-20190522-pull-request:
  contrib: add vhost-user-input
  libvhost-user: fix -Werror=format= on ppc64
  libvhost-user: fix cast warnings on 32 bits

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-23 10:30:21 +01:00
Richard Henderson
11e2bfef79 tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store
This instruction raises #GP, aka SIGSEGV, if the effective address
is not aligned to 16-bytes.

We have assertions in tcg-op-gvec.c that the offset from ENV is
aligned, for vector types <= V128.  But the offset itself does not
validate that the final pointer is aligned -- one must also remember
to use the QEMU_ALIGNED() attribute on the vector member within ENV.

PowerPC Altivec has vector load/store instructions that silently
discard the low 4 bits of the address, making alignment mistakes
difficult to discover.  Aid that by making the most popular host
visibly signal the error.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson
9e27f58b99 tcg/aarch64: Allow immediates for vector ORR and BIC
The allows immediates to be used for ORR and BIC,
as well as the trivial inversions, ORC and AND.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson
02f3a5b474 tcg/aarch64: Build vector immediates with two insns
Use MOVI+ORR or MVNI+BIC in order to build some vector constants,
as opposed to dropping them to the constant pool.  This includes
all 16-bit constants and a similar set of 32-bit constants.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson
7e308e003e tcg/aarch64: Use MVNI in tcg_out_dupi_vec
The compliment of a subset of immediates can be computed
with a single instruction.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson
984fdcee34 tcg/aarch64: Split up is_fimm
There are several sub-classes of vector immediate, and only MOVI
can use them all.  This will enable usage of MVNI and ORRI, which
use progressively fewer sub-classes.

This patch adds no new functionality, merely splits the function
and moves part of the logic into tcg_out_dupi_vec.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00