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110 Commits

Author SHA1 Message Date
ths
623a930ec3 Implement missing MIPS supervisor mode bits. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 19:45:05 +00:00
ths
9f77c1cdcf Remove bogus instruction decode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:52:07 +00:00
ths
7385ac0ba2 Use the standard ASE check for MIPS-3D and MT. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 17:04:27 +00:00
ths
d8a5950a62 Switch bc1any* instructions off if no MIPS-3D is implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 13:15:33 +00:00
ths
aa34373598 Use always_inline in the MIPS support where applicable. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:39:58 +00:00
ths
4e9f853731 Fix [ls][wd][lr] instructions, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:12:08 +00:00
ths
540635ba65 Code provision for n32/n64 mips userland emulation. Not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 01:58:33 +00:00
ths
fe253235b2 Wrap a few often used tests with unlikely(), by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3242 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:50:39 +00:00
ths
387a8fe505 Optimise instructions accessing CP0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 14:49:47 +00:00
ths
e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 12:48:00 +00:00
j_mayer
c068688b03 Extend TB flags to 64 bits (Alexander Graf). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 22:47:42 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
ths
ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-11 10:04:58 +00:00
ths
ead9360e2f Partial support for 34K multithreading, not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-06 00:18:15 +00:00
ths
3ddf0b5cde Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-26 17:37:23 +00:00
ths
8dfdb87c8d Implement recip1/recip2/rsqrt1/rsqrt2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-26 20:26:03 +00:00
ths
3a95e3a7d9 Check for R2 instructions, and throw RI if we don't emulate R2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-02 00:25:12 +00:00
ths
8487327a1d Make sure hflags are updated for CP0_Status changes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 17:47:07 +00:00
ths
278d070272 Simplify code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 23:42:46 +00:00
ths
5e755519ac Don't check the FPU state for each FPU instruction, use hflags to 
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 16:52:57 +00:00
ths
6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 20:36:48 +00:00
ths
9b9e4393dd MIPS64 addressing fixes, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:03:28 +00:00
ths
fd88b6abab The 24k wants more watch and srsmap registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:24:25 +00:00
ths
df1561e22d The previous patch to make breakpoints work was a performance 
disaster, use a similiar hack as ARM does instead.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:18:27 +00:00
ths
3a5b360dac Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 13:27:58 +00:00
ths
93b12ccc62 Fix indexed FP load/store instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 01:36:29 +00:00
ths
57fa1fb31c More MIPS 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 20:29:41 +00:00
ths
f469b9db01 Fix slti/sltiu for MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:45:43 +00:00
ths
5d46d55d4b Fix ldl/ldr implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:44:33 +00:00
ths
fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big. 
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 11:55:54 +00:00
ths
34ae7b51f5 Work around the lack of proper handling for self-modifying code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 01:13:09 +00:00
ths
f1b0aa5de7 Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 18:39:10 +00:00
ths
703eaf379e Don't decode CP0 XContext on 32bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 14:42:18 +00:00
ths
29929e3490 MIPS TLB style selection at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:49:44 +00:00
ths
5a1e8ffbe7 Implemented cabs FP instructions, and improve exception handling for 
trunc/floor/ceil/round.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 17:08:26 +00:00
ths
287c4b84f4 Another bit of nicer debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 10:43:55 +00:00
ths
fbcc68286a Implement FP madd/msub, wire up bc1any[24][ft]. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 09:59:10 +00:00
ths
923617a396 Improved debug output for the MIPS opcode decoder. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 00:16:06 +00:00
ths
beebb570f4 Fix for the scd instruction, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-10 00:51:01 +00:00
ths
a6763a5881 Fix MIPS64 address computation specialcase, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-09 09:33:33 +00:00
ths
5a5012ecbd MIPS 64-bit FPU support, plus some collateral bugfixes in the 
conditional branch handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 13:55:33 +00:00
ths
d6929309b6 Next attempt to get the lui sign extension right. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-25 16:41:11 +00:00
ths
7bc45061ee Fix lui sign extension. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2726 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-25 13:58:52 +00:00
ths
fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-17 15:26:47 +00:00
ths
9898128f55 Simplify branch likely handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-16 01:35:29 +00:00
ths
171b31e7c7 Don't use T2 for INS, it conflicts with branch delay slot handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 21:26:37 +00:00
ths
a85427b147 Small code generation optimization. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 19:52:12 +00:00
ths
16c00cb2c2 Restart interrupts after an exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-14 12:56:46 +00:00
ths
2f6445458e Make SYNCI_Step and CCRes CPU-specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 20:34:23 +00:00