Commit Graph

29797 Commits

Author SHA1 Message Date
Will Newton 6a57f3ebba target-arm: Move call to disas_vfp_insn out of disas_coproc_insn.
Floating point is an extension to the instruction set rather than
a coprocessor, so call it directly from the ARM and Thumb decode
functions.

Signed-off-by: Will Newton <will.newton@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1386158099-9239-2-git-send-email-will.newton@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 8202aa5391 net/cadence_gem: Don't rx packets when no rx buffer available
Return false from can_receive() when no valid buffer descriptor is
available. Ensures against mass packet droppage in some applications.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: cde00ef774e84e2586bf10fd37b542f75bf36cfb.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 3ae5725f86 net/cadence_gem: Improve can_receive debug printfery
Currently this just floods indicating that can_receive has been called
by the net framework. Instead, save the result of the most recent
can_receive callback as state and only print a message if the result
changes (indicating some sort of actual state change in GEM). Make said
debug message more meaningful as well.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 2eb74ca6a5756aea242d9f525961db95d6cfcf2c.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite e2314fda62 net/cadence_gem: Fix register w1c logic
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether the written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: ed905b04d3343966ded425f06aa2224bc7a35b59.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 191946c51f net/cadence_gem: Fix small packet FCS stripping
The minimum packet size is 64, however this is before FCS stripping
occurs. So when FCS stripping the minimum packet size is 60. Fix.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 8aac5bd737f9cf48b87f32943d7eb5939061e546.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 3057069802 net/cadence_gem: Fix rx multi-fragment packets
Bytes_to_copy was being updated before its final use where it
advances the rx buffer pointer. This was causing total mayhem,
where packet data for any subsequent fragments was being fetched
from the wrong place.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: c2a1c65c1fd06eb274442a0fa4a6839d940e145e.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 17cf2c76b6 net/cadence_gem: Add missing VMSTATE_END_OF_LIST
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 8f8c2bfb15f40fb5f0d5766aa4cd3d54c596de6a.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 64eb930176 net/cadence_gem: Implement SAR (de)activation
The Specific address registers can be enabled or disabled by software.
QEMU was assuming they were always enabled. Implement the
disable/enable feature. SARs are disabled by writing to the lower half
register. They are re-enabled by then writing the upper half.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 49efd1f7450af8f980b967d3054245bae137866c.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite a03f742983 net/cadence_gem: Implement SAR match bit in rx desc
Bit 27 of the RX buffer desc word 1 should be set when the packet was
accepted due to specific address register match. Implement.

This feature is absent from the Xilinx documentation (UG585) but the
behaviour is tested as accurate on real hardware.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 7e3f26fc4ab244e8123efc12723e7164730abdcb.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 63af1e0cff net/cadence_gem: Implement RX descriptor match mode flags
The various Rx packet address matching mode flags were not being set in
the rx descriptor. Implement.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 6002a24a6a8ceaa11d3009ab5392840d1c084b28.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 06c2fe951d net/cadence_gem: Prefetch rx descriptors ASAP
The real hardware prefetches rx buffer descriptors ASAP and
potentially throws relevant interrupts following the fetch
even in the absence of a received packet.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 41629e35edfdb1f02f1e401f2c3d0e2e4c9e44b3.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 7cfd65e41c net/cadence_gem: simplify rx buf descriptor walking
There was a replication of the rx descriptor address walking logic.
Reorder the flow control to remove. This refactoring also obsoletes
the local variables packet_desc_addr and last_desc_addr.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 2a425b457ff0b57274bf206ad2236690cd7f5909.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Crosthwaite 11785f5352 net/cadence_gem: Don't assert against 0 buffer address
This has no real hardware analog and asserting correctness of DMA
addresses is not a perhiperal level problem. Delete.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: fc02417eb1874cb05e4f20531c6203c5a00110f1.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Edgar E. Iglesias 3b2c97f991 net/cadence_gem: Update DMA rx descriptors as we process them
We were updating the ownership bit of all descriptors if packets
get split and written through several descriptors.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: d61b7847b51487118783c93765a485bc5c66d272.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:49 +00:00
Peter Crosthwaite 24e822ea46 net/cadence_gem: Implement mac level loopback mode
Cadence GEM has a MAC level loopback mode. Implement. Use the same basic
operation as the already implemented PHY loopback.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 3a0baf1b6b2fc1be638bdf1a37408ec38988e970.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:49 +00:00
Peter Maydell 198aa06459 hw/arm/virt: Support -cpu host
Support -cpu host in virt machine (treating it like an A15, ie
with a GIC v2 and the A15's private peripherals.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-12-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:49 +00:00
Peter Maydell a96c0514ab target-arm: Provide '-cpu host' when running KVM
Implement '-cpu host' for ARM when we're using KVM, broadly
in line with other KVM-supporting architectures.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-11-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:49 +00:00
Peter Maydell 3541addc88 target-arm: Don't hardcode KVM target CPU to be A15
Instead of assuming that a KVM target CPU must always be a
Cortex-A15 and hardcoding this in kvm_arch_init_vcpu(),
store the KVM_ARM_TARGET_* value in the ARMCPU class,
and use that.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-10-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:49 +00:00
Peter Maydell f5fdcd6e58 hw/arm: Add 'virt' platform
Add 'virt' platform support corresponding to arch/arm/mach-virt
in the Linux kernel tree. This has no platform-specific code but
can use any device whose kernel driver is is able to work purely
from a device tree node. We use this to instantiate a minimal
set of devices: a GIC and some virtio-mmio transports.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-8-git-send-email-peter.maydell@linaro.org
[PMM:
 Significantly overhauled:
 * renamed user-facing machine to just "virt"
 * removed the A9 support (it can't work since the A9 has no
   generic timers)
 * added virtio-mmio transports instead of random set of 'soc' devices
   (though we retain a pl011 UART)
 * instead of updating io_base as we step through adding devices,
   define a memory map with an array (similar to vexpress)
 * similarly, define irqmap with an array
 * folded in some minor fixes from John's aarch64-support patch
 * rather than explicitly doing endian-swapping on FDT cells,
   use fdt APIs that let us just pass in host-endian values
   and let the fdt layer take care of the swapping
 * miscellaneous minor code cleanups and style fixes
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:30 +00:00
Peter Maydell 5de164304a target-arm: Allow secondary KVM CPUs to be booted via PSCI
New ARM boards are generally expected to boot their secondary CPUs
via the PSCI interface, rather than ad-hoc "loop around in holding
pen code" as hw/arm/boot.c implements. In particular this is
necessary for mach-virt kernels. For KVM we achieve this by creating
the VCPUs with a feature flag marking them as starting in PSCI
powered-down state; the guest kernel will then make a PSCI call
(implemented in the host kernel) to start the secondaries at
an address of its choosing once it has got the primary CPU up.

Implement this setting of the feature flag, controlled by a
qdev property for ARMCPU, which board code can set if it is a
PSCI system.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-7-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:30 +00:00
Peter Maydell 54d3e3f52e target-arm: Add ARMCPU field for Linux device-tree 'compatible' string
Linux requires device tree CPU nodes to include a 'compatible'
string describing the CPU. Add a field in the ARMCPU struct for
this so that boards which construct a device tree can insert
the correct CPU nodes.

Note that there is currently no officially specified 'compatible'
string for the TI925T, Cortex-M3 or SA1110 CPUs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-6-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:30 +00:00
Peter Maydell a22ec1e682 target-arm: Provide PSCI constants to generic QEMU code
Provide versions of the KVM PSCI constants to non-KVM code;
this will allow us to avoid an ifdef in boards which set up
a PSCI node in the device tree.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-5-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:30 +00:00
John Rigby 0fb79851c3 hw/arm/boot: Allow boards to provide an fdt blob
If no fdt is provided on command line and the new field
get_dtb in struct arm_boot_info is set then call it to
get a device tree blob.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-4-git-send-email-peter.maydell@linaro.org
[PMM: minor tweaks and cleanup]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:30 +00:00
Peter Maydell ef6de70ea8 device_tree.c: Terminate the empty reservemap in create_device_tree()
Device trees created with create_device_tree() may not have any
entries in their reservemap, because the FDT API requires that the
reservemap is completed before any FDT nodes are added, and
create_device_tree() itself creates a node.  However we were not
calling fdt_finish_reservemap(), which meant that there was no
terminator in the reservemap list and whatever happened to be at the
start of the FDT data section would end up being interpreted as
reservemap entries.  Avoid this by calling fdt_finish_reservemap()
to add the terminator.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1385140638-10444-3-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:30 +00:00
Peter Maydell 72b0cd35ad target-arm: Provide mechanism for getting KVM constants even if not CONFIG_KVM
There are a number of places where it would be convenient for ARM
code to have working definitions of KVM constants even in code
which is compiled with CONFIG_KVM not set. In this situation we
can't simply include the kernel KVM headers (which might conflict
with host header definitions or not even compile on the compiler
we're using) so we have to redefine equivalent constants.
Provide a mechanism for doing this and checking that the values
match, and use it for the constants we're currently exposing
via an ad-hoc mechanism.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Message-id: 1385140638-10444-2-git-send-email-peter.maydell@linaro.org
2013-12-10 13:28:29 +00:00
François LEGAL 57e72f2a19 cpu/a9mpcore: Add Global Timer
Add the global timer to A9 MPCore.

Signed-off-by: François LEGAL <devel@thom.fr.eu.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: ff92f35f438ac671b57d99d823723dd3e62d2c49.1385969450.git.peter.crosthwaite@xilinx.com
[PC Changes:
 * new commit message
 * split off original version as a separate patch
 * Rebased against new mpcore implementation (with struct embedding)
]
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:25 +00:00
Peter Crosthwaite c21c3b53e1 hw/timer: Introduce ARM A9 Global Timer.
The ARM A9 MPCore has a timer that is global to all cores in the cluster.
The timer is shared but each core has a private independent comparator
and interrupt.

Based on version contributed by Francois LEGAL.

Signed-off-by: François LEGAL <devel@thom.fr.eu.org>
Message-id: 4918e89476b8da916be2964ec41578b50d569a37.1385969450.git.peter.crosthwaite@xilinx.com
[PC changes:
 * New commit message
 * Re-implemented as single timer model
 * Fixed backwards counting issue in polled mode
 * completed VMSD fields
 * macroified magic numbers (and headerified reg definitions)
 * split of as device-model-only patch
 * use bitops for 64 bit register access
 * Fixed auto increment mode to check condition properly
 * general cleanup (names/style etc).
]
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
[PMM:
 * minor typo fixes
 * added missing return after error_setg()
 * dropped setting dc->no_user = 1
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:24:51 +00:00
Peter Crosthwaite 4c25f365ab cpu/a9mpcore: reorder operations/declarations
To make it consistent for easier code reading. The order in which
variables are defined and functions are called is set to match the
address map ordering.

The new consistent order of doing stuff is:

SCU -> GIC -> MPTimer -> WDT.

0 functional change.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 8f31398e6d9a93f57291399f269039da1a77a2b5.1385969450.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:24:51 +00:00
Peter Crosthwaite d3053e6be5 cpu/a9mpcore: rename timerbusdev variable
Rename this variable for consistency with the above defined mptimerdev
variable.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 28939ef95589a62414634e86c47cef76b21b15f7.1385969450.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:24:51 +00:00
Jan Petrous f53977f788 integrator/cp: add support for REFCNT register
Linux kernel from version 3.4 requires CM_REFCNT register for sched timer
for Integrator/CP board (integrator_defconfig).

See http://infocenter.arm.com/help/topic/com.arm.doc.dui0138e/ch04s06s11.html

Signed-off-by: Jan Petrous <jan.petrous@tieto.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:24:51 +00:00
Stefan Weil 8f84271da8 target-mips: Use macro ARRAY_SIZE where possible
This improves readability and simplifies the code.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-12-09 16:44:04 +01:00
Petar Jovanovic 4d66261f71 target-mips: fix 64-bit FPU config for user-mode emulation
FR bit should be initialized to 1 for MIPS64, under condition that this
bit is writable and that CPU has an FPU unit. It should be initialized to
zero for MIPS32.
This fixes different MIPS32 issues with FPU instructions whose behaviour
defaulted to 64-bit FPU mode.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-12-09 16:41:23 +01:00
Bobby Bingham 21c046118e target-sh4: move features flag after CPU_COMMON
Everything before CPU_COMMON in the structure is cleared as part of a
CPU reset. This included the features flag, which indicates whether SH4A
instructions are supported or not. As a result, a CPU reset downgraded
the CPU from an SH4A to an SH4.

Signed-off-by: Bobby Bingham <koorogi@koorogi.info>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-12-09 16:41:23 +01:00
Richard Henderson a1d22a367d target-cris: Use new qemu_ld/st opcodes
Using the new opcodes we can reduce if/else trees to
a single statement.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-12-08 09:36:02 +01:00
Anthony Liguori d2aa90cda8 vfio-pci updates include:
- Update linux-headers to include KVM-VFIO device support
  - Enable QEMU support for KVM-VFIO device
  - Additional Nvidia x-vga quirk to ACK MSI interrupts
  - Debug options to disable MSI/X KVM acceleration
  - Fix to cleanup MSI-X vectors on shutdown and avoid IRQ route leaks
 
 The KVM-VFIO device support enables KVM to manage how it handles
 coherency instructions in the presence of non-coherent I/O.  Dave
 Airlie had noted that the Nvidia MSI ACK support here may just be
 scratching the surface, but it's better than what we have now and
 it's only enabled via the x-vga option, so I'm willing to add since
 it does enable some users.
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 =6C93
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'awilliam/tags/vfio-pci-for-qemu-20131206.0' into staging

vfio-pci updates include:
 - Update linux-headers to include KVM-VFIO device support
 - Enable QEMU support for KVM-VFIO device
 - Additional Nvidia x-vga quirk to ACK MSI interrupts
 - Debug options to disable MSI/X KVM acceleration
 - Fix to cleanup MSI-X vectors on shutdown and avoid IRQ route leaks

The KVM-VFIO device support enables KVM to manage how it handles
coherency instructions in the presence of non-coherent I/O.  Dave
Airlie had noted that the Nvidia MSI ACK support here may just be
scratching the surface, but it's better than what we have now and
it's only enabled via the x-vga option, so I'm willing to add since
it does enable some users.

# gpg: Signature made Fri 06 Dec 2013 12:28:19 PM PST using RSA key ID 3BB08B22
# gpg: Can't check signature: public key not found

# By Alex Williamson
# Via Alex Williamson
* awilliam/tags/vfio-pci-for-qemu-20131206.0:
  vfio-pci: Release all MSI-X vectors when disabled
  vfio-pci: Add debug config options to disable MSI/X KVM support
  vfio-pci: Fix Nvidia MSI ACK through 0x88000 quirk
  vfio-pci: Make use of new KVM-VFIO device
  linux-headers: Update from v3.13-rc3

Message-id: 20131206204715.16731.12627.stgit@bling.home
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-07 07:47:24 -08:00
Anthony Liguori 93531372f0 Merge remote-tracking branch 'stefanha/block' into staging
# By Paolo Bonzini (17) and others
# Via Stefan Hajnoczi
* stefanha/block: (48 commits)
  qemu-iotests: filter QEMU monitor \r\n
  aio: make aio_poll(ctx, true) block with no fds
  block: clean up bdrv_drain_all() throttling comments
  qcow2: use start_of_cluster() and offset_into_cluster() everywhere
  qemu-img: decrease progress update interval on convert
  qemu-img: round down request length to an aligned sector
  qemu-img: dynamically adjust iobuffer size during convert
  block/iscsi: set bs->bl.opt_transfer_length
  block: add opt_transfer_length to BlockLimits
  block/iscsi: set bdi->cluster_size
  qemu-img: fix usage instruction for qemu-img convert
  qemu-img: add support for skipping zeroes in input during convert
  qemu-nbd: add doc for option -f
  qemu-iotests: add test for snapshot in qemu-img convert
  qemu-img: add -l for snapshot in convert
  qemu-iotests: add 058 internal snapshot export with qemu-nbd case
  qemu-nbd: support internal snapshot export
  snapshot: distinguish id and name in load_tmp
  qemu-iotests: Split qcow2 only cases in 048
  qemu-iotests: Clean up spaces in usage output
  ...

Message-id: 1386347807-27359-1-git-send-email-stefanha@redhat.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-07 07:35:31 -08:00
Anthony Liguori 0c0cb6a237 Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
# By Alex Williamson (1) and others
# Via Paolo Bonzini
* qemu-kvm/uq/master:
  target-i386: fix cpuid leaf 0x0d
  qemu: mempath: prefault pages manually (v4)
  kvm: Query KVM for available memory slots

Message-id: 1386345276-9803-1-git-send-email-pbonzini@redhat.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-07 07:35:25 -08:00
Anthony Liguori 3c88da3c24 Update seabios to master snapshot (pre-1.7.4).
Update vgabios, switch from lgplvgabios to seavgabios.
 Update build process to build both 128k and 256k bios versions.
 Use 256k bios for pc-*-2.0+ machine types.
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Merge remote-tracking branch 'kraxel/tags/pull-seabios-31b8b4e-1' into staging

Update seabios to master snapshot (pre-1.7.4).
Update vgabios, switch from lgplvgabios to seavgabios.
Update build process to build both 128k and 256k bios versions.
Use 256k bios for pc-*-2.0+ machine types.

# gpg: Signature made Fri 06 Dec 2013 12:01:24 AM PST using RSA key ID D3E87138
# gpg: Can't check signature: public key not found

# By Gerd Hoffmann
# Via Gerd Hoffmann
* kraxel/tags/pull-seabios-31b8b4e-1:
  pc: switch 2.0 machine types to large seabios binary
  roms: update vgabios binaries
  roms: update seabios binaries
  roms: enable seabios cross builds
  roms: build two seabios binaries
  roms: update seabios submodule to 31b8b4eea9d9ad58a73b22a6060d3ac1c419c26d
  add firmware to machine options
  add pc-{i440fx,q35}-2.0 machine types

Message-id: 1386322527-23148-1-git-send-email-kraxel@redhat.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-07 07:35:16 -08:00
Anthony Liguori 2a576ee6e3 Merge remote-tracking branch 'otubo/seccomp' into staging
# By Paul Moore
# Via Eduardo Otubo
* otubo/seccomp:
  seccomp: add kill() to the syscall whitelist

Message-id: 1386075077-3240-1-git-send-email-otubo@linux.vnet.ibm.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-07 07:35:01 -08:00
Anthony Liguori 0a0ee0b93b Block patches for 2.0 (flushing block-next)
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Merge remote-tracking branch 'kwolf/tags/for-anthony' into staging

Block patches for 2.0 (flushing block-next)

# gpg: Signature made Fri 29 Nov 2013 08:43:18 AM PST using RSA key ID C88F2FD6
# gpg: Can't check signature: public key not found

# By Peter Lieven (17) and others
# Via Kevin Wolf
* kwolf/tags/for-anthony: (41 commits)
  qemu-iotests: Add sample image and test for VMDK version 3
  vmdk: Allow read only open of VMDK version 3
  qemu-iotests: Filter out 'qemu-io> ' prompt
  qemu-iotests: Filter qemu-io output in 025
  block: Use BDRV_O_NO_BACKING where appropriate
  qemu-iotests: Test snapshot mode
  block: Enable BDRV_O_SNAPSHOT with driver-specific options
  qemu-iotests: Make test case 030, 040 and 055 deterministic
  qemu-iotest: Add pause_drive and resume_drive methods
  blkdebug: add "remove_break" command
  qemu-iotests: Drop local version of cancel_and_wait from 040
  sheepdog: support user-defined redundancy option
  sheepdog: refactor do_sd_create()
  qdict: Optimise qdict_do_flatten()
  qdict: Fix memory leak in qdict_do_flatten()
  MAINTAINERS: add sheepdog development mailing list
  COW: Extend checking allocated bits to beyond one sector
  COW: Speed up writes
  qapi: Change BlockDirtyInfo to list
  block: per caller dirty bitmap
  ...

Message-id: 1385743555-27888-1-git-send-email-kwolf@redhat.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-06 12:59:58 -08:00
Anthony Liguori 9ed5dacbfa Merge remote-tracking branch 'sstabellini/xen-2013-12-01' into staging
# By Paul Durrant (1) and Wei Liu (1)
# Via Stefano Stabellini
* sstabellini/xen-2013-12-01:
  xen-pvdevice: make device-id property compulsory
  xen: fix two errors when debug is enabled

Message-id: alpine.DEB.2.02.1312011829000.3198@kaball.uk.xensource.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-06 12:58:28 -08:00
Anthony Liguori cdac7a7184 Merge remote-tracking branch 'rth/auxv-2' into staging
# By Richard Henderson
# Via Richard Henderson
* rth/auxv-2:
  linux-user: Use qemu_getauxval for AT_EXECFD
  util: Use qemu_getauxval in linux qemu_cache_utils_init
  tcg-s390: Use qemu_getauxval in query_facilities
  tcg-arm: Use qemu_getauxval
  tcg-ppc64: Use qemu_getauxval
  osdep: Create qemu_getauxval and qemu_init_auxval

Message-id: 1385757754-10702-1-git-send-email-rth@twiddle.net
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-06 12:57:21 -08:00
Anthony Liguori a55d121f4a Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging
# By Erik de Castro Lopo (2) and others
# Via Riku Voipio
* riku/linux-user-for-upstream:
  linux-user: pass correct parameter to do_shmctl()
  linux-user: create target_structs header to place ipc_perm and shmid_ds
  flatload: fix non-GOT relocations
  linux-user: Implement handling of 5 POSIX timer syscalls.
  linux-user: Add target struct defs needed for POSIX timer syscalls.

Message-id: cover.1385732338.git.riku.voipio@linaro.org
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-06 12:56:51 -08:00
Anthony Liguori e679f05248 Improvements for usb3 bulk stream (usb core, xhci).
Bugfixes for uas emulation.
 Add remote wakeup support for ehci.
 Add suspend support for xhci.
 Misc minor tweaks and fixes.
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Merge remote-tracking branch 'kraxel/tags/pull-usb-1' into staging

Improvements for usb3 bulk stream (usb core, xhci).
Bugfixes for uas emulation.
Add remote wakeup support for ehci.
Add suspend support for xhci.
Misc minor tweaks and fixes.

# gpg: Signature made Thu 28 Nov 2013 11:44:49 PM PST using RSA key ID D3E87138
# gpg: Can't check signature: public key not found

# By Hans de Goede (11) and others
# Via Gerd Hoffmann
* kraxel/tags/pull-usb-1:
  usb: move usb_{hi,lo} helpers to header file.
  usb: add vendor request defines
  trace-events: Clean up after removal of old usb-host code
  Revert "usb-tablet: Don't claim wakeup capability for USB-2 version"
  ehci: implement port wakeup
  xhci: Call usb_device_alloc/free_streams
  usb: Add usb_device_alloc/free_streams
  usb: Add max_streams attribute to endpoint info
  uas: s/ui/iu/
  uas: Fix response iu struct definition
  uas: Bounds check tags when using streams
  uas: Streams are numbered 1-y, rather then 0-x
  uas: Fix / cleanup usb_uas_task error handling
  uas: Only use report iu-s for task_mgmt status reporting
  scsi: Add 2 new sense codes needed by uas
  xhci: add support for suspend/resume
  xhci: Add a few missing checks for disconnected devices

Message-id: 1385712381-30918-1-git-send-email-kraxel@redhat.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-06 12:54:36 -08:00
Anthony Liguori 783eb67e7a Merge remote-tracking branch 'mjt/trivial-patches' into staging
# By Stefan Weil (9) and others
# Via Michael Tokarev
* mjt/trivial-patches:
  eeprom93xx: fix coding style
  hw/ppc/mac.h: remove unused BIOS_FILENAME definition
  Don't crash on keyboard input with no handler
  libcacard/vcard_emul_nss: Remove unused statement (value stored is never read)
  libcacard/cac: Remove unused statement (value stored is never read)
  virtio-net: fix the indent
  misc: Replace 'struct QEMUTimer' by 'QEMUTimer'
  qobject: Fix compiler warning (missing gnu_printf format attribute)
  acpi-build: Fix compiler warning (missing gnu_printf format attribute)
  .gitignore: Ignore config.status
  gtk: Replace conditional debug messages by trace methods
  console: Replace conditional debug messages by trace methods
  trace: Remove trace.h from hw/usb/hcd-ehci.h (less dependencies)
  trace: Remove trace.h from console.h (less dependencies)

Message-id: 1385408466-13183-1-git-send-email-mjt@msgid.tls.msk.ru
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-06 12:52:50 -08:00
Antony Pavlov 6fedcaa1c5 eeprom93xx: fix coding style
scripts/checkpatch.pl reports about some style problems,
this commit fixes some of them:

ERROR: space prohibited before open square bracket '['
+    .fields      = (VMStateField []) {

ERROR: space prohibited after that '!' (ctx:BxW)
+    if (! eeprom->eecs && eecs) {
         ^

ERROR: space prohibited after that '!' (ctx:WxW)
+    } else if (eeprom->eecs && ! eecs) {
                                ^

ERROR: space prohibited after that '!' (ctx:WxW)
+    } else if (eecs && ! eeprom->eesk && eesk) {
                        ^

ERROR: switch and case should be at the same indent
                     switch (address >> (eeprom->addrbits - 2)) {
+                        case 0:
[...]
+                        case 1:
[...]
+                        case 2:
[...]
+                        case 3:

ERROR: return is not a function, parentheses are not required
+    return (eeprom->eedo);

ERROR: switch and case should be at the same indent
     switch (nwords) {
+        case 16:
+        case 64:
[...]
+        case 128:
+        case 256:
[...]
+        default:

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Cc: qemu-trivial@nongnu.org
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-12-06 22:56:51 +04:00
Alex Williamson 3e40ba0faf vfio-pci: Release all MSI-X vectors when disabled
We were relying on msix_unset_vector_notifiers() to release all the
vectors when we disable MSI-X, but this only happens when MSI-X is
still enabled on the device.  Perform further cleanup by releasing
any remaining vectors listed as in-use after this call.  This caused
a leak of IRQ routes on hotplug depending on how the guest OS prepared
the device for removal.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Cc: qemu-stable@nongnu.org
2013-12-06 11:16:40 -07:00
Alex Williamson b3ebc10c37 vfio-pci: Add debug config options to disable MSI/X KVM support
It's sometimes useful to be able to verify interrupts are passing
through correctly.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2013-12-06 11:16:29 -07:00
Alex Williamson 96eeeba0db vfio-pci: Fix Nvidia MSI ACK through 0x88000 quirk
When MSI is enabled on Nvidia GeForce cards the driver seems to
acknowledge the interrupt by writing a 0xff byte to the MSI capability
ID register using the PCI config space mirror at offset 0x88000 from
BAR0.  Without this, the device will only fire a single interrupt.
VFIO handles the PCI capability ID/next registers as virtual w/o write
support, so any write through config space is currently dropped.  Add
a check for this and allow the write through the BAR window.  The
registers are read-only anyway.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2013-12-06 11:16:23 -07:00
Alex Williamson 5b49ab188f vfio-pci: Make use of new KVM-VFIO device
Add and remove groups from the KVM virtual VFIO device as we make
use of them.  This allows KVM to optimize for performance and
correctness based on properties of the group.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2013-12-06 11:16:13 -07:00