Commit Graph

25191 Commits

Author SHA1 Message Date
Blue Swirl
62e1aeaee4 Merge branch 'ppc-for-upstream' of git://github.com/agraf/qemu
* 'ppc-for-upstream' of git://github.com/agraf/qemu: (66 commits)
  pseries: Add compatible property to root of device tree
  target-ppc: Move CPU aliases out of translate_init.c
  target-ppc: Report CPU aliases for QMP
  target-ppc: List alias names alongside CPU models
  target-ppc: Make host CPU a subclass of the host's CPU model
  PPC: xnu kernel expects FLUSH to be cleared on STOP
  PPC: Fix dma interrupt
  target-ppc: Fix PPC_DUMP_SPR_ACCESS build
  target-ppc: Synchronize FPU state with KVM
  target-ppc: Add mechanism for synchronizing SPRs with KVM
  Save memory allocation in the elf loader
  pseries: Implement h_read hcall
  target-ppc: Change "POWER7" CPU alias
  target-ppc: Fix remaining microcontroller typos among models
  target-ppc: Split model definitions out of translate_init.c
  target-ppc: Update Coding Style for CPU models
  target-ppc: Turn descriptive CPU model comments into device descriptions
  target-ppc: Turn descriptive CPU family comments into device descriptions
  target-ppc: Set remaining fields on CPU family classes
  target-ppc: Register all types for TARGET_PPCEMB
  ...
2013-03-09 11:02:07 +00:00
David Gibson
d63919c93e pseries: Add compatible property to root of device tree
Currently, for the pseries machine the device tree supplied by qemu to SLOF
and from there to the guest does not include a 'compatible property' at the
root level.  Usually that works fine, since in this case the compatible
property doesn't really give any information not already found in the
'device_type' or 'model' properties.

However, the lack of 'compatible' confuses the bootloader install in the
SLES11 SP2 and SLES11 SP3 installers.  This patch therefore adds a token
'compatible' property to work around that.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-stable@nongnu.org
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Andreas Färber
e9a9607527 target-ppc: Move CPU aliases out of translate_init.c
Move array of CPU aliases to cpu-models.c, alongside model definitions.
This requires to zero-terminate the aliases array since ARRAY_SIZE() can
no longer be used in translate_init.c then.

Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Andreas Färber
35e21d3f53 target-ppc: Report CPU aliases for QMP
The QMP query-cpu-definitions implementation iterated over CPU classes
only, which were getting less and less as aliases were extracted.

Keep them in QMP as valid -cpu arguments even if not guaranteed stable.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Andreas Färber
55d3d1a4d1 target-ppc: List alias names alongside CPU models
Revert adding a separate -cpu ? output section for aliases and list them
per CPU subclass.

Requested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Andreas Färber
5ba4576b85 target-ppc: Make host CPU a subclass of the host's CPU model
This avoids assigning individual class fields and contributors
forgetting to add field assignments in KVM-only code.

ppc_cpu_class_find_by_pvr() requires the CPU model classes to be
registered, so defer host CPU type registration to kvm_arch_init().

Only register the host CPU type if there is a class with matching PVR.
This lets us drop error handling from instance_init.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Amadeusz Sławiński
987422bc4a PPC: xnu kernel expects FLUSH to be cleared on STOP
otherwise it gets stuck in a loop
so clear it when unsetting run when flush is set

void
IODBDMAStop( volatile IODBDMAChannelRegisters *registers)
{

	IOSetDBDMAChannelControl( registers,
	IOClearDBDMAChannelControlBits( kdbdmaRun )
		| IOSetDBDMAChannelControlBits(  kdbdmaFlush ));

DBDMA: writel 0x0000000000000b00 <= 0xa0002000
DBDMA: channel 0x16 reg 0x0
DBDMA:     status 0x00002000

	while( IOGetDBDMAChannelStatus( registers) & (
			kdbdmaActive | kdbdmaFlush))
		eieio();

DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
it continues to get printed

}

Signed-off-by: Amadeusz Sławiński <amade@asmblr.net>
[agraf: replace tabs with spaces]
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Amadeusz Sławiński
e13da40448 PPC: Fix dma interrupt
In openbios (drivers/ide.c) they are set to

0000000d 00000000 00000002 00000000
0000000e 00000000 00000003 00000000
0000000f 00000000 00000004 00000000
(The last one seems to be not implemented in qemu)

It follows convention of how they are set on real machines,
both ide and dma ones are increased

Real machine one:
http://web.archive.org/web/20090107151044/http://penguinppc.org/historical/dev-trees-html/g4_agp_500_2.html
00000013 00000001 0000000b 00000000
00000014 00000001 0000000c 00000000
00000015 00000001 0000000d 00000000

Signed-off-by: Amadeusz Sławiński <amade@asmblr.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
Andreas Färber
edbe35e031 target-ppc: Fix PPC_DUMP_SPR_ACCESS build
A victim of the d523dd00a7 AREG0
conversion, insert the missing cpu_env arguments.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:53 +01:00
David Gibson
70b79849b8 target-ppc: Synchronize FPU state with KVM
Currently qemu does not get and put the state of the floating point and
vector registers to KVM.  This is obviously a problem for savevm, as well
as possibly being problematic for debugging of FP-using guests.

This patch fixes this by using new extensions to the ONE_REG interface to
synchronize the qemu floating point state with KVM.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
David Gibson
d67d40ea07 target-ppc: Add mechanism for synchronizing SPRs with KVM
Currently when runing under KVM on ppc, we synchronize a certain number of
vital SPRs to KVM through the SET_SREGS call.  This leaves out quite a lot
of important SPRs which are maintained in KVM.  It would be helpful to
have their contents in qemu for debugging purposes, and when we implement
migration it will be vital, since they include important guest state that
will need to be restored on the target.

This patch sets up for synchronization of any registers supported by the
KVM ONE_REG calls.  A new variant on spr_register() allows a ONE_REG id to
be stored with the SPR information.  When we set/get information to KVM
we also synchronize any SPRs so registered.

For now we set this mechanism up to synchronize a handful of important
registers that already have ONE_REG IDs, notably the DAR and DSISR.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Fabien Chouteau
d60fa42e8b Save memory allocation in the elf loader
The current elf loader uses too much memory. For example, I have a
executable with a bss section of 400 MB and I set the ram size to 512
MB. Qemu uses about 780MB of RAM (which is fine), but there's a peak at
1.6 GB during initialization (this is not fine).

This patch fixes two things:
 1) do not allocate each elf program twice.
 2) do not allocate memory for areas that are only zeros.

For this we need a new field in Rom: "datasize" which is the size of the
allocated data. If datasize is less than romsize, it means that the area
from datasize to romsize is filled with zeros.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Erlon Cruz
6bbd5dde9a pseries: Implement h_read hcall
This h_call is useful for DLPAR in future amongst other things. Given an index
it fetches the corresponding PTE stored in the htab.

Signed-off-by: Erlon Cruz <erlon.cruz@br.flextronics.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Andreas Färber
befa8af375 target-ppc: Change "POWER7" CPU alias
Let it resolve to v2.3 rather than v2.0.

Suggested-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Andreas Färber
cc4a04db05 target-ppc: Fix remaining microcontroller typos among models
controler -> controller

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Andreas Färber
953af181f5 target-ppc: Split model definitions out of translate_init.c
Now that model definitions only reference their parent type, model
definitions are independent of the family definitions and can be
compiled independently of TCG translation.

Keep all #if defined(TODO) code local to cpu-models.c.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Andreas Färber
09cc86f2b1 target-ppc: Update Coding Style for CPU models
Drop the space in #if defined (TODO).

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Andreas Färber
e0233c9abe target-ppc: Turn descriptive CPU model comments into device descriptions
Fix microcontroller typo while at it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:52 +01:00
Andreas Färber
ca5dff0a3e target-ppc: Turn descriptive CPU family comments into device descriptions
This gets rid of some more overly long comments that have lost most of
their purpose now that in most cases there's only two functions left per
CPU family.

The class field is inherited by the actual CPU models, so override it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:51 +01:00
Andreas Färber
ba9fd9f150 target-ppc: Set remaining fields on CPU family classes
Now POWERPC_DEF_SVR() no longer sets family-specific fields itself.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:51 +01:00
Andreas Färber
4d7fb187e0 target-ppc: Register all types for TARGET_PPCEMB
Don't attempt to suppress registration of CPU types, since the criteria
is actually a property of the class and should thus become a field.
Since we can't check a field set in a class_init function before
registering the type that leads to execution of that function, guard the
-cpu class lookup instead and suppress exposing these classes in -cpu ?
and in QMP.

In case someone tries to hot-add an incompatible CPU via device_add,
error out in realize.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:51 +01:00
Andreas Färber
53116ebfc9 target-ppc: Set instruction flags on CPU family classes
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:51 +01:00
Andreas Färber
7856e3a41b target-ppc: Introduce abstract CPU family types
Instead of assigning *_<family> constants, set .parent to a family type.

Introduce a POWERPC_FAMILY() macro to keep type registration close to
its implementation. This macro will need tweaking later.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:51 +01:00
Andreas Färber
cfe34f44b3 target-ppc: Convert CPU definitions
Turn the array of model definitions into a set of self-registering QOM
types with their own class_init. Unique identifiers are obtained from
the combination of PVR, SVR and family identifiers; this requires all
alias #defines to be removed from the list. Possibly there are some more
left after this commit that are not currently being compiled.

Prepares for introducing abstract intermediate CPU types for families.

Keep the right-aligned macro line breaks within 78 chars to aid
three-way merges.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:51 +01:00
Andreas Färber
de400129da target-ppc: Get model name from type name
We are about to drop the redundant name field along with ppc_def_t.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:50 +01:00
Andreas Färber
f591784b63 target-ppc: Extract POWER7 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:50 +01:00
Andreas Färber
df43f4b863 target-ppc: Extract 970 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:50 +01:00
Andreas Färber
4bdba7fd2e target-ppc: Extract 405GPe alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:49 +01:00
Andreas Färber
7b48a1ad32 target-ppc: Extract MPC8240 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:49 +01:00
Andreas Färber
236824f276 target-ppc: Extract MPC5200/MPC5200B aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:49 +01:00
Andreas Färber
cf9314cd77 target-ppc: Extract MPC52xx alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:49 +01:00
Andreas Färber
d329ceb2ba target-ppc: Extract MPC82xx_HiP{3, 4} aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:49 +01:00
Andreas Färber
f172e4b99f target-ppc: Extract MPC82xx aliases to *_HiP4
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
4d55320fdb target-ppc: Extract MPC8247/MPC8248/MPC8270-80 aliases
This depends on the fix for "G2leGP3" PVR.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
63499f2109 target-ppc: Extract MPC82xx alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
4475e98f99 target-ppc: Extract e200 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
0683641cc7 target-ppc: Extract e300 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
9538de4fe7 target-ppc: Extract MPC83xx aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
6d4decb484 target-ppc: Extract e500v1/e500v2 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
52d80768db target-ppc: Extract MPC85xx aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
91b5d02878 target-ppc: Extract 604e alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:48 +01:00
Andreas Färber
336c86322d target-ppc: Extract 601/601v aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
4ae0e9d870 target-ppc: Extract 603r alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
16a177333e target-ppc: Extract 603e alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
0446aecd56 target-ppc: Extract 740/750 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
8fc82f9e0d target-ppc: Extract 750 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
80c7abd317 target-ppc: Extract 7x5 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
06704e9ceb target-ppc: Extract 7400 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
08546b912c target-ppc: Extract 7410 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:47 +01:00
Andreas Färber
df502ce845 target-ppc: Extract 7448 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08 21:04:46 +01:00