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279 Commits

Author SHA1 Message Date
edgar_igl
a1aebcb8e6 CRIS: Fix brk 8 and add S-flag emulation. 
* break 8 sets ERP to the current insn.
* First shot at S flag single-stepping.
* Make it easier to use the local disasm.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5445 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-07 22:48:41 +00:00
blueswir1
e18231a3ff Show size for unassigned accesses (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-06 18:46:28 +00:00
edgar_igl
28de16da38 CRIS: Improve ASID related TLB flushes. 
* Speedup and correct ASID (PID) related TLB flushes.
* Use 64bit tcg load/stores to emulate movem.
* Remove unused helpers and other minor cleanups.

Signed-off-by: Edgar E. Iglesias <edgar@axis.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5302 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 20:51:28 +00:00
blueswir1
7ccfb2eb5f Fix warnings that would be caused by gcc flag -Wwrite-strings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5206 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-14 06:45:34 +00:00
edgar_igl
980f8a0b39 CRIS: Mask off the cache selection bit after MMU translations. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5170 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-05 17:17:55 +00:00
aurel32
cdcf4e51aa TCG fixes for target-cris 
This patch fixes TCG errors reported on the CRIS target when TCG_DEBUG
is enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Edgar E. Iglesias <edgar@axis.com>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5165 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-05 14:19:27 +00:00
edgar_igl
b23761f959 CRIS: Avoid a few unecessary steps in the mmu. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5146 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-03 14:31:11 +00:00
edgar_igl
7d5099d5a4 CRIS: Remove redundant code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5145 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-03 14:30:27 +00:00
blueswir1
79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-30 09:51:20 +00:00
edgar_igl
5ce042b1cf Remove dyngen leftovers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4963 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-29 07:46:53 +00:00
edgar_igl
89cc738203 CRIS: Correct condition for when to apply fast move flags evaluation. Correct single-stepping over branches. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4944 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-25 21:20:21 +00:00
ths
2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-18 18:01:29 +00:00
ths
551bd27f22 Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-03 17:57:36 +00:00
pbrook
9656f324d2 Move interrupt_request and user_mode_only to common cpu state. 
Save and restore env->interrupt_request and env->halted.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-01 20:01:19 +00:00
ths
bf20dc076b Spelling fixes, spotted by Stuart Brady. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 17:22:19 +00:00
pbrook
b3c7724cbc Move CPU save/load registration to common code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 16:31:04 +00:00
edgar_igl
6913ba5680 CRIS: Correct writes to TLB hi. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4807 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 15:27:47 +00:00
edgar_igl
d297f464d3 Avoid CRIS related warnings by Jan Kiszka. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4804 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 08:59:49 +00:00
pbrook
2e70f6efa8 Add instruction counter. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 01:03:05 +00:00
edgar_igl
877d8ad78b CRIS: Add (untested) cpu-state save/load. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4721 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 23:44:20 +00:00
edgar_igl
1b1a38b0aa CRIS: Emulate NMIs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4719 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 23:18:06 +00:00
edgar_igl
5bf8f1aba1 CRIS: Support RFN insn. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4718 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 23:07:50 +00:00
edgar_igl
a7cfbba0cf CRIS: Translator updates. 
* RFN (Return From NMI) insn.
* Avoid unnecessary T0 transfers.
* Dont do tcg related init more than once.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4717 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 23:06:31 +00:00
pbrook
e2eef1703b Remove dead and bitrotten "qemu-fast" code. 
Only build softmmu+MMIO handlers for system emulation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4695 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-08 01:09:01 +00:00
edgar_igl
2a44f7f173 CRIS translator updates 
* Improve translation of the X flag (still some corner cases missing).
* First shot att P flag support and conditional stores.
* Improve the jump logic.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4684 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-06 11:23:28 +00:00
edgar_igl
bf44333713 Correct P flag assertion in rfe. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4683 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-06 11:17:17 +00:00
pbrook
f8ed7070ea Fix typo. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:54:15 +00:00
pbrook
6e68e076e7 Move clone() register setup to target specific code. Handle fork-like clone. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:22:15 +00:00
bellard
9133e39b84 Push common interrupt variables to cpu-defs.h (Glauber Costa) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 10:08:06 +00:00
bellard
ce5232c5c2 moved halted field to CPU_COMMON 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-28 17:14:10 +00:00
edgar_igl
30abcfc7ba CRIS: Restructure the translator to allow for better code generation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4594 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-27 21:10:56 +00:00
bellard
bbff8895da remove absolete function 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4578 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 18:01:24 +00:00
pbrook
9b7b85d260 Fix off-by-one unwinding error. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 00:36:06 +00:00
pbrook
cb63669a54 Fix ARM conditional branch bug. 
Add tcg_gen_brcondi.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-24 02:22:00 +00:00
edgar_igl
d189633603 Use tcg_gen_not. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4480 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 19:11:14 +00:00
edgar_igl
cf1d97f074 CRIS: Improve TLB management and handle delayslots at page boundaries. 
* Dont flush the entire qemu tlb when the $pid changes. Instead we go through
  the guests TLB and choose entries that need to be flushed.
* Add env->dslot and handle delayslots at pageboundaries.
* Remove some unused code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4450 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-13 10:59:14 +00:00
edgar_igl
a39f8f3ad9 CRIS: Remove some old dyngen T0/T1 fiddle. More usage of the results from the x flag liveness analysis. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4433 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 07:57:23 +00:00
pbrook
390efc54fb Add TCG native negation op. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-11 14:35:37 +00:00
edgar_igl
44cd42ee40 CRIS: Add support for the pseudo randomized set that the mmu provides with TLB refill faults. This makes linux guests use the four way TLB set associativty. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4425 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-11 14:28:14 +00:00
pbrook
868314358e Add zero extension (pseudo-)ops. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-11 12:22:01 +00:00
edgar_igl
2f3a1b072a CRIS: helper_dummy no longer needed as barrier for qemu_ld/st. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4416 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 19:20:33 +00:00
aurel32
939ef5938f Move #include "softfloat.h" to cpu-all.h 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4395 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 18:45:47 +00:00
edgar_igl
73e517236c CRIS: Concistent use of btarget and make it possible to single-step over delayslots. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4389 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 08:14:05 +00:00
edgar_igl
dceaf39458 CRIS: More TCG conversion. 
* Convert moves to/from support function regs (including TLB updates) to TCG.
* SCC no longer requires T0 to strictly be 0 or 1, relaxed to 0 or non-zero.
* Convert the the condition code evaluation to TCG.
* Convert rfe into a helper and TCG.
* Convert evaluate_bcc and setf to TCG.
* Convert clrf to TCG.
* Convert CRIS exception raising to TCG.
* Convert btst to TCG.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4376 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-07 15:24:53 +00:00
edgar_igl
17ac975463 More TCG updates for CRIS 
* Convert parts of the jump logic to TCG.
* Stores no longer have to go via T0/T1.
* Use the byte and halfword ldx_code variants when appropriate for insn fetching.
* Do not disassemble beyond the translation block.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4350 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-06 08:30:15 +00:00
edgar_igl
ef29a70d18 CRIS MMU Updates 
* Add support for exec faults and for the k protection bit.
* Abort if search_pc causes recursive mmu faults.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4349 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-06 08:04:40 +00:00
aurel32
8dd3dca351 remove target ifdefs from vl.c 
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 13:11:44 +00:00
edgar_igl
aae6b32ae6 CRIS: Convert divide step to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4313 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-03 21:34:39 +00:00
edgar_igl
d059c17270 CRIS: Convert lz (leading zeros) to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4309 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-03 17:11:36 +00:00
edgar_igl
50cfa95cbd CRIS: Eliminate a few unneeded moves to/from T0/T1. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4306 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-03 08:36:16 +00:00
edgar_igl
c7d0569543 CRIS: Do post-increment without going via T0. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4304 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-03 06:54:52 +00:00
edgar_igl
b41f7df018 CRIS updates: 
* Support both the I and D MMUs and improve the accuracy of the MMU model.
* Handle the automatic user/kernel stack pointer switching when leaving or entering user mode.
* Move the CCS evaluation into helper funcs.
* Make sure user-mode cannot change flags only writeable in kernel mode.
* More conversion of the translator into TCG.
* Handle exceptions while in a delayslot.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-02 22:16:17 +00:00
aurel32
d2856f1ad4 Factorize code in translate.c 
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-28 00:32:32 +00:00
aurel32
ca10f86763 Remove osdep.c/qemu-img code duplication 
(Kevin Wolf)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-11 21:35:42 +00:00
pbrook
bb7ec0437a m68k mmap2 fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4106 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-25 22:28:25 +00:00
edgar_igl
a825e703ee More TCG conversions for CRIS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4071 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-16 16:51:58 +00:00
edgar_igl
b52901b948 Remove unused members. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4070 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-16 16:38:48 +00:00
edgar_igl
3157a0a93b More TCG conversions for CRIS. 
* Bit swap insn (bitwise not, endian swap and bit reverse).
* Muls and mulu.
* Extended arithmetics.
* Parts of the condition code handling.
* Use tcg_const_tl.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4069 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-15 20:45:05 +00:00
edgar_igl
54728ac6db Simplified some dead extended arith code after search and replace. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4066 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-15 09:13:04 +00:00
edgar_igl
05ba7d5f34 A first small step to convert the CRIS translator to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4057 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-14 01:11:25 +00:00
edgar_igl
786c02f1ac Model more parts of the ETRAX mmu (still alot missing). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4056 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-14 01:08:09 +00:00
edgar_igl
e62b5b133b * Add a model of the ETRAX interrupt controller. 
* Clean up the interrupt handling a bit.
* Connect some NOR flash to the test board.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-14 01:04:24 +00:00
edgar_igl
bbaf29c769 * target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags. 
* target-cris/helper.c: Update ERP for user-mode simulation aswell.
* hw/etraxfs_timer.c: Support multiple timers.
* hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4004 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-01 17:25:33 +00:00
edgar_igl
4f400ab520 Cut the translation block after translating a break insn. This avoids an issue where QEMU finds an illegal CRIS insn while the guest is returning through a signal return trampoline. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3997 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-28 09:37:58 +00:00
edgar_igl
9004627f9b More consistent naming for CRIS register-number macros. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-28 08:28:32 +00:00
edgar_igl
5d4a534dec Silently ignore CRIS cache flushes, instead of aborting due to unknown insn. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3990 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-25 09:58:22 +00:00
bellard
57fec1fee9 use the TCG code generator 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-01 10:50:11 +00:00
balrog
fd56059fb6 Optimize clear insns by treating support reg P0 specially and 
add missing micro-op RETURN's (Edgar E. Iglesias).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3913 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-14 03:18:30 +00:00
bellard
44f8625d23 fixed invalid type 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 12:35:55 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
ths
273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
ths
941db52871 Use the shiny new clz helpers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3464 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 01:44:40 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
ths
94cff60a02 CRIS MMU emulation, by Edgar E. Iglesias. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3362 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 13:11:58 +00:00
ths
81fdc5f8d2 The remainder of CRIS CPU emulation files, by Edgar E. Iglesias. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 13:04:02 +00:00
ths
4fa551d768 CRIS micro-ops, by Edgar E. Iglesias. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3360 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 12:52:43 +00:00
ths
5478670f3d CRIS insn decoding macros, by Edgar E. Iglesias. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3359 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 12:50:59 +00:00
ths
8170028d75 CRIS instruction translation, by Edgar E. Iglesias. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3358 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 12:49:08 +00:00
ths
450d4ff553 CRIS disassembler, originally from binutils, by Edgar E. Iglesias. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3356 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-08 12:45:38 +00:00