Commit Graph

23067 Commits

Author SHA1 Message Date
Aurelien Jarno
2910c6cbaa target-mips: cleanup load/store operations
Load/store operations use macros for historical reasons. Now that there
is no point in keeping them, replace them by direct calls to qemu_ld/st.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:47 +01:00
Aurelien Jarno
5f7319cd84 target-mips: restore CPU state after an FPU exception
Rework *raise_exception*() functions so that they can be called from
other helpers, passing the return address as an argument.

Use do_raise_exception() function in update_fcr31() to correctly restore
the CPU state after an FPU exception.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:46 +01:00
Aurelien Jarno
05993cd05f target-mips: use softfloat constants when possible
softfloat already has a few constants defined, use them instead of
redefining them in target-mips.

Rename FLOAT_SNAN32 and FLOAT_SNAN64 to FP_TO_INT32_OVERFLOW and
FP_TO_INT64_OVERFLOW as even if they have the same value, they are
technically different (and defined differently in the MIPS ISA).

Remove the unused constants.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:46 +01:00
Aurelien Jarno
4cc2e5f989 target-mips: cleanup float to int conversion helpers
Instead of accessing the flags from the floating point control
register after updating it, read the softfloat flags.

This is just code cleanup and should not change the behaviour.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:46 +01:00
Aurelien Jarno
5dbe90bba7 target-mips: fix FPU exceptions
For each FPU instruction that can trigger an FPU exception, to call
call update_fcr31() after.

Remove the manual NaN assignment in case of float to float operation, as
softfloat is already taking care of that. However for float to int
operation, the value has to be changed to the MIPS one. In the cvtpw_ps
case, the two registers have to be handled separately to guarantee
a correct final value in both registers.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:46 +01:00
Aurelien Jarno
4a587b2ccb target-mips: keep softfloat exception set to 0 between instructions
Instead of clearing the softfloat exception flags before each floating
point instruction, reset them to 0 in update_fcr31() when an exception
is detected.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:46 +01:00
Aurelien Jarno
b3d6cd447d target-mips: use the softfloat floatXX_muladd functions
Use the new softfloat floatXX_muladd() functions to implement the madd,
msub, nmadd and nmsub instructions. At the same time replace the name of
the helpers by the name of the instruction, as the only reason for the
previous names was to keep the macros simple.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:45 +01:00
Aurelien Jarno
bbc1dedef6 softfloat: implement fused multiply-add NaN propagation for MIPS
Add a pickNaNMulAdd function for MIPS, implementing NaN propagation
rules for MIPS fused multiply-add instructions.

Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:45 +01:00
Aurelien Jarno
1e0e239a89 target-mips: do not save CPU state when using retranslation
When the CPU state after a possible retranslation is going to be handled
through code retranslation, we don't need to save the CPU state before.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:45 +01:00
Aurelien Jarno
4636401d99 target-mips: correctly restore btarget upon exception
When the CPU state is restored through retranslation after an exception,
btarget should also be restored.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:45 +01:00
Aurelien Jarno
b3a1be87ba tcg: don't remove op if output needs to be synced to memory
Commit 9c43b68de6 do not correctly check
for dead outputs when they need to be synced to memory in case of
half-dead operations.

Fix that by applying the same pattern than for the default case.

Tested-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:45 +01:00
Richard Henderson
e1e1b25c97 target-alpha: Use TCG_CALL_NO_WG
Mark helper functions that raise exceptions, but otherwise do not
change TCG register state, with TCG_CALL_NO_WG.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-10-31 22:20:44 +01:00
Jan Kiszka
ac4119c023 chardev: Use timer instead of bottom-half to postpone open event
As the block layer may decide to flush bottom-halfs while the machine is
still initializing (e.g. to read geometry data from the disk), our
postponed open event may be processed before the last frontend
registered with a muxed chardev.

Until the semantics of BHs have been clarified, use an expired timer to
achieve the same effect (suggested by Paolo Bonzini). This requires to
perform the alarm timer initialization earlier as otherwise timer
subsystem can be used before being ready.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-10-31 22:20:44 +01:00
Aurelien Jarno
40e3acc18f target-mips: remove #if defined(TARGET_MIPS64) in opcode enums
All switch() decoding instruction have a default entry, so it is possible
to have unused enum entries. Remove conditional definitions of MIPS64
opcode enums, as it only makes the code less readable.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:43 +01:00
Jia Liu
b30706dda7 target-mips: Change TODO file
Change DSP r1 & DSP r2 into microMIPS DSP encodings in TODO file.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:24 +01:00
Jia Liu
d70080c4e3 target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:21 +01:00
Jia Liu
af13ae03f8 target-mips: Add ASE DSP processors
Add 74kf and mips64dspr2-generic-cpu model for test.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:20 +01:00
Jia Liu
b53371ed5d target-mips: Add ASE DSP accumulator instructions
Add MIPS ASE DSP Accumulator and DSPControl Access instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:20 +01:00
Jia Liu
2669056024 target-mips: Add ASE DSP compare-pick instructions
Add MIPS ASE DSP Compare-Pick instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:19 +01:00
Jia Liu
1cb6686cf9 target-mips: Add ASE DSP bit/manipulation instructions
Add MIPS ASE DSP Bit/Manipulation instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:18 +01:00
Jia Liu
a22260ae38 target-mips: Add ASE DSP multiply instructions
Add MIPS ASE DSP Multiply instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:18 +01:00
Jia Liu
77c5fa8b55 target-mips: Add ASE DSP GPR-based shift instructions
Add MIPS ASE DSP GPR-Based Shift instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:17 +01:00
Jia Liu
461c08df75 target-mips: Add ASE DSP arithmetic instructions
Add MIPS ASE DSP Arithmetic instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:37:16 +01:00
Jia Liu
9b1a1d68d0 target-mips: Add ASE DSP load instructions
Add MIPS ASE DSP Load instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 21:33:41 +01:00
Jia Liu
e45a93e259 target-mips: Add ASE DSP branch instructions
Add MIPS ASE DSP Branch instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 20:24:55 +01:00
Jia Liu
4133498f8e Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number
Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 20:24:52 +01:00
Jia Liu
853c3240c0 target-mips: Add ASE DSP resources access check
Add MIPS ASE DSP resources access check.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 20:24:06 +01:00
Jia Liu
235eb0158c target-mips: Add ASE DSP internal functions
Add internal functions using by MIPS ASE DSP instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 20:24:05 +01:00
Paolo Bonzini
f563a5d7a8 Merge remote-tracking branch 'origin/master' into threadpool
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:42:51 +01:00
Paolo Bonzini
a27365265c raw-win32: implement native asynchronous I/O
With the new support for EventNotifiers in the AIO event loop, we
can hook a completion port to every opened file and use asynchronous
I/O on them.

Wine's support is extremely inefficient, also because it really does
the I/O synchronously on regular files. (!)  But it works, and it is
good to keep the Win32 and POSIX ports as similar as possible.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:13 +01:00
Paolo Bonzini
10fb6e0682 raw-posix: move linux-aio.c to block/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:13 +01:00
Paolo Bonzini
fc4edb84bf raw-win32: add emulated AIO support
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:13 +01:00
Paolo Bonzini
9f8540ecef raw-posix: rename raw-posix-aio.h, hide unavailable prototypes
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:12 +01:00
Paolo Bonzini
de81a16936 raw: merge posix-aio-compat.c into block/raw-posix.c
Making the qemu_paiocb specific to raw devices will let us access members
of the BDRVRawState arbitrarily.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:12 +01:00
Paolo Bonzini
47e6b251a5 block: switch posix-aio-compat to threadpool
This is not meant for portability, but to remove code duplication.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:12 +01:00
Paolo Bonzini
19d092cf9b threadpool: do not take lock in event_notifier_ready
The ordering is:

    worker thread                         consumer thread
    -------------------------------------------------------------------
    write ret                             event_notifier_test_and_clear
    wmb()                                 read state
    write state                           rmb()
    event_notifier_set                    read ret

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:38:01 +01:00
Paolo Bonzini
d354c7eccf aio: add generic thread-pool facility
Add a generic thread-pool.  The code is roughly based on posix-aio-compat.c,
with some changes, especially the following:

- use QemuSemaphore instead of QemuCond;

- separate the state of the thread from the return code of the worker
function.  The return code is totally opaque for the thread pool;

- do not busy wait when doing cancellation.

A more generic threadpool (but still specific to I/O so that in the future
it can use special scheduling classes or PI mutexes) can have many uses:
it allows more flexibility in raw-posix.c and can more easily be extended
to Win32, and it will also be used to do an msync of the persistent bitmap.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 10:37:48 +01:00
Paolo Bonzini
38b14db34e qemu-thread: add QemuSemaphore
The new thread pool will use semaphores instead of condition
variables, because QemuCond does not have qemu_cond_timedwait.
(I also like it more this way).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31 09:45:47 +01:00
Andreas Färber
839b5630cd target-i386: Pass X86CPU to kvm_handle_halt()
Needed for moving interrupt_request and halted fields to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 04:12:23 +01:00
Andreas Färber
23d02d9b4b target-i386: Pass X86CPU to kvm_get_mp_state()
Needed for moving halted field to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 04:12:23 +01:00
Andreas Färber
9f09e18a6d cpu: Move thread_id to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 04:12:23 +01:00
Andreas Färber
f100f0b38f cpus: Pass CPUState to run_on_cpu()
CPUArchState is no longer needed.

Move the declaration to include/qemu/cpu.h and add documentation.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 04:12:23 +01:00
Andreas Färber
8c5cf3b621 target-i386: Pass X86CPU to cpu_x86_inject_mce()
Needed for changing run_on_cpu() argument to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 04:12:23 +01:00
Andreas Färber
bee615d4b9 target-i386: Pass X86CPU to kvm_mce_inject()
Needed for changing cpu_x86_inject_mce() argument to X86CPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Rebased onto hwaddr]
2012-10-31 04:12:23 +01:00
Andreas Färber
3993c6bddf cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.

Make include paths for cpu-qom.h consistent for alpha and unicore32.

Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Updated new target-openrisc function accordingly]
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-31 04:11:37 +01:00
Peter Maydell
b55f546eef update-linux-headers.sh: Handle new kernel uapi/ directories
Recent kernels have moved to keeping the userspace headers
in uapi/ subdirectories. This breaks the detection of whether an
architecture has KVM support in the kernel because kvm.h has
moved in the kernel source tree. Update the check to support
both the old and new locations.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-30 23:39:53 -02:00
Eduardo Habkost
12869995ea target-i386: kvm_cpu_fill_host: use GET_SUPPORTED_CPUID
Change the kvm_cpu_fill_host() function to use
kvm_arch_get_supported_cpuid() instead of running the CPUID instruction
directly, when checking for supported CPUID features.

This should solve two problems at the same time:

 * "-cpu host" was not enabling features that don't need support on
   the host CPU (e.g. x2apic);
 * "check" and "enforce" options were not detecting problems when the
   host CPU did support a feature, but the KVM kernel code didn't
   support it.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-30 23:39:53 -02:00
Eduardo Habkost
6e746f3055 target-i386: cpu: make -cpu host/check/enforce code KVM-specific
Rationale:
 * "-cpu host" is available only when using KVM
 * The current implementation of -cpu check/enforce
   (check_features_against_host()) makes sense only when using KVM.

So this makes the functions check_features_against_host() and
cpu_x86_fill_host() KVM-specific, document them as such, and rename them
to kvm_check_features_against_host() and kvm_cpu_fill_host().

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-30 23:39:53 -02:00
Eduardo Habkost
1aefc6b8cb target-i386: make cpu_x86_fill_host() void
The return value of that function is always 0, and is always ignored.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-30 23:39:53 -02:00
Jan Kiszka
a0dac021fa Emulate qemu-kvms -no-kvm option
Releases of qemu-kvm will be interrupted at qemu 1.3.0.
Users should switch to plain qemu releases.
To avoid breaking scenarios which are setup with command line
options specific to qemu-kvm, port these switches from qemu-kvm
to qemu.git.

Port -no-kvm option.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-30 23:39:53 -02:00