Commit Graph

58578 Commits

Author SHA1 Message Date
Peter Xu
34e304e975 virtio-gpu: disallow vIOMMU
virtio-gpu has special code path that bypassed vIOMMU protection.  So
for now let's disable iommu_platform for the device until we fully
support that (if needed).

After the patch, both virtio-vga and virtio-gpu won't allow to boot with
iommu_platform parameter set.

CC: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
Message-id: 20180131040401.3550-1-peterx@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-02-02 08:53:22 +01:00
Peter Maydell
b05631954d Implement hppa-softmmu
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Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20180131' into staging

Implement hppa-softmmu

# gpg: Signature made Wed 31 Jan 2018 14:19:06 GMT
# gpg:                using RSA key 0x64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-hppa-20180131: (43 commits)
  target/hppa: Implement PROBE for system mode
  target/hppa: Fix 32-bit operand masks for 0E FCVT
  hw/hppa: Add MAINTAINERS entry
  pc-bios: Add hppa-firmware.img and git submodule
  hw/hppa: Implement DINO system board
  target/hppa: Enable MTTCG
  target/hppa: Implement STWA
  target/hppa: Implement a pause instruction
  target/hppa: Implement LDSID for system mode
  target/hppa: Fix comment
  target/hppa: Increase number of temp regs
  target/hppa: Only use EXCP_DTLB_MISS
  target/hppa: Implement B,GATE insn
  target/hppa: Add migration for the cpu
  target/hppa: Add system registers to gdbstub
  target/hppa: Optimize for flat addressing space
  target/hppa: Implement halt and reset instructions
  target/hppa: Implement SYNCDMA insn
  target/hppa: Implement LCI
  target/hppa: Implement LPA
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-31 15:50:29 +00:00
Richard Henderson
eed142195c target/hppa: Implement PROBE for system mode
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
fe0a69cca5 target/hppa: Fix 32-bit operand masks for 0E FCVT
We masked the wrong bits, which prevented some of the
32-bit R registers.  E.g. "fcnvxf,sgl,sgl fr22R,fr6R".

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
61461802bb hw/hppa: Add MAINTAINERS entry
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
43ad25643a pc-bios: Add hppa-firmware.img and git submodule
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Helge Deller
a72bd606ca hw/hppa: Implement DINO system board
Now that we have the prerequisites in target/hppa/,
implement the hardware for a PA7100LC.

This also enables build for hppa-softmmu.

Signed-off-by: Helge Deller <deller@gmx.de>
[rth: Since it is all new code, squashed all branch development
withing hw/hppa/ to a single patch.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
7b93dab51e target/hppa: Enable MTTCG
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
95412a6128 target/hppa: Implement STWA
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
b49572d373 target/hppa: Implement a pause instruction
This is an extension to the base ISA, but we can use this in
the kernel idle loop to reduce the host cpu time consumed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Helge Deller
2330504cee target/hppa: Implement LDSID for system mode
Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <20180102203145.GA17059@ls3530.fritz.box>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Helge Deller
3f7367e2cc target/hppa: Fix comment
Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <20171212212319.GA31494@ls3530.fritz.box>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
5eecd37a93 target/hppa: Increase number of temp regs
HP-UX 10.20 CD contains "add r0, r0, r27" in a delay slot,
which uses at least 5 temps.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
46559e8184 target/hppa: Only use EXCP_DTLB_MISS
Unknown why this works, but if we return EXCP_ITLB_MISS we
will triple-fault the first userland instruction fetch.
Is it something to do with having a combined I/DTLB?

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
43e056522f target/hppa: Implement B,GATE insn
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:50 -08:00
Richard Henderson
c643603a85 target/hppa: Add migration for the cpu
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:49 -08:00
Richard Henderson
e33348a635 target/hppa: Add system registers to gdbstub
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:49 -08:00
Richard Henderson
494737b7a2 target/hppa: Optimize for flat addressing space
Linux sets sr4-sr7 all to the same value, which means that we
need not do any runtime computation to find out what space to
use in forming the GVA.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:49 -08:00
Helge Deller
6210db057a target/hppa: Implement halt and reset instructions
Real hardware would use an external device to control the power.
But for the moment let's invent instructions in reserved space,
to be used by our custom firmware.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31 05:30:49 -08:00
Richard Henderson
e216a77e3b target/hppa: Implement SYNCDMA insn
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
43a97b81b5 target/hppa: Implement LCI
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
2dfcca9ffc target/hppa: Implement LPA
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
d0a851cc50 target/hppa: Implement LDWA
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
63300a00ab target/hppa: Implement P*TLB and P*TLBE insns
We now have all of the TLB manipulation instructions.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
8d6ae7fb3a target/hppa: Implement I*TLBA and I*TLBP insns
The TLB can now be populated, but it cannot yet be cleared.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
b36942a698 target/hppa: Log unimplemented instructions
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
49c29d6c2e target/hppa: Implement the interval timer
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
4f5f254808 target/hppa: Implement external interrupts
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:26 -08:00
Richard Henderson
650cdb2a2e target/hppa: Implement tlb_fill
However since HPPA has a software-managed TLB, and the relevant
TLB manipulation instructions are not implemented, this does not
actually do anything.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:22:15 -08:00
Richard Henderson
c301f34e79 target/hppa: Implement IASQ
Any one TB will have only one space value.  If we change spaces,
we change TBs.  Thus BE and BEV must exit the TB immediately.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
660eefe1ca target/hppa: Avoid privilege level decrease during branches
These instructions force the destination privilege level
of the branch destination to be no higher than current.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
86f8d05fc0 target/hppa: Use space registers in data operations
This changes the system virtual address width to 64-bit and
incorporates the space registers into load/store operations.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
08aec8b53c target/hppa: Implement unaligned access trap
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
1a19da0da4 target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
f49b3537cb target/hppa: Implement rfi
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
7f221b0706 target/hppa: Adjust insn mask for mfctl,w
While the E bit is only used for pa2.0 mfctl,w from sar,
the otherwise reserved bit does not appear to be decoded.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
35136a77cb target/hppa: Add control registers
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
33423472f0 target/hppa: Add space registers
Not used where they should be yet, but we can copy them.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
e1b5a5ed6f target/hppa: Implement the system mask instructions
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
3d68ee7bbe target/hppa: Implement mmu_idx from IA privilege level
Most aspects of privilege are not yet handled.  But this
gives us the start from which to begin checking.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
eaa3783b68 target/hppa: Split address size from register size
For system mode, we will need 64-bit virtual addresses even when
we have 32-bit register sizes.  Since the rest of QEMU equates
TARGET_LONG_BITS with the address size, redefine everything
related to register size in terms of a new TARGET_REGISTER_BITS.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
2986721df7 target/hppa: Define hardware exception types
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
ba1d0b4482 target/hppa: Disable gateway page emulation for system mode
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Richard Henderson
fa57e3274d target/hppa: Define the rest of the PSW
We don't actually do anything with most of the bits yet,
but at least they have names and we have somewhere to
store them.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Helge Deller
813dff13bf target/hppa: Skeleton support for hppa-softmmu
With the addition of default-configs/hppa-softmmu.mak, this
will compile.  It is not enabled with this patch, however.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30 10:08:18 -08:00
Peter Maydell
6521130b0a Merge tpm 2018/01/26 v2
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Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2018-01-26-2' into staging

Merge tpm 2018/01/26 v2

# gpg: Signature made Mon 29 Jan 2018 22:20:05 GMT
# gpg:                using RSA key 0x75AD65802A0B4211
# gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B818 B9CA DF90 89C2 D5CE  C66B 75AD 6580 2A0B 4211

* remotes/stefanberger/tags/pull-tpm-2018-01-26-2:
  tpm: add CRB device
  tpm: report backend request error
  tpm: replace GThreadPool with AIO threadpool
  tpm: lookup cancel path under tpm device class
  tpm: fix alignment issues
  tpm: Set the flags of the CMD_INIT command to 0

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-30 15:20:01 +00:00
Peter Maydell
8ebb314b95 linux-user/signal.c: Rename MC_* defines
The SPARC code in linux-user/signal.c defines a set of
MC_* constants. On some SPARC hosts these are also defined
by sys/ucontext.h, resulting in build failures:

linux-user/signal.c:2786:0: error: "MC_NGREG" redefined [-Werror]
 #define MC_NGREG 19

In file included from /usr/include/signal.h:302:0,
                 from include/qemu/osdep.h:86,
                 from linux-user/signal.c:19:
/usr/include/sparc64-linux-gnu/sys/ucontext.h:59:0: note: this is the location of the previous definition
 # define MC_NGREG __MC_NGREG

Rename all these constants to SPARC_MC_* to avoid the clash.

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1517318239-15764-1-git-send-email-peter.maydell@linaro.org
2018-01-30 15:18:24 +00:00
Peter Maydell
11ed801d3d -----BEGIN PGP SIGNATURE-----
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Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging

# gpg: Signature made Mon 29 Jan 2018 15:49:05 GMT
# gpg:                using RSA key 0x9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/tracing-pull-request:
  tracetool: report error on foo() instead of foo(void)
  tracetool: clarify that "formats" means "format strings"
  tracetool: prefix parse errors with line numbers

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-30 09:47:51 +00:00
Marc-André Lureau
4ab6cb4c62 tpm: add CRB device
tpm_crb is a device for TPM 2.0 Command Response Buffer (CRB)
Interface as defined in TCG PC Client Platform TPM Profile (PTP)
Specification Family “2.0” Level 00 Revision 01.03 v22.

The PTP allows device implementation to switch between TIS and CRB
model at run time, but given that CRB is a simpler device to
implement, I chose to implement it as a different device.

The device doesn't implement other locality than 0 for now (my laptop
TPM doesn't either, so I assume this isn't so bad)

Tested with some success with Linux upstream and Windows 10, seabios &
modified ovmf. The device is recognized and correctly transmit
command/response with passthrough & emu. However, we are missing PPI
ACPI part atm.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2018-01-29 14:22:50 -05:00
Marc-André Lureau
6a8a23549a tpm: report backend request error
Use an Error** for request to let the caller handle error reporting.

This will also allow to inform the frontend of a backend error.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
2018-01-29 14:22:43 -05:00