Commit Graph

478 Commits

Author SHA1 Message Date
Andreas Färber
297d1b4e9d target-arm: Fix typo
The command line option is called -kernel, not -kenrel.

Cc: Paul Brook <paul@codesourcery.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-10-05 09:22:05 +01:00
Blue Swirl
bccd9ec5f0 softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture local
cpu_single_env hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 09:31:26 +00:00
Anthony Liguori
7267c0947d Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-20 23:01:08 -05:00
Edgar E. Iglesias
b9c6cbff76 Merge remote-tracking branch 'pm-arm/for-upstream' into pm 2011-08-09 19:16:43 +02:00
Blue Swirl
97b348e7d2 Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07 09:32:01 +00:00
Blue Swirl
3e4571724f exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c
to op_helper.c. Implement raise_exception_err_env() to handle dynamic
CPUState. Move the function declarations to cpu.h since they can be
used outside of op_helper.c context.

LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and
env_to_regs().

ARM: make raise_exception() static.

Convert
#include "exec.h"
to
#include "cpu.h"
#include "dyngen-exec.h"
and remove now unused target-*/exec.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30 09:41:14 +00:00
Peter Maydell
a492892cbe target-arm: Don't print debug messages for various UNDEF cases
Remove some stray printfs for cases which don't generally happen
(some VFP UNDEF cases, reads and writes to unknown cp14 registers);
we should simply generate an UNDEF when the instruction is executed.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-26 14:30:54 +00:00
Peter Maydell
6e0c0ed185 target-arm: UNDEF on a VCVTT/VCVTB UNPREDICTABLE to avoid TCG assert
VCVTT/VCVTB with bit 8 set is UNPREDICTABLE; we choose to UNDEF.
This avoids a TCG assert later when the VCVTT/VCVTB code tries to
use a source register that wasn't ever set up.

We pull the check for the presence of the half-precision extension
up in to this common code as well.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-26 14:30:54 +00:00
Peter Maydell
934814f198 target-arm: Handle UNDEF and UNPREDICTABLE cases for VLDM, VSTM
Handle the UNDEF and UNPREDICTABLE cases for VLDM and VSTM. In
particular, we now generate an undef exception for overlarge imm8
values rather than generating 1000+ TCG ops and hitting an assertion.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-26 14:30:54 +00:00
Peter Maydell
87f19eb2a5 target-arm: Support v6 barriers in linux-user mode
ARMv6 implemented various operations as special cases of cp15 accesses
which are true instructions in v7; this includes barriers (DMB, DSB, ISB).
Catch this special case at translate time, so that it works in linux-user
mode (which doesn't provide a functional get_cp15 helper) as well as
system mode.

Includes minor cleanup of the existing cases (single switch statement,
and doing the "OK in user mode?" test explicitly rather than hiding it in
cp15_user_ok()).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-26 14:30:54 +00:00
Peter Maydell
906879a98f target-arm: Mark 1136r1 as a v6K core
The 1136r1 is actually a v6K core (unlike the 1136r0); mark it as such,
thus enabling the TLS registers, NOP hints, CLREX, half and byte wide
exclusive load/stores, etc.

The VA-to-PA translation registers are not present on 1136r1, so
introduce a new feature flag for them, which is enabled on 1176,
11MPCore and all v7 cores.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
2011-07-26 14:30:54 +00:00
Jamie Iles
7807eed932 target-arm: support for ARM1176JZF-s cores
Add support for v6K ARM1176JZF-S.  This core includes the VA<->PA
translation capability and security extensions.

Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-26 14:30:54 +00:00
Jamie Iles
0ab06d8347 target-arm: make VMSAv7 remapping and AP dependent on V6K
The VMSAv7 remapping and access permissions were introduced in ARMv6K
and not ARMv7.

Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-26 14:22:31 +00:00
Matthew Fernandez
8e31bf388e Correct spelling of licensed
Correct typos of "licenced" to "licensed".

Reviewed-by: Stefan Weil <weil@mail.berlios.de>
Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de>
Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-23 11:26:12 -05:00
Blue Swirl
a3ce3668cc Merge branch 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access
  target-arm: Minimal implementation of performance counters
  Revert "Makefile.target: Allow target helpers to be in any *_helper.c file"
  Revert "target-arm: Use global env in neon_helper.c helpers"
  target-arm: Pass fp status pointer explicitly to neon fp helpers
  target-arm: Make VFP binop helpers take pointer to fpstatus, not CPUState
  target-arm: Add helper function to generate code to get fpstatus pointer
  Revert "target-arm: Use global env in iwmmxt_helper.c helpers"

Conflicts:
	Makefile.target
2011-07-20 20:23:01 +00:00
Stefan Weil
462a8bc646 arm: Add const attribute to some arm_boot_info pointers
Parameter 'info' is const, so add the missing attribute.

v2:
Add 'const' to the local variable info in do_cpu_reset() and to
the boot_info field in CPUARMState (suggested by Peter Maydell).

Cc: Andrzej Zaborowski <balrogg@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-07-04 21:58:25 +02:00
Blue Swirl
2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Blue Swirl
f081c76ccf Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:31 +00:00
Blue Swirl
f3e270377a exec.h: fix coding style and change cpu_has_work to return bool
Before the next patch, fix coding style of the areas affected.

Change the type of the return value from cpu_has_work() and
qemu_cpu_has_work() to bool.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:26 +00:00
Blue Swirl
1162c041c1 cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relying
on global env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:13 +00:00
Sebastian Huber
82845826e8 target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access
Correct the decode of the register numbers for BASEPRI, BASEPRI_MAX
and FAULTMASK, according to "ARMv7-M Architecture Reference Manual"
issue D section "B5.2.3 MRS" and "B5.2.3 MSR".

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:02:42 +00:00
Peter Maydell
74594c9d81 target-arm: Minimal implementation of performance counters
Newer Linux kernels assume the existence of the performance counter
cp15 registers. Provide a minimal implementation of these registers.
We support no events. This should be compliant with the ARM ARM,
except that we don't implement the cycle counter.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:02:08 +00:00
Peter Maydell
02da0b2d71 Revert "target-arm: Use global env in neon_helper.c helpers"
This effectively reverts commit 2a3f75b42a
so that we return to passing CPUState to helpers as an explicit parameter.
(There were a number of conflicts in target-arm/translate.c which had
to be resolved by hand so it is not a pure revert.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:01:41 +00:00
Peter Maydell
aa47cfdd17 target-arm: Pass fp status pointer explicitly to neon fp helpers
Make the Neon helpers for various floating point operations take an
explicit pointer to the float_status they use, so they don't rely on
the global environment pointer any more. This also allows us to drop
the mul/sub/add helpers completely and just use the vfp versions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:01:36 +00:00
Peter Maydell
ae1857eca2 target-arm: Make VFP binop helpers take pointer to fpstatus, not CPUState
Make the VFP binop helper functions take a pointer to the fp status, not
the entire CPUState. This will allow us to use them for Neon operations too.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:01:31 +00:00
Peter Maydell
5aaebd13da target-arm: Add helper function to generate code to get fpstatus pointer
Add and use a helper function which returns a TCGv which is a pointer
to the fp_status for either Neon or VFP operations.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:01:26 +00:00
Peter Maydell
477955bd55 Revert "target-arm: Use global env in iwmmxt_helper.c helpers"
This reverts commit 947a2fa21b,
returning the iwmmxt helpers to passing env in as a parameter.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-06-22 15:01:21 +00:00
Alex Zuepke
81c05daf08 target-arm: BKPT instructions should raise prefetch aborts with IFSR type 00010
Signed-off-by: Alex Zuepke <azuepke@sysgo.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-06-03 18:42:17 +02:00
Peter Maydell
b7fa9214d8 target-arm: Fix compilation failure for 64 bit hosts
Use the correct _ptr aliases for manipulating the pointer to
the fp_status; this fixes a compilation failure on 64 bit hosts.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-06-03 18:13:13 +02:00
Peter Maydell
89e402688e target-arm/exec.h: Remove unused #define of M0
Remove a preprocessor #define which is never used.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:53:34 +02:00
Peter Maydell
cab565c412 target-arm: Signal InvalidOp for Neon GE and GT compares of QNaN
If the input to a Neon float comparison is a quiet NaN, the ARM ARM
specifies that we should raise InvalidOp if the comparison is GE or GT
but not for EQ. (Signaling NaNs raise InvalidOp regardless). This means
only EQ should use the _quiet version of the comparison function.

We implement this by cleaning up the comparison helpers to call the
appopriate versions of the softfloat simple comparison functions
(float32_le and friends) rather than the generic float32_compare functions.
This makes them simple enough that they are clearer opencoded rather
than macroised.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:39:36 +02:00
Peter Maydell
5500b06cb5 target-arm: Use correct float status for Neon int-float conversions
The Neon versions of int-float conversions must use the "standard FPSCR"
rather than the default FPSCR. Implement this by having the helper
functions take a pointer to the appropriate float_status value rather
than simply taking a pointer to the entire CPUState, and making
translate.c pass a pointer to vfp.fp_status or vfp.standard_fp_status
appropriately for whether the instruction being translated is Neon
or VFP.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:39:36 +02:00
Peter Maydell
36802b6b1e target-arm: Signal Underflow when denormal flushed to zero on output
On ARM the architecture mandates that when an output denormal is flushed to
zero we must set the FPSCR UFC (underflow) bit, so map softfloat's
float_flag_output_denormal accordingly.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:39:36 +02:00
Peter Maydell
43fe9bdb0f target-arm: Signal InputDenormal for VRECPE, VRSQRTE, VRECPS, VRSQRTS
The helpers for VRECPE.F32, VSQRTE.F32, VRECPS and VRSQRTS handle denormals
as special cases, so we must set the InputDenormal exception flag ourselves.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:39:35 +02:00
Peter Maydell
1146a817c1 target-arm: Don't set FP exceptions in recip, recip_sqrt estimate fns
The functions which do the core estimation algorithms for the VRSQRTE
and VRECPE instructions should not set floating point exception flags,
so use a local fp status for doing these calculations.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:39:34 +02:00
Peter Maydell
605a6aed56 target-arm: Fix VMLA, VMLS, VNMLS, VNMLA handling of NaNs
Correct handling of NaNs for VFP VMLA, VMLS, VNMLS and VNMLA requires that
we implement the set of negations and additions specified by the ARM ARM;
plausible looking simplifications like turning (-A + B) into (B - A) or
computing (A + B) rather than (B + A) result in selecting the wrong NaN or
returning a NaN with the wrong sign bit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-15 00:22:57 +02:00
Anthony Liguori
711c21280b Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Conflicts:
	cpu-all.h
2011-05-12 08:08:12 -05:00
Richard Henderson
403946c009 target-arm: Privatize CPU_INTERRUPT_FIQ.
This interrupt name was only used by the ARM port.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08 16:55:23 +00:00
Stefan Weil
a1c7273b82 Fix typos in comments and code (occured -> occurred and related)
The code changed here is an unused data type name (evt_flush_occurred).

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-05-08 10:02:18 +01:00
Stefan Weil
1301f32205 Fix typos in comments (neccessary -> necessary)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-05-08 10:02:18 +01:00
Peter Maydell
a7d3970d06 target-arm: Don't update base register on abort in Thumb T1 LDM
Make sure the base register isn't updated if it is in the load list
for a Thumb LDM (T1 encoding) which aborts partway through the load.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-27 20:14:34 +02:00
YuYeon Oh
5856d44eb5 target-arm: fix LDMIA bug on page boundary
target-arm: fix LDMIA bug on page boundary

When consecutive memory locations are on page boundary, a base register may be
loaded before page fault occurs. After page fault handling, it losts the memory
location information. To solve this problem, loading a base register has to put back.

Signed-off-by: Yuyeon Oh <yuyeon.oh@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-27 20:13:26 +02:00
Peter Maydell
f2dd89d0c7 target-arm: Handle UNDEF cases for Neon VLD/VST multiple-structures
Correctly UNDEF for Neon VLD/VST "multiple structures" forms where the
align field is not valid.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 22:10:12 +02:00
Peter Maydell
93262b1625 target-arm: Handle UNDEFs for Neon single element load/stores
Handle the UNDEF and UNPREDICTABLE cases for Neon "single element to
one lane" VLD and "single element from one lane" VST.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 22:10:04 +02:00
Peter Maydell
ec444452b8 target-arm: Set Invalid flag for NaN in float-to-int conversions
When we catch the special case of an input NaN in ARM float to int
helper functions, set the Invalid flag as well as returning the
correct result.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-20 13:01:05 +02:00
Dmitry Eremin-Solenikov
5bc95aa246 Implement basic part of SA-1110/SA-1100
Basic implementation of DEC/Intel SA-1100/SA-1110 chips emulation.
Implemented:
 - IRQs
 - GPIO
 - PPC
 - RTC
 - UARTs (no IrDA/etc.)
 - OST reused from pxa25x

Everything else is TODO (esp. PM/idle/sleep!) - see the todo in the
hw/strongarm.c

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-20 12:59:15 +02:00
Stefan Weil
618ba8e6a1 Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.
Is is now unused, so remove it.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:37:03 +02:00
Stefan Weil
e87b7cb0f0 Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commit
d2856f1ad4.
The only reason for parameter searched_pc was
a debug statement in target-i386/translate.c.

Parameter puc was needed by target-sparc until
commit d7da2a1040.

Remove searched_pc from the debug statement and remove both
parameters from the parameter list of gen_pc_load.

As the function name gen_pc_load was also misleading,
it is now called restore_state_to_opc. This new name
was suggested by Peter Maydell, thanks.

v2: Remove last parameter, too, and rename the function.

v3: Fix [] typo in target-arm/translate.c.
    Fix wrong SHA1 object name in commit message (copy+paste error).

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:33:59 +02:00
Lluís
7b59220ef3 move helpers.h to helper.h
This provides a consistent naming scheme across all targets.

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:41:11 +02:00
Stefan Weil
61cc8701f3 Fix some typos in comments and documentation
helpfull -> helpful
usefull -> useful
cotrol -> control

and a grammar fix.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-16 12:24:28 +01:00