Commit Graph

2091 Commits

Author SHA1 Message Date
Stefano Garzarella
29f2316761 docs: fix references to docs/devel/atomics.rst
Commit 15e8699f00 ("atomics: convert to reStructuredText") converted
docs/devel/atomics.txt to docs/devel/atomics.rst.

We still have several references to the old file, so let's fix them
with the following command:

  sed -i s/atomics.txt/atomics.rst/ $(git grep -l docs/devel/atomics.txt)

Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210517151702.109066-3-sgarzare@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-06-02 06:51:09 +02:00
Yasuo Kuwahara
26b1248f66 tcg/aarch64: Fix tcg_out_rotl
The last argument of tcg_out_extr() must be in the range 0-31 if ext==0.
Before the fix, when m==0 it becomes 32 and it crashes with an Illegal
instruction on Apple Silicon.  After the fix, it will be 0.  If m is in
the range 1-31, it is the same as before.

Signed-off-by: Yasuo Kuwahara <kwhr00@gmail.com>
Message-Id: <CAHfJ0vSXnmnTLmT0kR=a8ACRdw_UsLYOhStzUzgVEHoH8U-7sA@mail.gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26 15:33:59 -07:00
Thomas Huth
2068cabd3f Do not include cpu.h if it's not really necessary
Stop including cpu.h in files that don't need it.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210416171314.2074665-4-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02 17:24:51 +02:00
Thomas Huth
4c386f8064 Do not include sysemu/sysemu.h if it's not really necessary
Stop including sysemu/sysemu.h in files that don't need it.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210416171314.2074665-2-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-05-02 17:24:50 +02:00
Kele Huang
4e655e3cd8 tcg/mips: Fix SoftTLB comparison on mips backend
The addrl used to compare with SoftTLB entry should be sign-extended
in common case, and it will cause constant failing in SoftTLB
comparisons for the addrl whose address is over 0x80000000 on the
emulation of 32-bit guest on 64-bit host.

This is an important performance bug fix. Spec2000 gzip rate increase
from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).

Signed-off-by: Kele Huang <kele.hwang@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210401100457.191458-1-kele.hwang@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-04-05 07:32:56 -07:00
Richard Henderson
c118881ee6 tcg: Workaround macOS 11.2 mprotect bug
There's a change in mprotect() behaviour [1] in the latest macOS
on M1 and it's not yet clear if it's going to be fixed by Apple.

As a short-term fix, ignore failures setting up the guard pages.

[1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Buglink: https://bugs.launchpad.net/qemu/+bug/1914849
Message-Id: <20210320165720.1813545-3-richard.henderson@linaro.org>
2021-03-23 19:36:36 -06:00
Richard Henderson
15c4e8fe44 tcg: Do not set guard pages on the rx portion of code_gen_buffer
The rw portion of the buffer is the only one in which overruns
can be generated.  Allow the rx portion to be more completely
covered by huge pages.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Message-Id: <20210320165720.1813545-2-richard.henderson@linaro.org>
2021-03-23 19:36:36 -06:00
Miroslav Rezanina
5e8892db93 tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op
There are two different versions of prototype for tcg_out_op and
tcg_out_vec_op functions:

1) using const TCGArg *args and const int *const_args arguments
2) using const TCGArg args[TCG_MAX_OP_ARGS] and const int
   const_args[TCG_MAX_OP_ARGS] aguments.

This duality causes warnings on GCC 11 and prevents build using
--enable-werror.  As second version provides more information,
unify functions prototypes to this variant.

Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com>
Message-Id: <20210312121418.139093-1-mrezanin@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
98f9b467b0 tcg/tci: Split out tcg_out_op_r[iI]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
87713c04d1 tcg/tci: Split out tcg_out_op_v
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
6f00d7af75 tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
6dbf78c17a tcg/tci: Split out tcg_out_op_rrrrcl
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
db492ebb91 tcg/tci: Split out tcg_out_op_rrrr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
ab5b8a3fb4 tcg/tci: Split out tcg_out_op_rrrrrr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
723c2b5bc5 tcg/tci: Split out tcg_out_op_rrcl
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
37e112e82a tcg/tci: Split out tcg_out_op_rrrbb
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
223abacdd9 tcg/tci: Split out tcg_out_op_rrrrrc
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
bd42124bee tcg/tci: Split out tcg_out_op_rrrc
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
549d039667 tcg/tci: Split out tcg_out_op_rrr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
ffe86eb043 tcg/tci: Split out tcg_out_op_rr
At the same time, validate the type argument in tcg_out_mov.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
7aa295c5d2 tcg/tci: Split out tcg_out_op_p
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
b9dcd21a25 tcg/tci: Split out tcg_out_op_l
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:45 -06:00
Richard Henderson
fe8c47cbf6 tcg/tci: Split out tcg_out_op_rrs
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 09:04:42 -06:00
Richard Henderson
ae216c9747 tcg/tci: Push opcode emit into each case
We're about to split out bytecode output into helpers, but
we can't do that one at a time if tcg_out_op_t is being done
outside of the switch.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
59964b4f98 tcg/tci: Implement the disassembler properly
Actually print arguments as opposed to simply the opcodes
and, uselessly, the argument counts.  Reuse all of the helpers
developed as part of the interpreter.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
65f1b6cc9a tcg/tci: Remove tci_disas
This function is unused.  It's not even the disassembler,
which is print_insn_tci, located in disas/tci.c.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
92bc4fad82 tcg/tci: Hoist op_size checking into tci_args_*
This performs the size check while reading the arguments,
which means that we don't have to arrange for it to be
done after the operation.  Which tidies all of the branches.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
63041ed25f tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm}
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
00e338faa0 tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits
We are currently using the "natural" size routine, which
uses 64-bits on a 64-bit host.  The TCGMemOpIdx operand
has 11 bits, so we can safely reduce to 32-bits.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
79dd3a4f59 tcg/tci: Clean up deposit operations
Use the correct set of asserts during code generation.
We do not require the first input to overlap the output;
the existing interpreter already supported that.

Split out tci_args_rrrbb in the translator.
Use the deposit32/64 functions rather than inline expansion.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
cbe871313e tcg/tci: Split out tci_args_rrrr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
120402b5cb tcg/tci: Split out tci_args_rrrrrr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
1670a2b9bb tcg/tci: Reuse tci_args_l for goto_tb
Convert to indirect jumps, as it's less complicated.
Then we just have a pointer to the tb address at which
the chain is stored, from which we read.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
158d38737b tcg/tci: Reuse tci_args_l for exit_tb
Do not emit a uint64_t, but a tcg_target_ulong, aka uintptr_t.
This reduces the size of the constant on 32-bit hosts.
The assert for label != NULL has to be removed because that
is a valid value for exit_tb.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
2ed8a38192 tcg/tci: Reuse tci_args_l for calls.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
b95aa12ed2 tcg/tci: Split out tci_args_ri and tci_args_rI
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
5a0adf3490 tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
817cadd6ee tcg/tci: Split out tci_args_rrrrrc
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
f28ca03ed5 tcg/tci: Split out tci_args_l
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
963e9fa2bd tcg/tci: Split out tci_args_rrrc
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
e85e4b8f95 tcg/tci: Split out tci_args_rrr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
fc4a62f65c tcg/tci: Split out tci_args_rr
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
cdd9799b25 tcg/tci: Split out tci_args_rrs
Begin splitting out functions that do pure argument decode,
without actually loading values from the register set.

This means that decoding need not concern itself between
input and output registers.  We can assert that the register
number is in range during decode, so that it is safe to
simply dereference from regs[] later.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
adaa9a2f9a tcg/tci: Rename tci_read_r to tci_read_rval
In the next patches, we want to use tci_read_r to return
the raw register number.  So rename the existing function,
which returns the register value, to tci_read_rval.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
dbcbda2cd8 tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64
These operations are always available under different names:
INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove
no code with the ifdef.

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-17 07:24:44 -06:00
Richard Henderson
9e9acb7b34 tcg/tci: Merge mov, not and neg operations
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-06 11:45:21 -08:00
Richard Henderson
fe2b13bb7c tcg/tci: Merge bswap operations
This includes bswap16 and bswap32.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-06 11:45:21 -08:00
Richard Henderson
13a1d64045 tcg/tci: Merge extension operations
This includes ext8s, ext8u, ext16s, ext16u.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-06 11:45:21 -08:00
Richard Henderson
dd2bb20e41 tcg/tci: Merge basic arithmetic operations
This includes add, sub, mul, and, or, xor.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-06 11:45:21 -08:00
Richard Henderson
09c8b8b90d tcg/tci: Reduce use of tci_read_r64
In all cases restricted to 64-bit hosts, tcg_read_r is
identical.  We retain the 64-bit symbol for the single
case of INDEX_op_qemu_st_i64.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-03-06 11:45:21 -08:00