tcg/tci: Merge bswap operations
This includes bswap16 and bswap32. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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tcg/tci.c
22
tcg/tci.c
@ -635,15 +635,15 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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tci_write_reg(regs, t0, (uint16_t)t1);
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break;
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#endif
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#if TCG_TARGET_HAS_bswap16_i32
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case INDEX_op_bswap16_i32:
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#if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64
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CASE_32_64(bswap16)
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, bswap16(t1));
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break;
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#endif
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#if TCG_TARGET_HAS_bswap32_i32
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case INDEX_op_bswap32_i32:
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#if TCG_TARGET_HAS_bswap32_i32 || TCG_TARGET_HAS_bswap32_i64
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CASE_32_64(bswap32)
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, bswap32(t1));
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@ -795,20 +795,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, (uint32_t)t1);
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break;
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#if TCG_TARGET_HAS_bswap16_i64
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case INDEX_op_bswap16_i64:
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, bswap16(t1));
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break;
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#endif
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#if TCG_TARGET_HAS_bswap32_i64
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case INDEX_op_bswap32_i64:
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t0 = *tb_ptr++;
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t1 = tci_read_r(regs, &tb_ptr);
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tci_write_reg(regs, t0, bswap32(t1));
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break;
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#endif
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#if TCG_TARGET_HAS_bswap64_i64
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case INDEX_op_bswap64_i64:
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t0 = *tb_ptr++;
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