Commit Graph

96226 Commits

Author SHA1 Message Date
Alex Bennée
18ad049d90 tests/docker: update debian-armhf-cross with lcitool
Use lcitool to update debian-armhf-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-7-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
06885cf935 tests/lcitool: fix up indentation to correct style
3 space indentation snuck into the initial commit. Clean it up before
we let it get established. I've also:

  - removed unused os import
  - added double lines between functions
  - added some comments and grouped and sorted the generation stanzas

My lint tool is also recommending using f-strings but that requires
python 3.6.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220527153603.887929-6-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Alex Bennée
85b141ea6a meson.build: fix summary display of test compilers
The recent refactoring of configure.sh dropped a number of variables
we relied on for printing out information. Make it simpler.

Fixes: eebf199c09 (tests/tcg: invoke Makefile.target directly from QEMU's makefile)
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220527153603.887929-5-alex.bennee@linaro.org>
2022-06-01 13:08:09 +01:00
Marc-André Lureau
861dca3707 gitlab-ci: add meson JUnit test result into report
This allows the gitlab UI to show the test results in different ways,
see doc:

  https://docs.gitlab.com/ee/ci/unit_test_reports.html#how-it-works

Previous we only reports avocado test results (.avocado_test_job_template),
with this change, the qemu/meson tests are also covered.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220525173411.612224-1-marcandre.lureau@redhat.com>
[AJB: expand the commit description]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220527153603.887929-4-alex.bennee@linaro.org>
2022-06-01 13:06:32 +01:00
Thomas Huth
6fd4e75610 .gitlab-ci.d/crossbuilds: Fix the dependency of the cross-i386-tci job
The cross-i386-tci job uses the fedora-i386-cross image, so we should make sure
that the corresponding job that builds it (the i386-fedora-cross-container job)
has finished before we start the TCI job.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220524092600.89997-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220527153603.887929-3-alex.bennee@linaro.org>
2022-06-01 10:21:49 +01:00
Thomas Huth
658f2da1f3 .gitlab-ci.d/container-cross: Fix RISC-V container dependencies / stages
The "riscv64-debian-cross-container" job does not depend on any other
container job from the first stage, so we can move it to the first
stage, too.

The "riscv64-debian-test-cross-container" job needs the debian11
container, so we should add a proper "needs:" statement here.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220524093141.91012-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220527153603.887929-2-alex.bennee@linaro.org>
2022-06-01 10:21:49 +01:00
Richard Henderson
7077fcb9b6 Pull request
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Merge tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu into staging

Pull request

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# gpg:                using RSA key E2776AABA08E26FF5A1B4A0952B1D6E951D0CE07
# gpg: Good signature from "Maciej S. Szmigiero <mail@maciej.szmigiero.name>" [unknown]
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* tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu:
  hw/hyperv/vmbus: Remove unused vmbus_load/save_req()
  MAINTAINERS: Add myself as the maintainer for Hyper-V VMBus

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-30 12:40:36 -07:00
Philippe Mathieu-Daudé
6ede46b910 hw/hyperv/vmbus: Remove unused vmbus_load/save_req()
vmbus_save_req() and vmbus_load_req() are not used.
Remove them to avoid maintaining dead code.

This essentially reverts commit 4dd8a7064b
("vmbus: add infrastructure to save/load vmbus requests").

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211106134155.582312-2-philmd@redhat.com>
[MSS: Remove also corresponding variables, which are now unused]
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2022-05-30 19:49:42 +02:00
Maciej S. Szmigiero
ee344768c1 MAINTAINERS: Add myself as the maintainer for Hyper-V VMBus
This way there is some contact point for incoming patches,
and somebody to review and pick up them.

Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2022-05-30 19:12:38 +02:00
Richard Henderson
ed72f34421 target-arm queue:
* docs/system/arm: Add FEAT_HCX to list of emulated features
  * target/arm/hvf: Include missing "cpregs.h"
  * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready
  * SVE: refactor to use TRANS/TRANS_FEAT macros and push
    SVE feature check down to individual insn level
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Merge tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * docs/system/arm: Add FEAT_HCX to list of emulated features
 * target/arm/hvf: Include missing "cpregs.h"
 * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready
 * SVE: refactor to use TRANS/TRANS_FEAT macros and push
   SVE feature check down to individual insn level

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# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]

* tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm: (117 commits)
  target/arm: Remove aa64_sve check from before disas_sve
  target/arm: Add sve feature check for remaining trans_* functions
  target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
  target/arm: Use TRANS_FEAT for do_FMLAL_zzzw
  target/arm: Use TRANS_FEAT for do_shr_narrow
  target/arm: Use TRANS_FEAT for do_shll_tb
  target/arm: Use TRANS_FEAT for do_narrow_extract
  target/arm: Use TRANS_FEAT for FCMLA_zzxz
  target/arm: Remove assert in trans_FCMLA_zzxz
  target/arm: Use TRANS_FEAT for DO_FPCMP
  target/arm: Use TRANS_FEAT for DO_FP_IMM
  target/arm: Move null function and sve check into do_fp_imm
  target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp
  target/arm: Introduce gen_gvec_fpst_zzzzp
  target/arm: Use TRANS_FEAT for FCADD
  target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz
  target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz
  target/arm: Use TRANS_FEAT for do_ppz_fp
  target/arm: Use TRANS_FEAT for FLOGB
  target/arm: Use TRANS_FEAT for do_frint_mode
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-30 09:22:24 -07:00
Richard Henderson
b1071174d2 target/arm: Remove aa64_sve check from before disas_sve
We now have individual checks on all insns within disas_sve.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-115-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:12 +01:00
Richard Henderson
1402a6b88f target/arm: Add sve feature check for remaining trans_* functions
For all remaining trans_* functions that do not already
have a check, add one now.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-114-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
fc7c882944 target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-113-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
72c7f90621 target/arm: Use TRANS_FEAT for do_FMLAL_zzzw
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-112-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
f7f2f0faa2 target/arm: Use TRANS_FEAT for do_shr_narrow
Rename from do_sve2_shr_narrow and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-111-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
5a528bb5d8 target/arm: Use TRANS_FEAT for do_shll_tb
Rename from do_sve2_shll_tb and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-110-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
6100d08493 target/arm: Use TRANS_FEAT for do_narrow_extract
Rename from do_sve2_narrow_extract and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-109-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
e600d64980 target/arm: Use TRANS_FEAT for FCMLA_zzxz
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-108-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
df9024760e target/arm: Remove assert in trans_FCMLA_zzxz
Since 636ddeb15c, we do not require rd == ra.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-107-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
d961b3e40b target/arm: Use TRANS_FEAT for DO_FPCMP
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-106-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
98c37459c3 target/arm: Use TRANS_FEAT for DO_FP_IMM
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-105-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
413ee8e41a target/arm: Move null function and sve check into do_fp_imm
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-104-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
498be5b87d target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-103-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
e14da11035 target/arm: Introduce gen_gvec_fpst_zzzzp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-102-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
6f5cd67008 target/arm: Use TRANS_FEAT for FCADD
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-101-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
7de2617b7a target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-100-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:11 +01:00
Richard Henderson
7e2d07ff87 target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz
Rename the function to match other expansion functions and
move to be adjacent.  Split out gen_gvec_fpst_zzzp as a
helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-99-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
63d6aef86c target/arm: Use TRANS_FEAT for do_ppz_fp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-98-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
7b9dfcfec8 target/arm: Use TRANS_FEAT for FLOGB
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-97-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
2764583695 target/arm: Use TRANS_FEAT for do_frint_mode
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-96-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
13c0dd1739 target/arm: Move null function and sve check into do_frint_mode
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-95-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
0360730c46 target/arm: Rename do_zpz_ptr to gen_gvec_ool_fpst_arg_zpz
Rename the function to match other expansion function and
move to be adjacent.  Split out gen_gvec_fpst_zzp as a
helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-94-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
ed6bb6b4d2 target/arm: Expand frint_fns for MO_8
Simplify indexing of this array.  This will allow folding
of the illegal esz == 0 into the normal fn == NULL check.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-93-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
de58c6b09f target/arm: Use TRANS_FEAT for FRECPE, FRSQRTE
Rename do_zz_fp to gen_gvec_fpst_arg_zz, and move up.
Split out gen_gvec_fpst_zz as a helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-92-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
8003e7cf15 target/arm: Use TRANS_FEAT for do_reduce
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-91-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
5ce18efe30 target/arm: Move null function and sve check into do_reduce
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-90-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
cdd8592337 target/arm: Use TRANS_FEAT for FTMAD
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-89-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
9c99ef6677 target/arm: Use TRANS_FEAT for FMUL_zzx
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-88-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
bdd4ce0d0e target/arm: Use TRANS_FEAT for DO_FP3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-87-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
532724e439 target/arm: Rename do_zzz_fp to gen_gvec_ool_fpst_arg_zzz
Rename the function to match gen_gvec_ool_arg_zzz,
and move to be adjacent.  Split out gen_gvec_fpst_zzz
as a helper while we're at it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-86-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
698ddb9d02 target/arm: Use TRANS_FEAT for BFMLA
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-85-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:10 +01:00
Richard Henderson
3b879c2882 target/arm: Use TRANS_FEAT for FMLA
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-84-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
4b0b37e900 target/arm: Use TRANS_FEAT for MOVPRFX
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-83-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
29693f5f97 target/arm: Use TRANS_FEAT for SEL_zpzz
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-82-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
738b679cc9 target/arm: Implement NOT (prediates) alias
This alias is defined on EOR (prediates).  While the
same operation could be performed with NAND or NOR,
only bother with the official alias.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-81-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
23e5fa5f90 target/arm: Move sve check into gen_gvec_fn_ppp
Combined with the check already present in gen_mov_p,
we can simplify some special cases in trans_AND_pppp
and trans_BIC_pppp.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-80-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
25aee7cc3b target/arm: Use TRANS_FEAT for FMMLA
Being able to specify the feature predicate in TRANS_FEAT
makes it easier to split trans_FMMLA by element size,
which also happens to simplify the decode.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-79-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
41bf9b6799 target/arm: Introduce gen_gvec_{ptr,fpst}_zzzz
Use these for the several varieties of floating-point
multiply-add instructions.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-78-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
ef4a395863 target/arm: Use TRANS_FEAT for do_zzi_ool
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-77-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00
Richard Henderson
17b54d1c78 target/arm: Use TRANS_FEAT for do_zzi_sat
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-76-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-30 17:05:09 +01:00