Commit Graph

20905 Commits

Author SHA1 Message Date
Blue Swirl
d758207801 x86: split off integer helpers
Move integer and bit field helpers to int_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
5918fffb1d x86: split off condition code helpers
Move condition code helpers to cc_helper.c.

Move the shared inline functions lshift(), cpu_load_eflags() and
cpu_cc_compute_all() to cpu.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
997ff0d9a9 x86: prepare eflags helpers for general use
Adjust function names and add an explicit CPUX86State
parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
38de4c46f2 x86: split condition code and shift templates
Move shift templates from helper_template.h to
shift_helper_template.h and the condition code helpers
to cc_helper_template.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
a04759f6ae x86: fix coding style in helper_template.h
Fix coding style in helper_template.h before next commit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
c4baa0503d x86: improve SSE table type safety
SSE function tables could easily be corrupted because of use
of void pointers.

Introduce function pointer types and helper variables in order
to improve type safety.

Split sse_op_table3 according to types used.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
f299f4374a x86: split off FPU helpers
Move FPU and MMX/SSE helpers to fpu_helpers.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
e01d9d31d9 x86: fix coding style in ops_sse.h
Fix coding style in ops_sse.h before next commit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
9dd69d65aa x86: avoid an extern declaration
After the previous patch, we can use the proper
declaration in a common header file.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
599b9a5a51 x86: split off exception handlers
Move exception handlers from op_helper.c to excp_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
77b2bc2c09 x86: avoid AREG0 for exceptions
Add an explicit CPUX86State parameter instead of relying on AREG0.

Merge raise_exception_env() to raise_exception(), likewise with
raise_exception_err_env() and raise_exception_err().

Introduce cpu_svm_check_intercept_param() and cpu_vmexit()
as wrappers.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl
20054ef03e x86: prepare op_helper.c for splitting
Fix coding style and a few typos.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Benjamin Herrenschmidt
7a0bac4da9 Add a memory barrier to DMA functions
The emulated devices can run simultaneously with the guest, so
we need to be careful with ordering of load and stores done by
them to the guest system memory, which need to be observed in
the right order by the guest operating system.

This adds a barrier call to the basic DMA read/write ops which
is currently implemented as a smp_mb(), but could be later
improved for more fine grained control of barriers.

Additionally, a _relaxed() variant of the accessors is provided
to easily convert devices who would be performance sensitive
and negatively impacted by the change.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:26 -05:00
David Gibson
edded45406 pseries: Implement IOMMU and DMA for PAPR PCI devices
Currently the pseries machine emulation does not support DMA for emulated
PCI devices, because the PAPR spec always requires a (guest visible,
paravirtualized) IOMMU which was not implemented.  Now that we have
infrastructure for IOMMU emulation, we can correct this and allow PCI DMA
for pseries.

With the existing PAPR IOMMU code used for VIO devices, this is almost
trivial. We use a single DMAContext for each (virtual) PCI host bridge,
which is the usual configuration on real PAPR machines (which often have
_many_ PCI host bridges).

Cc: Alex Graf <agraf@suse.de>

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:26 -05:00
David Gibson
5fa45de562 iommu: Allow PCI to use IOMMU infrastructure
This patch adds some hooks to let PCI devices and busses use the new IOMMU
infrastructure.  When IOMMU support is enabled, each PCI device now
contains a DMAContext * which is used by the pci_dma_*() wrapper functions.

By default, the contexts are initialized to NULL, assuming no IOMMU.
However the platform or host bridge code which sets up the PCI bus can use
pci_setup_iommu() to set a function which will determine the correct
DMAContext for a given PCI device.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:26 -05:00
David Gibson
ad0ebb91cd pseries: Convert sPAPR TCEs to use generic IOMMU infrastructure
The pseries platform already contains an IOMMU implementation, since it is
essential for the platform's paravirtualized VIO devices.  This IOMMU
support is currently built into the implementation of the VIO "bus" and
the various VIO devices.

This patch converts this code to make use of the new common IOMMU
infrastructure.

We don't yet handle synchronization of map/unmap callbacks vs. invalidations,
this will require some complex interaction with the kernel and is not a
major concern at this stage.

Cc: Alex Graf <agraf@suse.de>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
e5332e6334 iommu: Introduce IOMMU emulation infrastructure
This patch adds the basic infrastructure necessary to emulate an IOMMU
visible to the guest.  The DMAContext structure is extended with
information and a callback describing the translation, and the various
DMA functions used by devices will now perform IOMMU translation using
this callback.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>

Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
e2f89926f1 usb: Convert usb_packet_{map, unmap} to universal DMA helpers
The USB UHCI and EHCI drivers were converted some time ago to use the
pci_dma_*() helper functions.  However, this conversion was not complete
because in some places both these drivers do DMA via the usb_packet_map()
function in usb-libhw.c.  That function directly used
cpu_physical_memory_map().

Now that the sglist code uses DMA wrappers properly, we can convert the
functions in usb-libhw.c, thus conpleting the conversion of UHCI and EHCI
to use the DMA wrappers.

Note that usb_packet_map() invokes dma_memory_map() with a NULL invalidate
callback function.  When IOMMU support is added, this will mean that
usb_packet_map() and the corresponding usb_packet_unmap() must be called in
close proximity without dropping the qemu device lock - otherwise the guest
might invalidate IOMMU mappings while they are still in use by the device
code.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
10ca2943aa ide/ahci: Use universal DMA helper functions
The AHCI device can provide both PCI and SysBus AHCI device
emulations.  For this reason, it wasn't previously converted to use
the pci_dma_*() helper functions.  Now that we have universal DMA
helper functions, this converts AHCI to use them.

The DMAContext is obtained from pci_dma_context() in the PCI case and
set to NULL in the SysBus case (i.e. we assume for now that a SysBus
AHCI has no IOMMU translation).

Cc: Kevin Wolf <kwolf@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
c65bcef306 iommu: Make sglists and dma_bdrv helpers use new universal DMA helpers
dma-helpers.c contains a number of helper functions for doing
scatter/gather DMA, and various block device related DMA.  Currently,
these directly access guest memory using cpu_physical_memory_*(),
assuming no IOMMU translation.

This patch updates this code to use the new universal DMA helper
functions.  qemu_sglist_init() now takes a DMAContext * to describe
the DMA address space in which the scatter/gather will take place.

We minimally update the callers qemu_sglist_init() to pass NULL
(i.e. no translation, same as current behaviour).  Some of those
callers should pass something else in some cases to allow proper IOMMU
translation in future, but that will be fixed in later patches.

Cc: Kevin Wolf <kwolf@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
9ac6a217f2 usb-ohci: Use universal DMA helper functions
The OHCI device emulation can provide both PCI and SysBus OHCI
implementations.  Because of this, it was not previously converted to
use the PCI DMA helper functions.

This patch converts it to use the new universal DMA helper functions.
In the PCI case, it obtains its DMAContext from pci_dma_context(), in
the SysBus case, it uses NULL - i.e. assumes for now that there will
be no IOMMU translation for a SysBus OHCI.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
d86a77f8ab iommu: Add universal DMA helper functions
Not that long ago, every device implementation using DMA directly
accessed guest memory using cpu_physical_memory_*().  This meant that
adding support for a guest visible IOMMU would require changing every
one of these devices to go through IOMMU translation.

Shortly before qemu 1.0, I made a start on fixing this by providing
helper functions for PCI DMA.  These are currently just stubs which
call the direct access functions, but mean that an IOMMU can be
implemented in one place, rather than for every PCI device.

Clearly, this doesn't help for non PCI devices, which could also be
IOMMU translated on some platforms.  It is also problematic for the
devices which have both PCI and non-PCI version (e.g. OHCI, AHCI) - we
cannot use the the pci_dma_*() functions, because they assume the
presence of a PCIDevice, but we don't want to have to check between
pci_dma_*() and cpu_physical_memory_*() every time we do a DMA in the
device code.

This patch makes the first step on addressing both these problems, by
introducing new (stub) dma helper functions which can be used for any
DMA capable device.

These dma functions take a DMAContext *, a new (currently empty)
variable describing the DMA address space in which the operation is to
take place.  NULL indicates untranslated DMA directly into guest
physical address space.  The intention is that in future non-NULL
values will given information about any necessary IOMMU translation.

DMA using devices must obtain a DMAContext (or, potentially, contexts)
from their bus or platform.  For now this patch just converts the PCI
wrappers to be implemented in terms of the universal wrappers,
converting other drivers can take place over time.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>
Cc: Richard Henderson <rth@twiddle.net>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
David Gibson
8292f75ad2 Better support for dma_addr_t variables
A while back, we introduced the dma_addr_t type, which is supposed to
be used for bus visible memory addresses.  At present, this is an
alias for target_phys_addr_t, but this will change when we eventually
add support for guest visible IOMMUs.

There are some instances of target_phys_addr_t in the code now which
should really be dma_addr_t, but can't be trivially converted due to
missing features which this patch corrects.

 * We add DMA_ADDR_BITS analagous to TARGET_PHYS_ADDR_BITS.  This is
   important where we need to make a compile-time (#if) based on the
   size of dma_addr_t.

 * We add a new helper macro to create device properties which take a
   dma_addr_t, currently an alias to DEFINE_PROP_TADDR().

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:33:25 -05:00
Jason Wang
fcce6fd25f rtl8139: validate rx ring before receiving packets
Commit ff71f2e8ca prevent the possible
crash during initialization of linux driver by checking the operating
mode.This seems too strict as:

- the real card could still work in mode other than normal
- some buggy driver who does not set correct opmode after eeprom
 access

So, considering rx ring address were reset to zero (which could be
safely trated as an address not intened to DMA to), in order to
both letting old guest work and preventing the unexpected DMA to
guest, we can forbid packet receiving when rx ring address is zero.

Tested-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:27:00 -05:00
Daniel P. Berrange
2624bab836 Remove support for non-threaded VNC server
QEMU now has a fundamental requirement for pthreads, so there
is no compelling reason to retain support for the non-threaded
VNC server. Remove the --{enable,disable}-vnc-thread configure
arguments, and all CONFIG_VNC_THREAD conditionals

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:27:00 -05:00
Andreas Färber
a307beb6e8 configure: Assure existence of linux-headers/ build directory
Commit ec5b06d (configure: ensure directory exists when creating symlinks)
moved the creation of directories into the symlink() function but forgot
the case where no symlink is created.

This leads to build errors on arm Linux due to -I../linux-headers.

Unbreak the build on arm Linux by reverting part of that commit.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:26:59 -05:00
Peter Maydell
b54fa7ddde Makefile.target: Update clean command to clean hw/ directory
Now we create object files in a hierarchy under hw/, so the
'clean' target must also be updated to delete those object files.
Rather than using a manual list of subdirectories which will
easily drift out of date, we just delete all .o and .d files
in the target directory hierarchy.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:26:59 -05:00
Anthony Liguori
039380a8e1 qtest: fix infinite loop when QEMU aborts abruptly
From Markus:

Makes "make check" hang:

    QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 gtester -k --verbose -m=quick tests/crash-test tests/rtc-test
    TEST: tests/crash-test... (pid=972)
    qemu-system-x86_64: Device needs media, but drive is empty
[Nothing happens, wait a while, then hit ^C]
    make: *** [check-qtest-x86_64] Interrupt

This was due to the fact that we weren't checked for errors when
reading from the QMP socket.  This patch adds appropriate error
checking.

Reported-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:26:59 -05:00
Anthony Liguori
7de3abe505 qdev: fix use-after-free in the error path of qdev_init_nofail
From Markus:

Before:

    $ qemu-system-x86_64 -display none -drive if=ide
    qemu-system-x86_64: Device needs media, but drive is empty
    qemu-system-x86_64: Initialization of device ide-hd failed
    [Exit 1 ]

After:

    $ qemu-system-x86_64 -display none -drive if=ide
    qemu-system-x86_64: Device needs media, but drive is empty
    Segmentation fault (core dumped)
    [Exit 139 (SIGSEGV)]

This error always existed as qdev_init() frees the object.  But QOM
goes a bit further and purposefully sets the class pointer to NULL to
help find use-after-free.  It worked :-)

Cc: Andreas Faerber <afaerber@suse.de>
Reported-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-27 16:26:59 -05:00
Peter A. G. Crosthwaite
d24b569a41 MAINTAINERS: Added device tree
Agreed between myself and Alex:
http://lists.nongnu.org/archive/html/qemu-devel/2012-06/msg03561.html

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-27 11:57:17 +02:00
Peter A. G. Crosthwaite
ab61d2405f MAINTAINERS: Added Xilinx EDK devices
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-27 11:57:17 +02:00
Peter A. G. Crosthwaite
d36e8ce73f MAINTAINERS: Add Petalogix ml605 machine model
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-27 11:57:17 +02:00
Anthony Liguori
e0a3dc7cde Merge remote-tracking branch 'stefanha/trivial-patches' into staging
* stefanha/trivial-patches:
  tci: Support INDEX_op_bswap64_i64
  target-i386: Use QEMU instead of Qemu
  Makefile.hw: avoid overly large 'make clean' rm command
  configure: Fix typo
  arm_gic: Send dbg msgs to stderr not stdout
  checkpatch: Add QEMU specific rule
  qemu-config: Use QEMU instead of Qemu
  libqtest: Fix socket_accept() to pass address_len
  Makefile.user: Define CONFIG_USER_ONLY for libuser/
  Makefile: Remove macro qapi-dir
  Makefile: Remove BUILD_DIR from qapi-dir
  Install 'bepo' keymap already included in Qemu source
2012-06-26 15:09:47 -05:00
Anthony Liguori
3aa42d329b Merge remote-tracking branch 'spice/spice.v58' into staging
* spice/spice.v58:
  vga: raise default vgamem size
  add pc-1.2
  qxl: add vgamem_size_mb and vgamem_size
  vga: make vram size configurable
  vga: raise xres+yres limits
  qxl: reset current_async on qxl_soft_reset
  hw/qxl: ignore guest from guestbug until reset
  qxl: stop dirty loging when not in vga mode
  hw/qxl: s/qxl_guest_bug/qxl_set_guest_bug/
  ui/spice-display.c: add missing initialization for valgrind
2012-06-26 15:07:03 -05:00
Anthony Liguori
675658d97e Merge remote-tracking branch 'mdroth/qga-pull-6-21-12' into staging
* mdroth/qga-pull-6-21-12:
  qemu-ga: add guest-fstrim command
  qemu-ga: make names more generic for mount list functions
2012-06-26 15:06:09 -05:00
Anthony Liguori
3978f4612e Merge remote-tracking branch 'sstabellini/compile-xs' into staging
* sstabellini/compile-xs:
  xenstore: Use <xenstore.h>
  xen: Reorganize includes of Xen headers.
2012-06-26 15:05:45 -05:00
Anthony Liguori
7a542b67b3 Merge remote-tracking branch 'sstabellini/xen-pt' into staging
* sstabellini/xen-pt:
  Introduce Xen PCI Passthrough, MSI
  Introduce apic-msidef.h
  Introduce Xen PCI Passthrough, PCI config space helpers
  Introduce Xen PCI Passthrough, qdevice
  qdev-properties: Introduce pci-host-devaddr.
  pci.c: Add opaque argument to pci_for_each_device.
  Introduce XenHostPCIDevice to access a pci device on the host.
  configure: Introduce --enable-xen-pci-passthrough.
  pci_ids: Add INTEL_82599_SFP_VF id.
2012-06-26 15:05:33 -05:00
Anthony Liguori
b1a6609e75 Merge remote-tracking branch 'kraxel/usb.54' into staging
* kraxel/usb.54:
  uhci: fix uhci_async_cancel_all
  usb-host: live migration support
  usb-host: attach only to running guest
  ehci: tracing improvements
  usb: restore USBDevice->attached on vmload
  ehci: add live migration support
2012-06-26 15:01:47 -05:00
Stefan Weil
cfee021849 target-ppc: Fix 2nd parameter for tcg_gen_shri_tl
This fixes a compiler error when QEMU was configured with --enable-debug.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 22:52:11 +02:00
Stefan Weil
975e546358 target-ppc: Fix build with --enable-debug
The order of the arguments was wrong (copy+paste error).

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 22:52:11 +02:00
Scott Wood
3c01ae0ea2 tci: don't write zero for reloc in tci_out_label
If tci_out_label is called in the context of tcg_gen_code_search_pc, we
could be overwriting an already patched relocation with zero -- and not
repatch it because the set_label is past search_pc, causing a QEMU crash
when it tries to branch to a zero label.

Not writing anything to the relocation area seems to be in line with what
other backends do from the couple I looked at (x86, ppc).

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-24 12:19:24 +00:00
Stefan Weil
a483bdae10 make: Fix dependencies for fpu/*.c and tcg/*.c
Commit dcff25f2cd removed too many *.d
files. The directories fpu/ and tcg/ still don't use the recursive
subdir rules.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-24 12:17:52 +00:00
Stefan Weil
726f8cbf86 qemu-log: Add GCC format attribute
The new inline function qemu_log_vprintf should use this attribute.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-24 12:16:51 +00:00
Blue Swirl
4e469a438f Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (72 commits)
  PPC: BookE206: Bump MAS2 to 64bit
  PPC: BookE: Support 32 and 64 bit wide MAS2
  PPC: Extract SPR dump generation into its own function
  PPC: Add e5500 CPU target
  PPC: BookE: Make ivpr selectable by CPU type
  PPC: BookE: Implement EPR SPR
  PPC: Add support for MSR_CM
  PPC: Add some booke SPR defines
  uImage: increase the gzip load size
  PPC: e500: allow users to set the /compatible property via -machine
  dt: make setprop argument static
  PPC: e500: Refactor serial dt generation
  dt: Add global option to set phandle start offset
  PPC: e500: Extend address/size of / to 64bit
  PPC: e500: Define addresses as always 64bit
  PPC: e500: Use new SOC dt format
  PPC: e500: Use new MPIC dt format
  Revert "dt: temporarily disable subtree creation failure check"
  PPC: e500: enable manual loading of dtb blob
  PPC: e500: dt: use target_phys_addr_t for ramsize
  ...
2012-06-24 10:48:56 +00:00
Blue Swirl
959a255dfb Merge branch 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: (33 commits)
  target-arm: Remove ARM_CPUID_* macros
  target-arm: Remove remaining old cp15 infrastructure
  target-arm: Move block cache ops to new cp15 framework
  target-arm: Remove c0_cachetype CPUARMState field
  target-arm: Convert final ID registers
  target-arm: Convert MPIDR
  target-arm: Convert cp15 cache ID registers
  target-arm: Convert cp15 crn=0 crm={1,2} feature registers
  target-arm: Convert cp15 crn=1 registers
  target-arm: Convert cp15 crn=9 registers
  target-arm: Convert cp15 crn=6 registers
  target-arm: convert cp15 crn=7 registers
  target-arm: Convert cp15 VA-PA translation registers
  target-arm: Convert cp15 MMU TLB control
  target-arm: Convert cp15 crn=15 registers
  target-arm: Convert cp15 crn=10 registers
  target-arm: Convert cp15 crn=13 registers
  target-arm: Convert cp15 crn=2 registers
  target-arm: Convert MMU fault status cp15 registers
  target-arm: Convert cp15 c3 register
  ...
2012-06-24 10:48:01 +00:00
Blue Swirl
8dacfcb407 Merge branch 's390-for-upstream' of git://repo.or.cz/qemu/agraf
* 's390-for-upstream' of git://repo.or.cz/qemu/agraf:
  s390: stop target cpu on sigp initial reset
  s390: make kvm_stat work on s390
  kvm: Update kernel headers
  s390x: fix s390 virtio aliases
2012-06-24 10:45:55 +00:00
Blue Swirl
99918cec19 Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  arm_boot: Conditionalised DTB command line update
  cadence_ttc: changed master clock frequency
  cadence_gem: avoid stack-writing buffer-overrun
  hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit
  hw/omap.h: Drop broken MEM_VERBOSE tracing
  hw/armv7m_nvic: Make the NVIC a freestanding class
  hw/arm_gic: Move CPU interface memory region setup into arm_gic_init
  hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting
  hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor
  hw/arm_gic: Add qdev property for GIC revision
  hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers
  hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset
  hw/arm_gic: Remove the special casing of NCPU for the NVIC
  hw/arm_gic: Remove NVIC ifdefs from gic_state struct
  arm_boot: Fix typos in comment
  ARM: Exynos4210 IRQ: Introduce new IRQ gate functionality.
2012-06-24 07:09:30 +00:00
Alexander Graf
960916988b PPC: BookE206: Bump MAS2 to 64bit
On 64bit capable systems, MAS2 can actually hold a 64bit virtual page
address. So increase the mask for its EPN.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:52 +02:00
Alexander Graf
ba38ab8d42 PPC: BookE: Support 32 and 64 bit wide MAS2
The MAS registers on BookE are all 32 bit wide, except for MAS2, which
can hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPR
setting code, so that the guest can never write invalid values in them.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:52 +02:00
Alexander Graf
91f477fd9c PPC: Extract SPR dump generation into its own function
This patch moves the debug #ifdef'ed SPR trace generation into its
own function, so we can call it from multiple places.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:52 +02:00