malc
0d5bd3631f
Remove stray variable
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4725 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-10 01:47:17 +00:00
malc
77b73de676
Use rem/div[u]_i32 drop div[u]2_i32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4722 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 23:44:44 +00:00
malc
fa4fbfb98a
Emit trampolines manually in prologue
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4715 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 19:57:36 +00:00
malc
5d794885a2
Fix test for signed div fast path
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4714 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 19:57:27 +00:00
malc
398ce98e4f
Fix div[u]2.
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Previous code assummed 32 by 32 bit divmod operation, and survived
x86_64 test only by sheer luck. MIPS wasn't so forgiving.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4705 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 06:06:25 +00:00
malc
0a878c4760
PPC TCG Fixes
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* Fix typo in aliased div2
* "Optimize" aliased div2/divu2
* Fix two remaining branch retranslation problems
(Kudos to Andrzej Zaborowski)
* Rework goto_tb and set_jmp_target1
* Use correct size when flushing icache
* Use correct register selection for ORI
(Was harmless since in both cases srcreg was equal to dstreg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4691 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 20:31:33 +00:00
ths
c588979bfc
Allocate a register pair instead of a single register.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4688 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 04:31:49 +00:00
ths
1235fc066a
Spelling fixes, by Stefan Weil.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-03 19:51:57 +00:00
bellard
932a690969
support of long calls for PPC (malc)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4629 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 20:56:52 +00:00
bellard
f3f478a7ef
Fix signed/unsigned issues of immediate version of brcond (malc)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4588 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 19:11:07 +00:00
bellard
2662e13f68
ppc TCG target (malc)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4584 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:59:57 +00:00
bellard
560f92cc34
jump simplification
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4583 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:49:06 +00:00
bellard
affa3264db
jump optimizations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:41:58 +00:00
bellard
0a6b7b7813
update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4581 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:24:40 +00:00
bellard
b314f2706b
suppressed unused macro handling
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4580 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:21:31 +00:00
bellard
641d5fbe6b
added local temporaries
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4576 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 17:24:00 +00:00
blueswir1
8384dd67fe
Implement byte swapping accesses
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4574 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 11:19:24 +00:00
pbrook
9b7b85d260
Fix off-by-one unwinding error.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 00:36:06 +00:00
balrog
d0660ed482
Relax a constraint for qemu_ld64 on ARM host.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4567 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 23:12:19 +00:00
balrog
eae6ce5238
Fix a deadly typo, correct comments.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4566 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 22:56:51 +00:00
pbrook
3979144c49
Fix ARM host TLB.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4564 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 20:07:07 +00:00
blueswir1
b101234a8e
Implement 64-bit constant loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4561 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 18:09:50 +00:00
blueswir1
26cc915cff
Use sethi and arith functions, fix comment
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4560 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 18:06:35 +00:00
blueswir1
77fcd0934a
Fix stack offsets and alignment
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4559 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 16:41:17 +00:00
blueswir1
64e3257c03
Define stack offsets
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4554 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 05:36:16 +00:00
pbrook
bcb0126ff4
More TCGv type fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:24:25 +00:00
pbrook
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
balrog
91a3c1b00d
Comment non-obvious calculation. Don't clobber r3 in qemu_st64.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4548 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 18:51:15 +00:00
balrog
e936243aca
A branch insn must not overwrite the branch target before relocation.
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When a branch to label is translated it generates a reloc that is filled in
when the label is translated. However, when handling an exception and
searching for the pc we abort the translation early and we sometimes
translate the branch but not the corresponding label and so no relocation
is done. When the block is executed again the branch points to no-where.
It seems tcg/sparc/ is going to suffer from the same issue.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4547 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 18:50:44 +00:00
bellard
e8996ee012
added tcg_temp_free() and improved the handling of constants
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4544 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 17:33:39 +00:00
balrog
225b437649
Fix qemu_ld/st for mem_index > 0 on arm host.
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offsetof(CPUState, tlb_table[mem_index][0].addr_read) with mem_index > 0
was larger than max immediate offset for ldr and str (12-bit) so insert an
additional insn to add the mem_index offset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4542 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 12:55:11 +00:00
balrog
bedba0cd07
Define TCG_TARGET_CALL_STACK_OFFSET on arm.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4541 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 12:47:22 +00:00
bellard
24bf7b3a1d
compilation fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4540 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 11:58:32 +00:00
bellard
a23a9ec615
profiler clean up
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4537 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 09:52:20 +00:00
bellard
7e4597d7ae
added debug_insn_start debug instruction
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4531 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 16:56:05 +00:00
bellard
4dc81f2822
debug output: write helper names
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4529 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 16:08:32 +00:00
bellard
39cf05d322
more generic call codegen
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4528 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 14:59:57 +00:00
bellard
cf60bce405
fixed zero shifts (64 bit case)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4527 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 14:39:25 +00:00
bellard
34151a20ea
small shift opts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4525 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 13:25:14 +00:00
bellard
e5097dc8e3
fixed dead global variable update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4512 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:24:20 +00:00
balrog
204c1674ef
Fix 8-bit signed load/store and a typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4504 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 11:28:35 +00:00
balrog
650bbb361e
Implement neg_i32, clean-up.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4503 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 11:26:40 +00:00
balrog
a2a64a1f2d
Remove dyngen ARM code, which did't build.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4501 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 00:01:55 +00:00
balrog
811d4cf4b0
ARM host support for TCG targets.
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Updated from previous version to use the tcg prologue/epilogue mechanism, may be slower than direct call.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4500 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 23:59:38 +00:00
blueswir1
c44f945a92
Better solution for the alignment problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4498 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 16:32:18 +00:00
ths
48d38ca52b
Switch most MIPS logical and arithmetic instructions to TCG.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 22:50:49 +00:00
blueswir1
57e49b4074
Fix constant checks on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4486 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 08:11:14 +00:00
blueswir1
d4929d58a1
Fix TCG alignment problems on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4485 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 07:49:05 +00:00
bellard
c6e113f568
added 'pure' function attribute - fixed indirect function calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4469 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:42:15 +00:00
bellard
0b6ce4cffe
added not pseudo op - more _tl macros
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4468 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:40:44 +00:00