Implement byte swapping accesses
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4574 c046a42c-6fe2-441c-8c8c-71466251a162
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blueswir1
parent
a8c768c069
commit
8384dd67fe
38
cpu-all.h
38
cpu-all.h
@ -233,6 +233,15 @@ static inline int lduw_le_p(void *ptr)
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int val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return val;
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#elif defined(__sparc__)
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#ifndef ASI_PRIMARY_LITTLE
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#define ASI_PRIMARY_LITTLE 0x88
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#endif
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int val;
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__asm__ __volatile__ ("lduha [%1] %2, %0" : "=r" (val) : "r" (ptr),
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"i" (ASI_PRIMARY_LITTLE));
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return val;
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#else
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uint8_t *p = ptr;
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return p[0] | (p[1] << 8);
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@ -245,6 +254,11 @@ static inline int ldsw_le_p(void *ptr)
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int val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return (int16_t)val;
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#elif defined(__sparc__)
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int val;
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__asm__ __volatile__ ("ldsha [%1] %2, %0" : "=r" (val) : "r" (ptr),
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"i" (ASI_PRIMARY_LITTLE));
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return val;
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#else
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uint8_t *p = ptr;
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return (int16_t)(p[0] | (p[1] << 8));
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@ -257,6 +271,11 @@ static inline int ldl_le_p(void *ptr)
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int val;
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__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return val;
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#elif defined(__sparc__)
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int val;
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__asm__ __volatile__ ("lduwa [%1] %2, %0" : "=r" (val) : "r" (ptr),
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"i" (ASI_PRIMARY_LITTLE));
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return val;
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#else
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uint8_t *p = ptr;
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return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
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@ -265,17 +284,27 @@ static inline int ldl_le_p(void *ptr)
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static inline uint64_t ldq_le_p(void *ptr)
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{
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#if defined(__sparc__)
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uint64_t val;
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__asm__ __volatile__ ("ldxa [%1] %2, %0" : "=r" (val) : "r" (ptr),
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"i" (ASI_PRIMARY_LITTLE));
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return val;
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#else
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uint8_t *p = ptr;
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uint32_t v1, v2;
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v1 = ldl_le_p(p);
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v2 = ldl_le_p(p + 4);
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return v1 | ((uint64_t)v2 << 32);
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#endif
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}
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static inline void stw_le_p(void *ptr, int v)
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{
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#ifdef __powerpc__
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__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
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#elif defined(__sparc__)
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__asm__ __volatile__ ("stha %1, [%2] %3" : "=m" (*(uint16_t *)ptr) : "r" (v),
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"r" (ptr), "i" (ASI_PRIMARY_LITTLE));
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#else
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uint8_t *p = ptr;
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p[0] = v;
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@ -287,6 +316,9 @@ static inline void stl_le_p(void *ptr, int v)
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{
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#ifdef __powerpc__
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__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
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#elif defined(__sparc__)
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__asm__ __volatile__ ("stwa %1, [%2] %3" : "=m" (*(uint32_t *)ptr) : "r" (v),
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"r" (ptr), "i" (ASI_PRIMARY_LITTLE));
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#else
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uint8_t *p = ptr;
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p[0] = v;
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@ -298,9 +330,15 @@ static inline void stl_le_p(void *ptr, int v)
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static inline void stq_le_p(void *ptr, uint64_t v)
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{
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#if defined(__sparc__)
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__asm__ __volatile__ ("stxa %1, [%2] %3" : "=m" (*(uint64_t *)ptr) : "r" (v),
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"r" (ptr), "i" (ASI_PRIMARY_LITTLE));
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#undef ASI_PRIMARY_LITTLE
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#else
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uint8_t *p = ptr;
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stl_le_p(p, (uint32_t)v);
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stl_le_p(p + 4, v >> 32);
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#endif
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}
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/* float access */
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@ -178,6 +178,7 @@ static inline int tcg_target_const_match(tcg_target_long val,
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#define INSN_RD(x) ((x) << 25)
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#define INSN_RS1(x) ((x) << 14)
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#define INSN_RS2(x) (x)
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#define INSN_ASI(x) ((x) << 5)
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#define INSN_IMM13(x) ((1 << 13) | ((x) & 0x1fff))
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#define INSN_OFF22(x) (((x) >> 2) & 0x3fffff)
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@ -242,6 +243,21 @@ static inline int tcg_target_const_match(tcg_target_long val,
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#define STH (INSN_OP(3) | INSN_OP3(0x06))
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#define STW (INSN_OP(3) | INSN_OP3(0x04))
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#define STX (INSN_OP(3) | INSN_OP3(0x0e))
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#define LDUBA (INSN_OP(3) | INSN_OP3(0x11))
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#define LDSBA (INSN_OP(3) | INSN_OP3(0x19))
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#define LDUHA (INSN_OP(3) | INSN_OP3(0x12))
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#define LDSHA (INSN_OP(3) | INSN_OP3(0x1a))
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#define LDUWA (INSN_OP(3) | INSN_OP3(0x10))
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#define LDSWA (INSN_OP(3) | INSN_OP3(0x18))
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#define LDXA (INSN_OP(3) | INSN_OP3(0x1b))
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#define STBA (INSN_OP(3) | INSN_OP3(0x15))
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#define STHA (INSN_OP(3) | INSN_OP3(0x16))
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#define STWA (INSN_OP(3) | INSN_OP3(0x14))
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#define STXA (INSN_OP(3) | INSN_OP3(0x1e))
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#ifndef ASI_PRIMARY_LITTLE
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#define ASI_PRIMARY_LITTLE 0x88
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#endif
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static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2,
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int op)
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@ -332,6 +348,14 @@ static inline void tcg_out_ldst(TCGContext *s, int ret, int addr, int offset, in
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}
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}
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static inline void tcg_out_ldst_asi(TCGContext *s, int ret, int addr,
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int offset, int op, int asi)
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{
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, offset);
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tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I5) |
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INSN_ASI(asi) | INSN_RS2(addr));
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}
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static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
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int arg1, tcg_target_long arg2)
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{
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@ -457,7 +481,7 @@ static const void * const qemu_st_helpers[4] = {
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static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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int opc)
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{
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int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, ld_op;
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int addr_reg, data_reg, r0, r1, mem_index, s_bits, ld_op;
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#if defined(CONFIG_SOFTMMU)
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uint8_t *label1_ptr, *label2_ptr;
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#endif
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@ -565,11 +589,6 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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r0 = addr_reg;
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#endif
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#ifdef TARGET_WORDS_BIGENDIAN
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bswap = 0;
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#else
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bswap = 1;
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#endif
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switch(opc) {
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case 0:
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/* ldub [r0], data_reg */
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@ -580,39 +599,49 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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tcg_out_ldst(s, data_reg, r0, 0, LDSB);
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break;
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case 1:
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#ifdef TARGET_WORDS_BIGENDIAN
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/* lduh [r0], data_reg */
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tcg_out_ldst(s, data_reg, r0, 0, LDUH);
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#else
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/* lduha [r0] ASI_PRIMARY_LITTLE, data_reg */
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tcg_out_ldst_asi(s, data_reg, r0, 0, LDUHA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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case 1 | 4:
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#ifdef TARGET_WORDS_BIGENDIAN
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/* ldsh [r0], data_reg */
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tcg_out_ldst(s, data_reg, r0, 0, LDSH);
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#else
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/* ldsha [r0] ASI_PRIMARY_LITTLE, data_reg */
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tcg_out_ldst_asi(s, data_reg, r0, 0, LDSHA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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case 2:
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#ifdef TARGET_WORDS_BIGENDIAN
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/* lduw [r0], data_reg */
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tcg_out_ldst(s, data_reg, r0, 0, LDUW);
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#else
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/* lduwa [r0] ASI_PRIMARY_LITTLE, data_reg */
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tcg_out_ldst_asi(s, data_reg, r0, 0, LDUWA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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case 2 | 4:
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#ifdef TARGET_WORDS_BIGENDIAN
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/* ldsw [r0], data_reg */
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tcg_out_ldst(s, data_reg, r0, 0, LDSW);
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#else
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/* ldswa [r0] ASI_PRIMARY_LITTLE, data_reg */
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tcg_out_ldst_asi(s, data_reg, r0, 0, LDSWA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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case 3:
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#ifdef TARGET_WORDS_BIGENDIAN
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/* ldx [r0], data_reg */
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tcg_out_ldst(s, data_reg, r0, 0, LDX);
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#else
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/* ldxa [r0] ASI_PRIMARY_LITTLE, data_reg */
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tcg_out_ldst_asi(s, data_reg, r0, 0, LDXA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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default:
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tcg_abort();
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@ -629,7 +658,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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int opc)
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{
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int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, ld_op;
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int addr_reg, data_reg, r0, r1, mem_index, s_bits, ld_op;
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#if defined(CONFIG_SOFTMMU)
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uint8_t *label1_ptr, *label2_ptr;
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#endif
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@ -737,36 +766,37 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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r0 = addr_reg;
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#endif
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#ifdef TARGET_WORDS_BIGENDIAN
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bswap = 0;
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#else
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bswap = 1;
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#endif
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switch(opc) {
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case 0:
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/* stb data_reg, [r0] */
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tcg_out_ldst(s, data_reg, r0, 0, STB);
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break;
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case 1:
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#ifdef TARGET_WORDS_BIGENDIAN
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/* sth data_reg, [r0] */
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tcg_out_ldst(s, data_reg, r0, 0, STH);
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#else
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/* stha data_reg, [r0] ASI_PRIMARY_LITTLE */
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tcg_out_ldst_asi(s, data_reg, r0, 0, STHA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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case 2:
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#ifdef TARGET_WORDS_BIGENDIAN
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/* stw data_reg, [r0] */
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tcg_out_ldst(s, data_reg, r0, 0, STW);
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#else
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/* stwa data_reg, [r0] ASI_PRIMARY_LITTLE */
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tcg_out_ldst_asi(s, data_reg, r0, 0, STWA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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case 3:
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if (bswap) {
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fprintf(stderr, "unimplemented %s with bswap\n", __func__);
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}
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#ifdef TARGET_WORDS_BIGENDIAN
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/* stx data_reg, [r0] */
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tcg_out_ldst(s, data_reg, r0, 0, STX);
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#else
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/* stxa data_reg, [r0] ASI_PRIMARY_LITTLE */
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tcg_out_ldst_asi(s, data_reg, r0, 0, STXA, ASI_PRIMARY_LITTLE);
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#endif
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break;
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default:
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tcg_abort();
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