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target/arm: More use of gen_gvec_fn_arg_zzz

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Two uses of gen_gvec_fn_zzz can pass on arg_rrr_esz instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-33-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-05-27 11:17:45 -07:00 committed by Peter Maydell
parent cd54bbe662
commit f96aae7649
1 changed files with 2 additions and 2 deletions
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4
target/arm/translate-sve.c
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@ -6425,7 +6425,7 @@ static bool trans_MUL_zzz(DisasContext *s, arg_rrr_esz *a)
if (!dc_isar_feature(aa64_sve2, s)) {
return false;
}
return gen_gvec_fn_zzz(s, tcg_gen_gvec_mul, a->esz, a->rd, a->rn, a->rm);
return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_mul, a);
}
static gen_helper_gvec_3 * const smulh_zzz_fns[4] = {
@ -6946,7 +6946,7 @@ static bool do_sve2_fn_zzz(DisasContext *s, arg_rrr_esz *a, GVecGen3Fn *fn)
if (!dc_isar_feature(aa64_sve2, s)) {
return false;
}
return gen_gvec_fn_zzz(s, fn, a->esz, a->rd, a->rn, a->rm);
return gen_gvec_fn_arg_zzz(s, fn, a);
}
static bool trans_SABA(DisasContext *s, arg_rrr_esz *a)