target-tilegx: Handle v1cmpeq, v1cmpne
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -93,6 +93,8 @@ typedef struct {
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#define OE_IM(E,XY) OE(IMM8_OPCODE_##XY, E##_IMM8_OPCODE_##XY, XY)
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#define OE_IM(E,XY) OE(IMM8_OPCODE_##XY, E##_IMM8_OPCODE_##XY, XY)
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#define OE_SH(E,XY) OE(SHIFT_OPCODE_##XY, E##_SHIFT_OPCODE_##XY, XY)
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#define OE_SH(E,XY) OE(SHIFT_OPCODE_##XY, E##_SHIFT_OPCODE_##XY, XY)
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#define V1_IMM(X) (((X) & 0xff) * 0x0101010101010101ull)
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static void gen_exception(DisasContext *dc, TileExcp num)
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static void gen_exception(DisasContext *dc, TileExcp num)
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{
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{
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@ -245,6 +247,41 @@ static void gen_mul_half(TCGv tdest, TCGv tsrca, TCGv tsrcb,
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tcg_temp_free(t);
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tcg_temp_free(t);
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}
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}
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/* Equality comparison with zero can be done quickly and efficiently. */
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static void gen_v1cmpeq0(TCGv v)
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{
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TCGv m = tcg_const_tl(V1_IMM(0x7f));
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TCGv c = tcg_temp_new();
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/* ~(((v & m) + m) | m | v). Sets the msb for each byte == 0. */
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tcg_gen_and_tl(c, v, m);
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tcg_gen_add_tl(c, c, m);
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tcg_gen_or_tl(c, c, m);
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tcg_gen_nor_tl(c, c, v);
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tcg_temp_free(m);
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/* Shift the msb down to form the lsb boolean result. */
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tcg_gen_shri_tl(v, c, 7);
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tcg_temp_free(c);
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}
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static void gen_v1cmpne0(TCGv v)
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{
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TCGv m = tcg_const_tl(V1_IMM(0x7f));
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TCGv c = tcg_temp_new();
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/* (((v & m) + m) | v) & ~m. Sets the msb for each byte != 0. */
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tcg_gen_and_tl(c, v, m);
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tcg_gen_add_tl(c, c, m);
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tcg_gen_or_tl(c, c, v);
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tcg_gen_andc_tl(c, c, m);
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tcg_temp_free(m);
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/* Shift the msb down to form the lsb boolean result. */
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tcg_gen_shri_tl(v, c, 7);
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tcg_temp_free(c);
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}
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static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca,
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static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca,
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unsigned srcb, TCGMemOp memop, const char *name)
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unsigned srcb, TCGMemOp memop, const char *name)
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{
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{
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@ -915,8 +952,13 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
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case OE_RRR(V1ADD, 0, X1):
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case OE_RRR(V1ADD, 0, X1):
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case OE_RRR(V1ADIFFU, 0, X0):
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case OE_RRR(V1ADIFFU, 0, X0):
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case OE_RRR(V1AVGU, 0, X0):
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case OE_RRR(V1AVGU, 0, X0):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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case OE_RRR(V1CMPEQ, 0, X0):
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case OE_RRR(V1CMPEQ, 0, X0):
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case OE_RRR(V1CMPEQ, 0, X1):
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case OE_RRR(V1CMPEQ, 0, X1):
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tcg_gen_xor_tl(tdest, tsrca, tsrcb);
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gen_v1cmpeq0(tdest);
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mnemonic = "v1cmpeq";
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break;
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case OE_RRR(V1CMPLES, 0, X0):
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case OE_RRR(V1CMPLES, 0, X0):
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case OE_RRR(V1CMPLES, 0, X1):
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case OE_RRR(V1CMPLES, 0, X1):
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case OE_RRR(V1CMPLEU, 0, X0):
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case OE_RRR(V1CMPLEU, 0, X0):
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@ -925,8 +967,13 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
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case OE_RRR(V1CMPLTS, 0, X1):
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case OE_RRR(V1CMPLTS, 0, X1):
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case OE_RRR(V1CMPLTU, 0, X0):
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case OE_RRR(V1CMPLTU, 0, X0):
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case OE_RRR(V1CMPLTU, 0, X1):
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case OE_RRR(V1CMPLTU, 0, X1):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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case OE_RRR(V1CMPNE, 0, X0):
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case OE_RRR(V1CMPNE, 0, X0):
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case OE_RRR(V1CMPNE, 0, X1):
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case OE_RRR(V1CMPNE, 0, X1):
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tcg_gen_xor_tl(tdest, tsrca, tsrcb);
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gen_v1cmpne0(tdest);
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mnemonic = "v1cmpne";
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break;
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case OE_RRR(V1DDOTPUA, 0, X0):
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case OE_RRR(V1DDOTPUA, 0, X0):
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case OE_RRR(V1DDOTPUSA, 0, X0):
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case OE_RRR(V1DDOTPUSA, 0, X0):
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case OE_RRR(V1DDOTPUS, 0, X0):
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case OE_RRR(V1DDOTPUS, 0, X0):
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@ -1187,6 +1234,10 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext,
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case OE_IM(V1ADDI, X1):
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case OE_IM(V1ADDI, X1):
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case OE_IM(V1CMPEQI, X0):
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case OE_IM(V1CMPEQI, X0):
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case OE_IM(V1CMPEQI, X1):
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case OE_IM(V1CMPEQI, X1):
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tcg_gen_xori_tl(tdest, tsrca, V1_IMM(imm));
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gen_v1cmpeq0(tdest);
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mnemonic = "v1cmpeqi";
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break;
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case OE_IM(V1CMPLTSI, X0):
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case OE_IM(V1CMPLTSI, X0):
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case OE_IM(V1CMPLTSI, X1):
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case OE_IM(V1CMPLTSI, X1):
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case OE_IM(V1CMPLTUI, X0):
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case OE_IM(V1CMPLTUI, X0):
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