target-tilegx: Handle mask instructions
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -643,11 +643,15 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
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case OE_RRR(FSINGLE_MUL2, 0, X0):
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case OE_RRR(FSINGLE_PACK2, 0, X0):
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case OE_RRR(FSINGLE_SUB1, 0, X0):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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case OE_RRR(MNZ, 0, X0):
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case OE_RRR(MNZ, 0, X1):
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case OE_RRR(MNZ, 4, Y0):
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case OE_RRR(MNZ, 4, Y1):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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t0 = load_zero(dc);
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tcg_gen_movcond_tl(TCG_COND_NE, tdest, tsrca, t0, tsrcb, t0);
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mnemonic = "mnz";
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break;
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case OE_RRR(MULAX, 0, X0):
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case OE_RRR(MULAX, 3, Y0):
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tcg_gen_mul_tl(tdest, tsrca, tsrcb);
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@ -763,7 +767,10 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
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case OE_RRR(MZ, 0, X1):
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case OE_RRR(MZ, 4, Y0):
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case OE_RRR(MZ, 4, Y1):
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return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
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t0 = load_zero(dc);
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tcg_gen_movcond_tl(TCG_COND_EQ, tdest, tsrca, t0, tsrcb, t0);
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mnemonic = "mz";
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break;
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case OE_RRR(NOR, 0, X0):
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case OE_RRR(NOR, 0, X1):
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case OE_RRR(NOR, 5, Y0):
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