hvf: arm: Properly disable PMU
Setting pmu property used to have no effect for hvf so fix it. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1204,11 +1204,8 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
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ARMCPU *arm_cpu = ARM_CPU(cpu);
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CPUARMState *env = &arm_cpu->env;
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if (arm_feature(env, ARM_FEATURE_PMU)) {
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switch (reg) {
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case SYSREG_CNTPCT_EL0:
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*val = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
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gt_cntfrq_period_ns(arm_cpu);
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return 0;
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case SYSREG_PMCR_EL0:
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*val = env->cp15.c9_pmcr;
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return 0;
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@ -1243,6 +1240,14 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
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/* We can't really count anything yet, declare all events invalid */
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*val = 0;
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return 0;
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}
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}
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switch (reg) {
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case SYSREG_CNTPCT_EL0:
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*val = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
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gt_cntfrq_period_ns(arm_cpu);
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return 0;
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case SYSREG_OSLSR_EL1:
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*val = env->cp15.oslsr_el1;
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return 0;
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@ -1486,6 +1491,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
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SYSREG_OP2(reg),
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val);
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if (arm_feature(env, ARM_FEATURE_PMU)) {
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switch (reg) {
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case SYSREG_PMCCNTR_EL0:
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pmu_op_start(env);
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@ -1544,6 +1550,10 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
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env->cp15.pmccfiltr_el0 = val & PMCCFILTR_EL0;
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pmu_op_finish(env);
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return 0;
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}
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}
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switch (reg) {
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case SYSREG_OSLAR_EL1:
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env->cp15.oslsr_el1 = val & 1;
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return 0;
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