target-arm: fix support for VRSQRTE.
Now use the same algorithm as described in the ARM ARM. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -2755,11 +2755,104 @@ float32 HELPER(recpe_f32)(float32 a, CPUState *env)
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return make_float32(val32);
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}
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/* The algorithm that must be used to calculate the estimate
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* is specified by the ARM ARM.
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*/
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static float64 recip_sqrt_estimate(float64 a, CPUState *env)
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{
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float_status *s = &env->vfp.standard_fp_status;
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float64 q;
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int64_t q_int;
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if (float64_lt(a, float64_half, s)) {
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/* range 0.25 <= a < 0.5 */
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/* a in units of 1/512 rounded down */
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/* q0 = (int)(a * 512.0); */
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q = float64_mul(float64_512, a, s);
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q_int = float64_to_int64_round_to_zero(q, s);
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/* reciprocal root r */
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/* r = 1.0 / sqrt(((double)q0 + 0.5) / 512.0); */
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q = int64_to_float64(q_int, s);
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q = float64_add(q, float64_half, s);
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q = float64_div(q, float64_512, s);
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q = float64_sqrt(q, s);
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q = float64_div(float64_one, q, s);
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} else {
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/* range 0.5 <= a < 1.0 */
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/* a in units of 1/256 rounded down */
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/* q1 = (int)(a * 256.0); */
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q = float64_mul(float64_256, a, s);
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int64_t q_int = float64_to_int64_round_to_zero(q, s);
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/* reciprocal root r */
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/* r = 1.0 /sqrt(((double)q1 + 0.5) / 256); */
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q = int64_to_float64(q_int, s);
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q = float64_add(q, float64_half, s);
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q = float64_div(q, float64_256, s);
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q = float64_sqrt(q, s);
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q = float64_div(float64_one, q, s);
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}
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/* r in units of 1/256 rounded to nearest */
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/* s = (int)(256.0 * r + 0.5); */
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q = float64_mul(q, float64_256,s );
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q = float64_add(q, float64_half, s);
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q_int = float64_to_int64_round_to_zero(q, s);
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/* return (double)s / 256.0;*/
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return float64_div(int64_to_float64(q_int, s), float64_256, s);
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}
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float32 HELPER(rsqrte_f32)(float32 a, CPUState *env)
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{
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float_status *s = &env->vfp.fp_status;
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float32 one = int32_to_float32(1, s);
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return float32_div(one, float32_sqrt(a, s), s);
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float_status *s = &env->vfp.standard_fp_status;
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int result_exp;
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float64 f64;
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uint32_t val;
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uint64_t val64;
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val = float32_val(a);
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if (float32_is_any_nan(a)) {
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if (float32_is_signaling_nan(a)) {
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float_raise(float_flag_invalid, s);
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}
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return float32_default_nan;
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} else if (float32_is_zero_or_denormal(a)) {
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float_raise(float_flag_divbyzero, s);
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return float32_set_sign(float32_infinity, float32_is_neg(a));
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} else if (float32_is_neg(a)) {
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float_raise(float_flag_invalid, s);
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return float32_default_nan;
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} else if (float32_is_infinity(a)) {
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return float32_zero;
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}
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/* Normalize to a double-precision value between 0.25 and 1.0,
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* preserving the parity of the exponent. */
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if ((val & 0x800000) == 0) {
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f64 = make_float64(((uint64_t)(val & 0x80000000) << 32)
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| (0x3feULL << 52)
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| ((uint64_t)(val & 0x7fffff) << 29));
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} else {
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f64 = make_float64(((uint64_t)(val & 0x80000000) << 32)
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| (0x3fdULL << 52)
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| ((uint64_t)(val & 0x7fffff) << 29));
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}
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result_exp = (380 - ((val & 0x7f800000) >> 23)) / 2;
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f64 = recip_sqrt_estimate(f64, env);
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val64 = float64_val(f64);
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val = ((val64 >> 63) & 0x80000000)
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| ((result_exp & 0xff) << 23)
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| ((val64 >> 29) & 0x7fffff);
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return make_float32(val);
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}
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uint32_t HELPER(recpe_u32)(uint32_t a, CPUState *env)
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@ -2780,13 +2873,23 @@ uint32_t HELPER(recpe_u32)(uint32_t a, CPUState *env)
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uint32_t HELPER(rsqrte_u32)(uint32_t a, CPUState *env)
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{
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float_status *s = &env->vfp.fp_status;
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float32 tmp;
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tmp = int32_to_float32(a, s);
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tmp = float32_scalbn(tmp, -32, s);
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tmp = helper_rsqrte_f32(tmp, env);
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tmp = float32_scalbn(tmp, 31, s);
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return float32_to_int32(tmp, s);
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float64 f64;
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if ((a & 0xc0000000) == 0) {
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return 0xffffffff;
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}
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if (a & 0x80000000) {
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f64 = make_float64((0x3feULL << 52)
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| ((uint64_t)(a & 0x7fffffff) << 21));
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} else { /* bits 31-30 == '01' */
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f64 = make_float64((0x3fdULL << 52)
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| ((uint64_t)(a & 0x3fffffff) << 22));
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}
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f64 = recip_sqrt_estimate(f64, env);
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return 0x80000000 | ((float64_val(f64) >> 21) & 0x7fffffff);
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}
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void HELPER(set_teecr)(CPUState *env, uint32_t val)
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