hw/riscv: microchip_pfsoc: Map EMMC/SD mux register
Since HSS commit c20a89f8dcac, the Icicle Kit reference design has been updated to use a register mapped at 0x4f000000 instead of a GPIO to control whether eMMC or SD card is to be used. With this support the same HSS image can be used for both eMMC and SD card boot flow, while previously two different board configurations were used. This is undocumented but one can take a look at the HSS code HSS_MMCInit() in services/mmc/mmc_api.c. With this commit, HSS image built from 2020.12 release boots again. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210322075248.136255-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -122,6 +122,7 @@ static const MemMapEntry microchip_pfsoc_memmap[] = {
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[MICROCHIP_PFSOC_ENVM_DATA] = { 0x20220000, 0x20000 },
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[MICROCHIP_PFSOC_QSPI_XIP] = { 0x21000000, 0x1000000 },
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[MICROCHIP_PFSOC_IOSCB] = { 0x30000000, 0x10000000 },
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[MICROCHIP_PFSOC_EMMC_SD_MUX] = { 0x4f000000, 0x4 },
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[MICROCHIP_PFSOC_DRAM_LO] = { 0x80000000, 0x40000000 },
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[MICROCHIP_PFSOC_DRAM_LO_ALIAS] = { 0xc0000000, 0x40000000 },
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[MICROCHIP_PFSOC_DRAM_HI] = { 0x1000000000, 0x0 },
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@ -411,6 +412,11 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->ioscb), 0,
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memmap[MICROCHIP_PFSOC_IOSCB].base);
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/* eMMC/SD mux */
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create_unimplemented_device("microchip.pfsoc.emmc_sd_mux",
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memmap[MICROCHIP_PFSOC_EMMC_SD_MUX].base,
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memmap[MICROCHIP_PFSOC_EMMC_SD_MUX].size);
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/* QSPI Flash */
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memory_region_init_rom(qspi_xip_mem, OBJECT(dev),
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"microchip.pfsoc.qspi_xip",
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@ -109,6 +109,7 @@ enum {
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MICROCHIP_PFSOC_ENVM_DATA,
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MICROCHIP_PFSOC_QSPI_XIP,
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MICROCHIP_PFSOC_IOSCB,
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MICROCHIP_PFSOC_EMMC_SD_MUX,
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MICROCHIP_PFSOC_DRAM_LO,
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MICROCHIP_PFSOC_DRAM_LO_ALIAS,
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MICROCHIP_PFSOC_DRAM_HI,
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