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tcg/s390x: Implement tcg_out_mov for vector types 

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-09-14 17:12:18 -07:00
parent 2dabf74252
commit b33ce7251c
1 changed files with 68 additions and 4 deletions
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72
tcg/s390x/tcg-target.c.inc
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@ -265,6 +265,11 @@ typedef enum S390Opcode {
RX_STC = 0x42, RX_STC = 0x42,
RX_STH = 0x40, RX_STH = 0x40,
VRRa_VLR = 0xe756,
VRSb_VLVG = 0xe722,
VRSc_VLGV = 0xe721,
VRX_VL = 0xe706, VRX_VL = 0xe706,
VRX_VLLEZ = 0xe704, VRX_VLLEZ = 0xe704,
VRX_VST = 0xe70e, VRX_VST = 0xe70e,
@ -558,6 +563,39 @@ static int RXB(TCGReg v1, TCGReg v2, TCGReg v3, TCGReg v4)
| ((v4 & 0x10) << (4 + 0)); | ((v4 & 0x10) << (4 + 0));
} }
static void tcg_out_insn_VRRa(TCGContext *s, S390Opcode op,
TCGReg v1, TCGReg v2, int m3)
{
tcg_debug_assert(is_vector_reg(v1));
tcg_debug_assert(is_vector_reg(v2));
tcg_out16(s, (op & 0xff00) | ((v1 & 0xf) << 4) | (v2 & 0xf));
tcg_out32(s, (op & 0x00ff) | RXB(v1, v2, 0, 0) | (m3 << 12));
}
static void tcg_out_insn_VRSb(TCGContext *s, S390Opcode op, TCGReg v1,
intptr_t d2, TCGReg b2, TCGReg r3, int m4)
{
tcg_debug_assert(is_vector_reg(v1));
tcg_debug_assert(d2 >= 0 && d2 <= 0xfff);
tcg_debug_assert(is_general_reg(b2));
tcg_debug_assert(is_general_reg(r3));
tcg_out16(s, (op & 0xff00) | ((v1 & 0xf) << 4) | r3);
tcg_out16(s, b2 << 12 | d2);
tcg_out16(s, (op & 0x00ff) | RXB(v1, 0, 0, 0) | (m4 << 12));
}
static void tcg_out_insn_VRSc(TCGContext *s, S390Opcode op, TCGReg r1,
intptr_t d2, TCGReg b2, TCGReg v3, int m4)
{
tcg_debug_assert(is_general_reg(r1));
tcg_debug_assert(d2 >= 0 && d2 <= 0xfff);
tcg_debug_assert(is_general_reg(b2));
tcg_debug_assert(is_vector_reg(v3));
tcg_out16(s, (op & 0xff00) | (r1 << 4) | (v3 & 0xf));
tcg_out16(s, b2 << 12 | d2);
tcg_out16(s, (op & 0x00ff) | RXB(0, 0, v3, 0) | (m4 << 12));
}
static void tcg_out_insn_VRX(TCGContext *s, S390Opcode op, TCGReg v1, static void tcg_out_insn_VRX(TCGContext *s, S390Opcode op, TCGReg v1,
TCGReg b2, TCGReg x2, intptr_t d2, int m3) TCGReg b2, TCGReg x2, intptr_t d2, int m3)
{ {
@ -591,12 +629,38 @@ static void tcg_out_sh32(TCGContext* s, S390Opcode op, TCGReg dest,
static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src)
{ {
if (src != dst) { if (src == dst) {
if (type == TCG_TYPE_I32) { return true;
}
switch (type) {
case TCG_TYPE_I32:
if (likely(is_general_reg(dst) && is_general_reg(src))) {
tcg_out_insn(s, RR, LR, dst, src); tcg_out_insn(s, RR, LR, dst, src);
} else { break;
tcg_out_insn(s, RRE, LGR, dst, src);
} }
/* fallthru */
case TCG_TYPE_I64:
if (likely(is_general_reg(dst))) {
if (likely(is_general_reg(src))) {
tcg_out_insn(s, RRE, LGR, dst, src);
} else {
tcg_out_insn(s, VRSc, VLGV, dst, 0, 0, src, 3);
}
break;
} else if (is_general_reg(src)) {
tcg_out_insn(s, VRSb, VLVG, dst, 0, 0, src, 3);
break;
}
/* fallthru */
case TCG_TYPE_V64:
case TCG_TYPE_V128:
tcg_out_insn(s, VRRa, VLR, dst, src, 0);
break;
default:
g_assert_not_reached();
} }
return true; return true;
} }