linux-user: ARM: clear the IT bits when invoking a signal handler
When invoking a signal handler for an ARM target, make sure the IT bits in the CPSR are cleared. (This would otherwise cause incorrect execution if the IT state was non-zero when an exception occured. This bug has been masked previously because we weren't getting the IT state bits at exception entry right anyway.) Also use the proper cpsr_read()/cpsr_write() interface to update the CPSR rather than manipulating CPUState fields directly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -1256,6 +1256,14 @@ setup_return(CPUState *env, struct target_sigaction *ka,
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abi_ulong handler = ka->_sa_handler;
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abi_ulong handler = ka->_sa_handler;
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abi_ulong retcode;
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abi_ulong retcode;
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int thumb = handler & 1;
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int thumb = handler & 1;
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uint32_t cpsr = cpsr_read(env);
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cpsr &= ~CPSR_IT;
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if (thumb) {
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cpsr |= CPSR_T;
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} else {
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cpsr &= ~CPSR_T;
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}
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if (ka->sa_flags & TARGET_SA_RESTORER) {
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if (ka->sa_flags & TARGET_SA_RESTORER) {
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retcode = ka->sa_restorer;
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retcode = ka->sa_restorer;
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@ -1278,13 +1286,7 @@ setup_return(CPUState *env, struct target_sigaction *ka,
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env->regs[13] = frame_addr;
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env->regs[13] = frame_addr;
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env->regs[14] = retcode;
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env->regs[14] = retcode;
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env->regs[15] = handler & (thumb ? ~1 : ~3);
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env->regs[15] = handler & (thumb ? ~1 : ~3);
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env->thumb = thumb;
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cpsr_write(env, cpsr, 0xffffffff);
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#if 0
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#ifdef TARGET_CONFIG_CPU_32
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env->cpsr = cpsr;
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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