target/riscv: Disable the MMU correctly
Previously if we didn't enable the MMU it would be enabled in the realize() function anyway. Let's ensure that if we don't want the MMU we disable it. We also don't need to enable the MMU as it will be enabled in realize() by default. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
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@ -142,7 +142,6 @@ static void rv32gcsu_priv1_10_0_cpu_init(Object *obj)
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set_misa(env, RV32 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
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set_priv_version(env, PRIV_VERSION_1_10_0);
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set_resetvec(env, DEFAULT_RSTVEC);
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set_feature(env, RISCV_FEATURE_MMU);
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set_feature(env, RISCV_FEATURE_PMP);
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}
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@ -153,6 +152,7 @@ static void rv32imacu_nommu_cpu_init(Object *obj)
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set_priv_version(env, PRIV_VERSION_1_10_0);
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set_resetvec(env, DEFAULT_RSTVEC);
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set_feature(env, RISCV_FEATURE_PMP);
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qdev_prop_set_bit(DEVICE(obj), "mmu", false);
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}
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static void rv32imafcu_nommu_cpu_init(Object *obj)
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@ -162,6 +162,7 @@ static void rv32imafcu_nommu_cpu_init(Object *obj)
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set_priv_version(env, PRIV_VERSION_1_10_0);
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set_resetvec(env, DEFAULT_RSTVEC);
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set_feature(env, RISCV_FEATURE_PMP);
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qdev_prop_set_bit(DEVICE(obj), "mmu", false);
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}
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#elif defined(TARGET_RISCV64)
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@ -180,7 +181,6 @@ static void rv64gcsu_priv1_10_0_cpu_init(Object *obj)
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set_misa(env, RV64 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
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set_priv_version(env, PRIV_VERSION_1_10_0);
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set_resetvec(env, DEFAULT_RSTVEC);
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set_feature(env, RISCV_FEATURE_MMU);
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set_feature(env, RISCV_FEATURE_PMP);
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}
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@ -191,6 +191,7 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
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set_priv_version(env, PRIV_VERSION_1_10_0);
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set_resetvec(env, DEFAULT_RSTVEC);
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set_feature(env, RISCV_FEATURE_PMP);
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qdev_prop_set_bit(DEVICE(obj), "mmu", false);
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}
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#endif
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