hw/pci: Disable PCI_ERR_UNCOR_MASK register for machine type < 8.0
Since it's implementation on v8.0.0-rc0, having the PCI_ERR_UNCOR_MASK
set for machine types < 8.0 will cause migration to fail if the target
QEMU version is < 8.0.0 :
qemu-system-x86_64: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
qemu-system-x86_64: Failed to load PCIDevice:config
qemu-system-x86_64: Failed to load e1000e:parent_obj
qemu-system-x86_64: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
qemu-system-x86_64: load of migration failed: Invalid argument
The above test migrated a 7.2 machine type from QEMU master to QEMU 7.2.0,
with this cmdline:
./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
In order to fix this, property x-pcie-err-unc-mask was introduced to
control when PCI_ERR_UNCOR_MASK is enabled. This property is enabled by
default, but is disabled if machine type <= 7.2.
Fixes: 010746ae1d
("hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register")
Suggested-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Leonardo Bras <leobras@redhat.com>
Message-Id: <20230503002701.854329-1-leobras@redhat.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1576
Tested-by: Fiona Ebner <f.ebner@proxmox.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
6f8be29ec1
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@ -48,6 +48,7 @@ GlobalProperty hw_compat_7_2[] = {
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{ "e1000e", "migrate-timadj", "off" },
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{ "virtio-mem", "x-early-migration", "false" },
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{ "migration", "x-preempt-pre-7-2", "true" },
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{ TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" },
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};
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const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2);
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@ -79,6 +79,8 @@ static Property pci_props[] = {
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DEFINE_PROP_STRING("failover_pair_id", PCIDevice,
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failover_pair_id),
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DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0),
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DEFINE_PROP_BIT("x-pcie-err-unc-mask", PCIDevice, cap_present,
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QEMU_PCIE_ERR_UNC_MASK_BITNR, true),
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DEFINE_PROP_END_OF_LIST()
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};
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@ -112,10 +112,13 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
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pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
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PCI_ERR_UNC_SUPPORTED);
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pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
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PCI_ERR_UNC_MASK_DEFAULT);
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pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
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PCI_ERR_UNC_SUPPORTED);
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if (dev->cap_present & QEMU_PCIE_ERR_UNC_MASK) {
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pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
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PCI_ERR_UNC_MASK_DEFAULT);
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pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
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PCI_ERR_UNC_SUPPORTED);
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}
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pci_set_long(dev->config + offset + PCI_ERR_UNCOR_SEVER,
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PCI_ERR_UNC_SEVERITY_DEFAULT);
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@ -207,6 +207,8 @@ enum {
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QEMU_PCIE_EXTCAP_INIT = (1 << QEMU_PCIE_EXTCAP_INIT_BITNR),
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#define QEMU_PCIE_CXL_BITNR 10
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QEMU_PCIE_CAP_CXL = (1 << QEMU_PCIE_CXL_BITNR),
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#define QEMU_PCIE_ERR_UNC_MASK_BITNR 11
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QEMU_PCIE_ERR_UNC_MASK = (1 << QEMU_PCIE_ERR_UNC_MASK_BITNR),
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};
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typedef struct PCIINTxRoute {
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