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libqos/ahci: Add ahci_port_check_interrupts helper 

A helper that compares a given port's current interrupts and checks them
against a supplied list of expected interrupt bits, and throws an error
if they do not match.

The helper then resets the requested interrupts on this port, and asserts
that the interrupt register is now empty.

Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1423158090-25580-7-git-send-email-jsnow@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
John Snow 2015-02-05 12:41:17 -05:00 committed by Stefan Hajnoczi
parent 85c34e9395
commit 5bf99aa1cf
3 changed files with 18 additions and 11 deletions
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13
tests/ahci-test.c
View File

@ -747,19 +747,10 @@ static void ahci_test_identify(AHCIQState *ahci)
while (BITSET(ahci_px_rreg(ahci, i, AHCI_PX_TFD), AHCI_PX_TFD_STS_BSY)) { while (BITSET(ahci_px_rreg(ahci, i, AHCI_PX_TFD), AHCI_PX_TFD_STS_BSY)) {
usleep(50); usleep(50);
} }
/* Check registers for post-command consistency */
ahci_port_check_error(ahci, i); ahci_port_check_error(ahci, i);
/* Check for expected interrupts */
reg = ahci_px_rreg(ahci, i, AHCI_PX_IS);
ASSERT_BIT_SET(reg, AHCI_PX_IS_DHRS);
ASSERT_BIT_SET(reg, AHCI_PX_IS_PSS);
/* BUG: we expect AHCI_PX_IS_DPS to be set. */ /* BUG: we expect AHCI_PX_IS_DPS to be set. */
ASSERT_BIT_CLEAR(reg, AHCI_PX_IS_DPS); ahci_port_check_interrupts(ahci, i, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS);
/* Clear expected interrupts and assert all interrupts now cleared. */
ahci_px_wreg(ahci, i, AHCI_PX_IS,
AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS | AHCI_PX_IS_DPS);
g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);
/* Investigate the CMD, assert that we read 512 bytes */ /* Investigate the CMD, assert that we read 512 bytes */
ahci_get_command_header(ahci, i, cx, &cmd); ahci_get_command_header(ahci, i, cx, &cmd);

14
tests/libqos/ahci.c
View File

@ -333,6 +333,20 @@ void ahci_port_check_error(AHCIQState *ahci, uint8_t port)
ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR); ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR);
} }
void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port,
uint32_t intr_mask)
{
uint32_t reg;
/* Check for expected interrupts */
reg = ahci_px_rreg(ahci, port, AHCI_PX_IS);
ASSERT_BIT_SET(reg, intr_mask);
/* Clear expected interrupts and assert all interrupts now cleared. */
ahci_px_wreg(ahci, port, AHCI_PX_IS, intr_mask);
g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), ==, 0);
}
/* Get the command in #slot of port #port. */ /* Get the command in #slot of port #port. */
void ahci_get_command_header(AHCIQState *ahci, uint8_t port, void ahci_get_command_header(AHCIQState *ahci, uint8_t port,
uint8_t slot, AHCICommandHeader *cmd) uint8_t slot, AHCICommandHeader *cmd)

2
tests/libqos/ahci.h
View File

@ -434,6 +434,8 @@ void ahci_hba_enable(AHCIQState *ahci);
unsigned ahci_port_select(AHCIQState *ahci); unsigned ahci_port_select(AHCIQState *ahci);
void ahci_port_clear(AHCIQState *ahci, uint8_t port); void ahci_port_clear(AHCIQState *ahci, uint8_t port);
void ahci_port_check_error(AHCIQState *ahci, uint8_t port); void ahci_port_check_error(AHCIQState *ahci, uint8_t port);
void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port,
uint32_t intr_mask);
void ahci_get_command_header(AHCIQState *ahci, uint8_t port, void ahci_get_command_header(AHCIQState *ahci, uint8_t port,
uint8_t slot, AHCICommandHeader *cmd); uint8_t slot, AHCICommandHeader *cmd);
void ahci_set_command_header(AHCIQState *ahci, uint8_t port, void ahci_set_command_header(AHCIQState *ahci, uint8_t port,